From 311f55db4571b93dc7aeea137978a8e3057e46e1 Mon Sep 17 00:00:00 2001 From: brunetto Date: Fri, 14 Apr 2023 15:31:15 +0200 Subject: [PATCH] Step_Jeu_Son sans StartSon --- soft/PjtKEIL_StepSon/Src/GestionSon.s | 28 +++++-- soft/PjtKEIL_StepSon/Src/principal.c | 24 +++++- soft/PjtKEIL_StepSon/StepSon.uvoptx | 103 +++++++++++++++++++++++--- 3 files changed, 138 insertions(+), 17 deletions(-) diff --git a/soft/PjtKEIL_StepSon/Src/GestionSon.s b/soft/PjtKEIL_StepSon/Src/GestionSon.s index a6cb9aa..9db345c 100644 --- a/soft/PjtKEIL_StepSon/Src/GestionSon.s +++ b/soft/PjtKEIL_StepSon/Src/GestionSon.s @@ -17,14 +17,20 @@ Index dcw 0 ; =============================================================================================== EXPORT SortieSon EXPORT CallbackSon + ;EXPORT StartSon IMPORT Son IMPORT LongueurSon + IMPORT PWM_Set_Value_TIM3_Ch3 ;Section ROM code (read only) : area moncode,code,readonly ; écrire le code ici + + + + CallbackSon proc push {lr} ldr r3,=Index @@ -36,29 +42,37 @@ CallbackSon proc bge Fin ; if index < longueur son ldr r2,=Son ; r2 = @ debut son - ldr r0,[r2,r1] + ldrsh r0,[r2,r1, LSL #1] add r0,#32768 mov r2,#720 mul r0,r2 - lsr r0,#16 + lsr r0,#16 ; division par 65536 ldr r2,=SortieSon - str r0,[r2] + strh r0,[r2] add r1,#1 - str r1,[r3] + strh r1,[r3] + bl PWM_Set_Value_TIM3_Ch3 b Fin ;if index = longueurSon FinSig - mov r0,#0 + mov r0,#360 ldr r2,=SortieSon - str r0,[r2] + strh r0,[r2] add r1,#1 - str r1,[r3] + strh r1,[r3] + bl PWM_Set_Value_TIM3_Ch3 ; if index > longueurson Fin pop {pc} endp +;StartSon proc +; push {lr} +; ldr r3,=Index +; mov r1, #0 +; strh r1,[r3] +; pop {pc} diff --git a/soft/PjtKEIL_StepSon/Src/principal.c b/soft/PjtKEIL_StepSon/Src/principal.c index 1fcf648..351c8ec 100644 --- a/soft/PjtKEIL_StepSon/Src/principal.c +++ b/soft/PjtKEIL_StepSon/Src/principal.c @@ -1,9 +1,10 @@ - #include "DriverJeuLaser.h" void CallbackSon(void); +//void StartSon(void); + int main(void) { @@ -12,18 +13,39 @@ int main(void) // =========================================================================== // Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers +/* CLOCK_Configure(); Timer_1234_Init_ff( TIM4, 6552 ); Active_IT_Debordement_Timer( TIM4, 2, CallbackSon ); +GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL); + */ +//----------------------------------------------------------------- + +CLOCK_Configure(); + +PWM_Init_ff( TIM3, 3, 720 ); + +Timer_1234_Init_ff( TIM4, 6552 ); + +Active_IT_Debordement_Timer( TIM4, 2, CallbackSon ); + +GPIO_Configure(GPIOB, 0, OUTPUT, ALT_PPULL); + GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL); //============================================================================ + while (1) { + /* + for(int i = 0; i<99999; i++) + { + StartSon(); + }*/ } } diff --git a/soft/PjtKEIL_StepSon/StepSon.uvoptx b/soft/PjtKEIL_StepSon/StepSon.uvoptx index 39bb201..59ac483 100644 --- a/soft/PjtKEIL_StepSon/StepSon.uvoptx +++ b/soft/PjtKEIL_StepSon/StepSon.uvoptx @@ -158,14 +158,29 @@ 0 1 - SortieSon + r0,0x0A + + + 1 + 1 + r1,0x0A + + + 2 + 1 + SortieSon,0x0A + + + 3 + 1 + Index 1 - 257 - r0 + 10 + R2 0 @@ -189,7 +204,7 @@ 0 0 0 - 0 + 1 0 0 0 @@ -214,8 +229,13 @@ 0 - `SortieSon - 0080000000000000000000000000E0FFFFFFEF4100000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0A00000000000000000000000000000000000000080A0008 + (PORTB & 0x00000001) + 008000000000000000000000000000000000F03F0000000000000000000000000000000028504F52544220262030783030303030303031290000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000E03F0E00000000000000000000000000000000000000F20A0008 + + + 1 + (SortieSon & 0xFFFF) >> 0 + 000080000000000000000000000000000000884000000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000003000000FFFFFFFFFFFFDF3F0E00000000000000000000000000000000000000CC090008 @@ -360,7 +380,72 @@ -U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM) - + + + 0 + 0 + 2 + 1 +
0
+ 0 + 0 + 0 + 0 + 0 + 0 + .\Src\principal.c + + + + + 1 + 0 + 3 + 1 +
0
+ 0 + 0 + 0 + 0 + 0 + 0 + .\Src\principal.c + + + + + 2 + 0 + 45 + 1 +
0
+ 0 + 0 + 0 + 0 + 0 + 0 + .\Src\principal.c + + + + + 3 + 0 + 44 + 1 +
0
+ 0 + 0 + 0 + 0 + 0 + 0 + .\Src\principal.c + + + + 1 @@ -389,7 +474,7 @@ 0 0 0 - 0 + 1 0 0 0 @@ -623,7 +708,7 @@ Sources - 0 + 1 0 0 0