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5377134376
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a358bb43db |
30 changed files with 4741 additions and 2699 deletions
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@ -1,10 +1,10 @@
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09:25:41 **** Incremental Build of configuration Debug for project RealOne ****
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10:09:39 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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arm-none-eabi-size RealOne.elf
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text data bss dec hex filename
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3632 24 1576 5232 1470 RealOne.elf
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3748 20 1572 5340 14dc RealOne.elf
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Finished building: default.size.stdout
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09:25:41 Build Finished. 0 errors, 0 warnings. (took 325ms)
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10:09:39 Build Finished. 0 errors, 0 warnings. (took 338ms)
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@ -154,3 +154,424 @@ arm-none-eabi-size RealOne.elf
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3632 24 1576 5232 1470 RealOne.elf
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Finished building: default.size.stdout
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09:28:07 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
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#define VDD_VALUE 3300U /*!< Value of VDD in mv */
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<command-line>:0:0: note: this is the location of the previous definition
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
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#define PREFETCH_ENABLE 0U
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<command-line>:0:0: note: this is the location of the previous definition
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
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#define INSTRUCTION_CACHE_ENABLE 1U
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<command-line>:0:0: note: this is the location of the previous definition
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
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#define DATA_CACHE_ENABLE 1U
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<command-line>:0:0: note: this is the location of the previous definition
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arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
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Finished building target: RealOne.elf
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arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
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arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
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arm-none-eabi-size RealOne.elf
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text data bss dec hex filename
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3820 20 1572 5412 1524 RealOne.elf
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Finished building: default.size.stdout
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Finished building: RealOne.bin
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Finished building: RealOne.list
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09:30:04 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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arm-none-eabi-size RealOne.elf
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text data bss dec hex filename
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3820 20 1572 5412 1524 RealOne.elf
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Finished building: default.size.stdout
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09:33:28 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
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#define VDD_VALUE 3300U /*!< Value of VDD in mv */
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<command-line>:0:0: note: this is the location of the previous definition
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
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#define PREFETCH_ENABLE 0U
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||||
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||||
<command-line>:0:0: note: this is the location of the previous definition
|
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
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#define INSTRUCTION_CACHE_ENABLE 1U
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||||
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||||
<command-line>:0:0: note: this is the location of the previous definition
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||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
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#define DATA_CACHE_ENABLE 1U
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||||
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<command-line>:0:0: note: this is the location of the previous definition
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../Core/Src/main.c: In function 'main':
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../Core/Src/main.c:215:1: error: expected declaration or statement at end of input
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}
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^
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At top level:
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../Core/Src/main.c:172:6: warning: 'SystemClock_Config_80M' defined but not used [-Wunused-function]
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void SystemClock_Config_80M(void)
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^~~~~~~~~~~~~~~~~~~~~~
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../Core/Src/main.c:107:6: warning: 'SystemClock_Config_24M_LSE' defined but not used [-Wunused-function]
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void SystemClock_Config_24M_LSE(void)
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^~~~~~~~~~~~~~~~~~~~~~~~~~
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make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1
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"make -j8 all" terminated with exit code 2. Build might be incomplete.
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09:35:25 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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||||
arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
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In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
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from ../Core/Inc/main.h:31,
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from ../Core/Src/main.c:8:
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../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
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#define VDD_VALUE 3300U /*!< Value of VDD in mv */
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||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
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||||
from ../Core/Src/main.c:8:
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||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
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#define PREFETCH_ENABLE 0U
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||||
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||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
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||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
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||||
#define INSTRUCTION_CACHE_ENABLE 1U
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||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
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||||
from ../Core/Src/main.c:8:
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||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
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||||
#define DATA_CACHE_ENABLE 1U
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||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
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||||
../Core/Src/main.c: In function 'main':
|
||||
../Core/Src/main.c:215:1: error: expected declaration or statement at end of input
|
||||
}
|
||||
^
|
||||
At top level:
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||||
../Core/Src/main.c:172:6: warning: 'SystemClock_Config_80M' defined but not used [-Wunused-function]
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||||
void SystemClock_Config_80M(void)
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^~~~~~~~~~~~~~~~~~~~~~
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../Core/Src/main.c:107:6: warning: 'SystemClock_Config_24M_LSE' defined but not used [-Wunused-function]
|
||||
void SystemClock_Config_24M_LSE(void)
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^~~~~~~~~~~~~~~~~~~~~~~~~~
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||||
make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1
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||||
"make -j8 all" terminated with exit code 2. Build might be incomplete.
|
||||
09:39:04 **** Incremental Build of configuration Debug for project RealOne ****
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make -j8 all
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arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
|
||||
#define PREFETCH_ENABLE 0U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: RealOne.elf
|
||||
|
||||
arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
|
||||
arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3780 20 1572 5372 14fc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: RealOne.bin
|
||||
|
||||
Finished building: RealOne.list
|
||||
|
||||
09:39:09 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3780 20 1572 5372 14fc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
09:44:36 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
|
||||
#define PREFETCH_ENABLE 0U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: RealOne.elf
|
||||
|
||||
arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
|
||||
arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3780 20 1572 5372 14fc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: RealOne.bin
|
||||
Finished building: RealOne.list
|
||||
|
||||
|
||||
09:44:41 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3780 20 1572 5372 14fc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
09:47:38 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3780 20 1572 5372 14fc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
09:49:56 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
|
||||
#define PREFETCH_ENABLE 0U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: RealOne.elf
|
||||
|
||||
arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
|
||||
arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3796 20 1572 5388 150c RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: RealOne.bin
|
||||
Finished building: RealOne.list
|
||||
|
||||
|
||||
09:51:43 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3796 20 1572 5388 150c RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
09:52:52 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3796 20 1572 5388 150c RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
09:56:36 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
|
||||
#define PREFETCH_ENABLE 0U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: RealOne.elf
|
||||
|
||||
arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
|
||||
arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3756 20 1572 5348 14e4 RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: RealOne.bin
|
||||
Finished building: RealOne.list
|
||||
|
||||
|
||||
09:57:22 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3756 20 1572 5348 14e4 RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
10:08:48 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined
|
||||
#define PREFETCH_ENABLE 0U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0,
|
||||
from ../Core/Inc/main.h:31,
|
||||
from ../Core/Src/main.c:8:
|
||||
../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
<command-line>:0:0: note: this is the location of the previous definition
|
||||
arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: RealOne.elf
|
||||
|
||||
arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list"
|
||||
arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin"
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3748 20 1572 5340 14dc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: RealOne.bin
|
||||
Finished building: RealOne.list
|
||||
|
||||
|
||||
10:08:57 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3748 20 1572 5340 14dc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
10:09:39 **** Incremental Build of configuration Debug for project RealOne ****
|
||||
make -j8 all
|
||||
arm-none-eabi-size RealOne.elf
|
||||
text data bss dec hex filename
|
||||
3748 20 1572 5340 14dc RealOne.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
|
|
|
@ -0,0 +1,217 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
if (expe == 0){
|
||||
expe = 1;
|
||||
RTC->BKP0R = expe;
|
||||
}else if (expe != 0 && BLUE_BUTTON()){
|
||||
expe ++;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,215 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
expe ++;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,218 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
|
||||
expe ++;
|
||||
|
||||
if (expe > 2) expe = 1;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,215 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
expe ++;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,215 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
expe ++;
|
||||
RTC->BKP0R = expe;
|
||||
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,217 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 2;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
// if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
// LL_PWR_EnableBkUpAccess();
|
||||
//
|
||||
// //expe = register RTC
|
||||
// expe = RTC->BKP0R;
|
||||
// if (expe == 0){
|
||||
// expe = 1;
|
||||
// RTC->BKP0R = expe;
|
||||
// }else if (expe != 0 && BLUE_BUTTON()){
|
||||
// expe ++;
|
||||
// RTC->BKP0R = expe;
|
||||
// }
|
||||
// }else{
|
||||
// SystemClock_Config_24M_LSE();
|
||||
// expe = 1;
|
||||
// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
// LL_PWR_EnableBkUpAccess();
|
||||
// RTC->BKP0R = expe;
|
||||
// }
|
||||
// LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,218 @@
|
|||
/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
|
||||
* the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
|
||||
* The time base is provided by Systick (1000 ticks per second).
|
||||
* The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
// #if defined(USE_FULL_ASSERT)
|
||||
// #include "stm32_assert.h"
|
||||
// #endif /* USE_FULL_ASSERT */
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
|
||||
expe ++;
|
||||
|
||||
if (expe > 2) expe = 1;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
}else{
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
// LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
@ -4,4 +4,4 @@
|
|||
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.postmortemLaunchType=org.eclipse.cdt.dsf.gdb.launch.coreCLaunch,debug,;
|
||||
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug,;
|
||||
eclipse.preferences.version=1
|
||||
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n
|
||||
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions>\r\n<expression enabled\="true" text\="expe"/>\r\n<expression enabled\="true" text\="RCC->BDCR"/>\r\n<expression enabled\="true" text\="blue_mode"/>\r\n<expression enabled\="true" text\="RTC->BKP0R"/>\r\n</watchExpressions>\r\n
|
||||
|
|
|
@ -2,5 +2,7 @@ eclipse.preferences.version=1
|
|||
org.eclipse.debug.ui.MemoryView.orientation=0
|
||||
org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n
|
||||
org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<viewBindings>\r\n<view id\="org.eclipse.debug.ui.ExpressionView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n</viewBindings>\r\n
|
||||
pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.ExpressionView">\r\n<INTEGER IMemento.internal.id\="initialChildCountLimitForCollections" INTEGER\="100"/>\r\n<PERSISTABLE IMemento.internal.id\="org.eclipse.cdt.dsf.ui.elementFormatPersistable" PERSISTABLE\="org.eclipse.cdt.dsf.ui.simpleMapPersistableFactory">\r\n<type>java.lang.String</type>\r\n</PERSISTABLE>\r\n<BOOLEAN BOOLEAN\="true" IMemento.internal.id\="PRESENTATION_SHOW_LOGICAL_STRUCTURES"/>\r\n</PRESENTATION_CONTEXT_PROPERTIES>\r\n</VariablesViewMemento>
|
||||
pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.VariableView">\r\n<INTEGER IMemento.internal.id\="initialChildCountLimitForCollections" INTEGER\="100"/>\r\n<BOOLEAN BOOLEAN\="true" IMemento.internal.id\="PRESENTATION_SHOW_LOGICAL_STRUCTURES"/>\r\n</PRESENTATION_CONTEXT_PROPERTIES>\r\n</VariablesViewMemento>
|
||||
preferredDetailPanes=NumberFormatPane\:NumberFormatPane|DefaultDetailPane\:DefaultDetailPane|
|
||||
preferredTargets=org.eclipse.cdt.debug.ui.toggleCBreakpointTarget,org.eclipse.cdt.debug.ui.toggleCDynamicPrintfTarget\:org.eclipse.cdt.debug.ui.toggleCBreakpointTarget|
|
||||
|
|
|
@ -5,4 +5,4 @@ configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-m
|
|||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-master\ Debug/activeLaunchMode=run
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-master\ Debug/activeLaunchTarget=null\:---
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:RealOne\ Debug/activeLaunchMode=run
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:RealOne\ Debug/activeLaunchMode=debug
|
||||
|
|
File diff suppressed because one or more lines are too long
|
@ -14,25 +14,25 @@
|
|||
|
||||
// systick interrupt handler
|
||||
volatile uint32_t msTicks = 0;
|
||||
volatile uint8_t expe = 2;
|
||||
volatile uint8_t expe = 0;
|
||||
volatile uint8_t blue_mode = 0;
|
||||
|
||||
void SysTick_Handler()
|
||||
{
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
if ( BLUE_BUTTON() ){
|
||||
blue_mode = 1 ;
|
||||
}
|
||||
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */
|
||||
if (msTicks == 5 * expe){
|
||||
LED_GREEN(0);
|
||||
}else if(msTicks >= 200){
|
||||
msTicks = 0;
|
||||
LED_GREEN(1);
|
||||
}
|
||||
if(expe == 2){
|
||||
CLK_TOGGLE();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
@ -40,178 +40,182 @@ void SysTick_Handler()
|
|||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// if (RCC->BDCR & RCC_BDCR_LSEON) {
|
||||
// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
// LL_PWR_EnableBkUpAccess();
|
||||
//
|
||||
// //expe = register RTC
|
||||
// expe = RTC->BKP0R;
|
||||
// if (expe == 0){
|
||||
// expe = 1;
|
||||
// RTC->BKP0R = expe;
|
||||
// }else if (expe != 0 && BLUE_BUTTON()){
|
||||
// expe ++;
|
||||
// RTC->BKP0R = expe;
|
||||
// }
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
//expe = register RTC
|
||||
expe = RTC->BKP0R;
|
||||
if (expe == 0) {
|
||||
SystemClock_Config_24M_LSE();
|
||||
expe = 1;
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
|
||||
if (BLUE_BUTTON()){
|
||||
|
||||
expe ++;
|
||||
|
||||
if (expe > 2) expe = 1;
|
||||
RTC->BKP0R = expe;
|
||||
}
|
||||
// }else{
|
||||
// SystemClock_Config_24M_LSE();
|
||||
// expe = 1;
|
||||
// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
// LL_PWR_EnableBkUpAccess();
|
||||
// RTC->BKP0R = expe;
|
||||
|
||||
// }
|
||||
// LL_PWR_DisableBkUpAccess();
|
||||
LL_PWR_DisableBkUpAccess();
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_80M();
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config_24M_LSE();
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// config GPIO
|
||||
GPIO_init();
|
||||
|
||||
// init systick timer (tick period at 1 ms)
|
||||
LL_Init1msTick( SystemCoreClock );
|
||||
LL_SYSTICK_EnableIT();
|
||||
|
||||
//Setup Sleep mode
|
||||
LL_LPM_EnableSleep();
|
||||
//LL_LPM_EnableSleepOnExit();
|
||||
|
||||
while (1) {
|
||||
if (blue_mode){
|
||||
switch(expe){
|
||||
case 1:
|
||||
__WFI();
|
||||
break;
|
||||
case 2:
|
||||
LL_RCC_MSI_EnablePLLMode();
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
* 24Mhz + RTC + LSE
|
||||
*/
|
||||
void SystemClock_Config_24M_LSE(void)
|
||||
{
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR );
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
// LL_RCC_ForceBackupDomainReset();
|
||||
LL_RCC_ReleaseBackupDomainReset();
|
||||
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
|
||||
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
// LL_RCC_MSI_EnablePLLMode();
|
||||
|
||||
LL_RCC_LSE_Enable();
|
||||
LL_RCC_LSE_Enable();
|
||||
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
/* Wait till LSE is ready */
|
||||
while(LL_RCC_LSE_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
}
|
||||
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
|
||||
LL_RCC_EnableRTC();
|
||||
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(24000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SystemClock_Config_80M(void)
|
||||
{
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
|
||||
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4)
|
||||
{
|
||||
}
|
||||
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||
LL_RCC_MSI_Enable();
|
||||
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
/* Wait till MSI is ready */
|
||||
while(LL_RCC_MSI_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
}
|
||||
LL_RCC_MSI_EnableRangeSelection();
|
||||
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
|
||||
LL_RCC_MSI_SetCalibTrimming(0);
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
|
||||
LL_RCC_PLL_EnableDomain_SYS();
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
/* Wait till PLL is ready */
|
||||
while(LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
}
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
/* Wait till System clock is ready */
|
||||
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_SetSystemCoreClock(80000000);
|
||||
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
/* Update the time base */
|
||||
if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
|
||||
{
|
||||
// Error_Handler();
|
||||
}
|
||||
}
|
||||
|
|
Binary file not shown.
|
@ -14,7 +14,6 @@ stm32l4xx_ll_rcc.h:2792:22:LL_RCC_SetAPB1Prescaler 16 static
|
|||
stm32l4xx_ll_rcc.h:2808:22:LL_RCC_SetAPB2Prescaler 16 static
|
||||
stm32l4xx_ll_rcc.h:3650:22:LL_RCC_SetRTCClockSource 16 static
|
||||
stm32l4xx_ll_rcc.h:3674:22:LL_RCC_EnableRTC 4 static
|
||||
stm32l4xx_ll_rcc.h:3704:22:LL_RCC_ForceBackupDomainReset 4 static
|
||||
stm32l4xx_ll_rcc.h:3714:22:LL_RCC_ReleaseBackupDomainReset 4 static
|
||||
stm32l4xx_ll_rcc.h:3733:22:LL_RCC_PLL_Enable 4 static
|
||||
stm32l4xx_ll_rcc.h:3754:26:LL_RCC_PLL_IsReady 4 static
|
||||
|
@ -27,7 +26,8 @@ stm32l4xx_ll_cortex.h:272:22:LL_SYSTICK_EnableIT 4 static
|
|||
stm32l4xx_ll_cortex.h:310:22:LL_LPM_EnableSleep 4 static
|
||||
stm32l4xx_ll_pwr.h:344:22:LL_PWR_SetRegulVoltageScaling 16 static
|
||||
stm32l4xx_ll_pwr.h:398:22:LL_PWR_EnableBkUpAccess 4 static
|
||||
stm32l4xx_ll_pwr.h:408:22:LL_PWR_DisableBkUpAccess 4 static
|
||||
main.c:20:6:SysTick_Handler 8 static
|
||||
main.c:41:5:main 8 static,ignoring_inline_asm
|
||||
main.c:109:6:SystemClock_Config_24M_LSE 8 static
|
||||
main.c:174:6:SystemClock_Config_80M 8 static
|
||||
main.c:113:6:SystemClock_Config_24M_LSE 8 static
|
||||
main.c:178:6:SystemClock_Config_80M 8 static
|
||||
|
|
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load diff
|
@ -3456,7 +3456,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
|
|||
0x0000000008000000 g_pfnVectors
|
||||
0x0000000008000188 . = ALIGN (0x4)
|
||||
|
||||
.text 0x0000000008000188 0xca8
|
||||
.text 0x0000000008000188 0xd1c
|
||||
0x0000000008000188 . = ALIGN (0x4)
|
||||
*(.text)
|
||||
.text 0x0000000008000188 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
|
@ -3520,313 +3520,311 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
|
|||
0x00000000080005f4 0x2c Core/Src/main.o
|
||||
.text.LL_RCC_EnableRTC
|
||||
0x0000000008000620 0x24 Core/Src/main.o
|
||||
.text.LL_RCC_ForceBackupDomainReset
|
||||
0x0000000008000644 0x24 Core/Src/main.o
|
||||
.text.LL_RCC_ReleaseBackupDomainReset
|
||||
0x0000000008000668 0x24 Core/Src/main.o
|
||||
0x0000000008000644 0x24 Core/Src/main.o
|
||||
.text.LL_RCC_PLL_Enable
|
||||
0x000000000800068c 0x20 Core/Src/main.o
|
||||
0x0000000008000668 0x20 Core/Src/main.o
|
||||
.text.LL_RCC_PLL_IsReady
|
||||
0x00000000080006ac 0x28 Core/Src/main.o
|
||||
0x0000000008000688 0x28 Core/Src/main.o
|
||||
.text.LL_RCC_PLL_ConfigDomain_SYS
|
||||
0x00000000080006d4 0x40 Core/Src/main.o
|
||||
0x00000000080006b0 0x40 Core/Src/main.o
|
||||
.text.LL_RCC_PLL_EnableDomain_SYS
|
||||
0x0000000008000714 0x20 Core/Src/main.o
|
||||
0x00000000080006f0 0x20 Core/Src/main.o
|
||||
.text.LL_APB1_GRP1_EnableClock
|
||||
0x0000000008000734 0x30 Core/Src/main.o
|
||||
0x0000000008000710 0x30 Core/Src/main.o
|
||||
.text.LL_FLASH_SetLatency
|
||||
0x0000000008000764 0x28 Core/Src/main.o
|
||||
0x0000000008000740 0x28 Core/Src/main.o
|
||||
.text.LL_FLASH_GetLatency
|
||||
0x000000000800078c 0x1c Core/Src/main.o
|
||||
0x0000000008000768 0x1c Core/Src/main.o
|
||||
.text.LL_SYSTICK_EnableIT
|
||||
0x00000000080007a8 0x20 Core/Src/main.o
|
||||
0x0000000008000784 0x20 Core/Src/main.o
|
||||
.text.LL_LPM_EnableSleep
|
||||
0x00000000080007c8 0x20 Core/Src/main.o
|
||||
0x00000000080007a4 0x20 Core/Src/main.o
|
||||
.text.LL_PWR_SetRegulVoltageScaling
|
||||
0x00000000080007e8 0x28 Core/Src/main.o
|
||||
0x00000000080007c4 0x28 Core/Src/main.o
|
||||
.text.LL_PWR_EnableBkUpAccess
|
||||
0x0000000008000810 0x20 Core/Src/main.o
|
||||
0x00000000080007ec 0x20 Core/Src/main.o
|
||||
.text.LL_PWR_DisableBkUpAccess
|
||||
0x000000000800080c 0x20 Core/Src/main.o
|
||||
.text.SysTick_Handler
|
||||
0x0000000008000830 0x70 Core/Src/main.o
|
||||
0x0000000008000830 SysTick_Handler
|
||||
.text.main 0x00000000080008a0 0x68 Core/Src/main.o
|
||||
0x00000000080008a0 main
|
||||
0x000000000800082c 0x70 Core/Src/main.o
|
||||
0x000000000800082c SysTick_Handler
|
||||
.text.main 0x000000000800089c 0xe4 Core/Src/main.o
|
||||
0x000000000800089c main
|
||||
.text.SystemClock_Config_24M_LSE
|
||||
0x0000000008000908 0xd0 Core/Src/main.o
|
||||
0x0000000008000908 SystemClock_Config_24M_LSE
|
||||
0x0000000008000980 0xcc Core/Src/main.o
|
||||
0x0000000008000980 SystemClock_Config_24M_LSE
|
||||
.text.SystemClock_Config_80M
|
||||
0x00000000080009d8 0x98 Core/Src/main.o
|
||||
0x00000000080009d8 SystemClock_Config_80M
|
||||
0x0000000008000a4c 0x98 Core/Src/main.o
|
||||
0x0000000008000a4c SystemClock_Config_80M
|
||||
.text.NMI_Handler
|
||||
0x0000000008000a70 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a70 NMI_Handler
|
||||
0x0000000008000ae4 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000ae4 NMI_Handler
|
||||
.text.HardFault_Handler
|
||||
0x0000000008000a7e 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a7e HardFault_Handler
|
||||
0x0000000008000af2 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000af2 HardFault_Handler
|
||||
.text.MemManage_Handler
|
||||
0x0000000008000a84 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a84 MemManage_Handler
|
||||
0x0000000008000af8 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000af8 MemManage_Handler
|
||||
.text.BusFault_Handler
|
||||
0x0000000008000a8a 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a8a BusFault_Handler
|
||||
0x0000000008000afe 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000afe BusFault_Handler
|
||||
.text.UsageFault_Handler
|
||||
0x0000000008000a90 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a90 UsageFault_Handler
|
||||
0x0000000008000b04 0x6 Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000b04 UsageFault_Handler
|
||||
.text.SVC_Handler
|
||||
0x0000000008000a96 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000a96 SVC_Handler
|
||||
0x0000000008000b0a 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000b0a SVC_Handler
|
||||
.text.DebugMon_Handler
|
||||
0x0000000008000aa4 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000aa4 DebugMon_Handler
|
||||
0x0000000008000b18 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000b18 DebugMon_Handler
|
||||
.text.PendSV_Handler
|
||||
0x0000000008000ab2 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000ab2 PendSV_Handler
|
||||
0x0000000008000b26 0xe Core/Src/stm32l4xx_it.o
|
||||
0x0000000008000b26 PendSV_Handler
|
||||
.text.SystemInit
|
||||
0x0000000008000ac0 0x6c Core/Src/system_stm32l4xx.o
|
||||
0x0000000008000ac0 SystemInit
|
||||
0x0000000008000b34 0x6c Core/Src/system_stm32l4xx.o
|
||||
0x0000000008000b34 SystemInit
|
||||
.text.Reset_Handler
|
||||
0x0000000008000b2c 0x50 Core/Startup/startup_stm32l476rgtx.o
|
||||
0x0000000008000b2c Reset_Handler
|
||||
0x0000000008000ba0 0x50 Core/Startup/startup_stm32l476rgtx.o
|
||||
0x0000000008000ba0 Reset_Handler
|
||||
.text.Default_Handler
|
||||
0x0000000008000b7c 0x2 Core/Startup/startup_stm32l476rgtx.o
|
||||
0x0000000008000b7c RTC_Alarm_IRQHandler
|
||||
0x0000000008000b7c EXTI2_IRQHandler
|
||||
0x0000000008000b7c TIM8_TRG_COM_IRQHandler
|
||||
0x0000000008000b7c TIM8_CC_IRQHandler
|
||||
0x0000000008000b7c TIM1_CC_IRQHandler
|
||||
0x0000000008000b7c TSC_IRQHandler
|
||||
0x0000000008000b7c TAMP_STAMP_IRQHandler
|
||||
0x0000000008000b7c EXTI3_IRQHandler
|
||||
0x0000000008000b7c LPTIM2_IRQHandler
|
||||
0x0000000008000b7c DFSDM1_FLT1_IRQHandler
|
||||
0x0000000008000b7c I2C3_ER_IRQHandler
|
||||
0x0000000008000b7c DFSDM1_FLT2_IRQHandler
|
||||
0x0000000008000b7c EXTI0_IRQHandler
|
||||
0x0000000008000b7c I2C2_EV_IRQHandler
|
||||
0x0000000008000b7c CAN1_RX0_IRQHandler
|
||||
0x0000000008000b7c FPU_IRQHandler
|
||||
0x0000000008000b7c TIM1_UP_TIM16_IRQHandler
|
||||
0x0000000008000b7c ADC1_2_IRQHandler
|
||||
0x0000000008000b7c SPI1_IRQHandler
|
||||
0x0000000008000b7c TIM6_DAC_IRQHandler
|
||||
0x0000000008000b7c TIM8_UP_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel2_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel4_IRQHandler
|
||||
0x0000000008000b7c SAI2_IRQHandler
|
||||
0x0000000008000b7c DFSDM1_FLT3_IRQHandler
|
||||
0x0000000008000b7c USART3_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel7_IRQHandler
|
||||
0x0000000008000b7c CAN1_RX1_IRQHandler
|
||||
0x0000000008000b7c LCD_IRQHandler
|
||||
0x0000000008000b7c UART5_IRQHandler
|
||||
0x0000000008000b7c ADC3_IRQHandler
|
||||
0x0000000008000b7c TIM4_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel1_IRQHandler
|
||||
0x0000000008000b7c QUADSPI_IRQHandler
|
||||
0x0000000008000b7c I2C1_EV_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel6_IRQHandler
|
||||
0x0000000008000b7c UART4_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel4_IRQHandler
|
||||
0x0000000008000b7c TIM3_IRQHandler
|
||||
0x0000000008000b7c RCC_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel1_IRQHandler
|
||||
0x0000000008000b7c Default_Handler
|
||||
0x0000000008000b7c DMA2_Channel7_IRQHandler
|
||||
0x0000000008000b7c EXTI15_10_IRQHandler
|
||||
0x0000000008000b7c TIM7_IRQHandler
|
||||
0x0000000008000b7c SDMMC1_IRQHandler
|
||||
0x0000000008000b7c TIM5_IRQHandler
|
||||
0x0000000008000b7c I2C3_EV_IRQHandler
|
||||
0x0000000008000b7c EXTI9_5_IRQHandler
|
||||
0x0000000008000b7c RTC_WKUP_IRQHandler
|
||||
0x0000000008000b7c PVD_PVM_IRQHandler
|
||||
0x0000000008000b7c SPI2_IRQHandler
|
||||
0x0000000008000b7c CAN1_TX_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel5_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel5_IRQHandler
|
||||
0x0000000008000b7c EXTI4_IRQHandler
|
||||
0x0000000008000b7c RNG_IRQHandler
|
||||
0x0000000008000b7c TIM1_TRG_COM_TIM17_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel3_IRQHandler
|
||||
0x0000000008000b7c COMP_IRQHandler
|
||||
0x0000000008000b7c WWDG_IRQHandler
|
||||
0x0000000008000b7c LPUART1_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel6_IRQHandler
|
||||
0x0000000008000b7c TIM2_IRQHandler
|
||||
0x0000000008000b7c EXTI1_IRQHandler
|
||||
0x0000000008000b7c USART2_IRQHandler
|
||||
0x0000000008000b7c DFSDM1_FLT0_IRQHandler
|
||||
0x0000000008000b7c I2C2_ER_IRQHandler
|
||||
0x0000000008000b7c DMA1_Channel2_IRQHandler
|
||||
0x0000000008000b7c TIM8_BRK_IRQHandler
|
||||
0x0000000008000b7c CAN1_SCE_IRQHandler
|
||||
0x0000000008000b7c FLASH_IRQHandler
|
||||
0x0000000008000b7c USART1_IRQHandler
|
||||
0x0000000008000b7c OTG_FS_IRQHandler
|
||||
0x0000000008000b7c SPI3_IRQHandler
|
||||
0x0000000008000b7c I2C1_ER_IRQHandler
|
||||
0x0000000008000b7c FMC_IRQHandler
|
||||
0x0000000008000b7c SWPMI1_IRQHandler
|
||||
0x0000000008000b7c LPTIM1_IRQHandler
|
||||
0x0000000008000b7c SAI1_IRQHandler
|
||||
0x0000000008000b7c DMA2_Channel3_IRQHandler
|
||||
0x0000000008000b7c TIM1_BRK_TIM15_IRQHandler
|
||||
*fill* 0x0000000008000b7e 0x2
|
||||
0x0000000008000bf0 0x2 Core/Startup/startup_stm32l476rgtx.o
|
||||
0x0000000008000bf0 RTC_Alarm_IRQHandler
|
||||
0x0000000008000bf0 EXTI2_IRQHandler
|
||||
0x0000000008000bf0 TIM8_TRG_COM_IRQHandler
|
||||
0x0000000008000bf0 TIM8_CC_IRQHandler
|
||||
0x0000000008000bf0 TIM1_CC_IRQHandler
|
||||
0x0000000008000bf0 TSC_IRQHandler
|
||||
0x0000000008000bf0 TAMP_STAMP_IRQHandler
|
||||
0x0000000008000bf0 EXTI3_IRQHandler
|
||||
0x0000000008000bf0 LPTIM2_IRQHandler
|
||||
0x0000000008000bf0 DFSDM1_FLT1_IRQHandler
|
||||
0x0000000008000bf0 I2C3_ER_IRQHandler
|
||||
0x0000000008000bf0 DFSDM1_FLT2_IRQHandler
|
||||
0x0000000008000bf0 EXTI0_IRQHandler
|
||||
0x0000000008000bf0 I2C2_EV_IRQHandler
|
||||
0x0000000008000bf0 CAN1_RX0_IRQHandler
|
||||
0x0000000008000bf0 FPU_IRQHandler
|
||||
0x0000000008000bf0 TIM1_UP_TIM16_IRQHandler
|
||||
0x0000000008000bf0 ADC1_2_IRQHandler
|
||||
0x0000000008000bf0 SPI1_IRQHandler
|
||||
0x0000000008000bf0 TIM6_DAC_IRQHandler
|
||||
0x0000000008000bf0 TIM8_UP_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel2_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel4_IRQHandler
|
||||
0x0000000008000bf0 SAI2_IRQHandler
|
||||
0x0000000008000bf0 DFSDM1_FLT3_IRQHandler
|
||||
0x0000000008000bf0 USART3_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel7_IRQHandler
|
||||
0x0000000008000bf0 CAN1_RX1_IRQHandler
|
||||
0x0000000008000bf0 LCD_IRQHandler
|
||||
0x0000000008000bf0 UART5_IRQHandler
|
||||
0x0000000008000bf0 ADC3_IRQHandler
|
||||
0x0000000008000bf0 TIM4_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel1_IRQHandler
|
||||
0x0000000008000bf0 QUADSPI_IRQHandler
|
||||
0x0000000008000bf0 I2C1_EV_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel6_IRQHandler
|
||||
0x0000000008000bf0 UART4_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel4_IRQHandler
|
||||
0x0000000008000bf0 TIM3_IRQHandler
|
||||
0x0000000008000bf0 RCC_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel1_IRQHandler
|
||||
0x0000000008000bf0 Default_Handler
|
||||
0x0000000008000bf0 DMA2_Channel7_IRQHandler
|
||||
0x0000000008000bf0 EXTI15_10_IRQHandler
|
||||
0x0000000008000bf0 TIM7_IRQHandler
|
||||
0x0000000008000bf0 SDMMC1_IRQHandler
|
||||
0x0000000008000bf0 TIM5_IRQHandler
|
||||
0x0000000008000bf0 I2C3_EV_IRQHandler
|
||||
0x0000000008000bf0 EXTI9_5_IRQHandler
|
||||
0x0000000008000bf0 RTC_WKUP_IRQHandler
|
||||
0x0000000008000bf0 PVD_PVM_IRQHandler
|
||||
0x0000000008000bf0 SPI2_IRQHandler
|
||||
0x0000000008000bf0 CAN1_TX_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel5_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel5_IRQHandler
|
||||
0x0000000008000bf0 EXTI4_IRQHandler
|
||||
0x0000000008000bf0 RNG_IRQHandler
|
||||
0x0000000008000bf0 TIM1_TRG_COM_TIM17_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel3_IRQHandler
|
||||
0x0000000008000bf0 COMP_IRQHandler
|
||||
0x0000000008000bf0 WWDG_IRQHandler
|
||||
0x0000000008000bf0 LPUART1_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel6_IRQHandler
|
||||
0x0000000008000bf0 TIM2_IRQHandler
|
||||
0x0000000008000bf0 EXTI1_IRQHandler
|
||||
0x0000000008000bf0 USART2_IRQHandler
|
||||
0x0000000008000bf0 DFSDM1_FLT0_IRQHandler
|
||||
0x0000000008000bf0 I2C2_ER_IRQHandler
|
||||
0x0000000008000bf0 DMA1_Channel2_IRQHandler
|
||||
0x0000000008000bf0 TIM8_BRK_IRQHandler
|
||||
0x0000000008000bf0 CAN1_SCE_IRQHandler
|
||||
0x0000000008000bf0 FLASH_IRQHandler
|
||||
0x0000000008000bf0 USART1_IRQHandler
|
||||
0x0000000008000bf0 OTG_FS_IRQHandler
|
||||
0x0000000008000bf0 SPI3_IRQHandler
|
||||
0x0000000008000bf0 I2C1_ER_IRQHandler
|
||||
0x0000000008000bf0 FMC_IRQHandler
|
||||
0x0000000008000bf0 SWPMI1_IRQHandler
|
||||
0x0000000008000bf0 LPTIM1_IRQHandler
|
||||
0x0000000008000bf0 SAI1_IRQHandler
|
||||
0x0000000008000bf0 DMA2_Channel3_IRQHandler
|
||||
0x0000000008000bf0 TIM1_BRK_TIM15_IRQHandler
|
||||
*fill* 0x0000000008000bf2 0x2
|
||||
.text.HAL_InitTick
|
||||
0x0000000008000b80 0x78 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x0000000008000b80 HAL_InitTick
|
||||
0x0000000008000bf4 0x78 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x0000000008000bf4 HAL_InitTick
|
||||
.text.__NVIC_GetPriorityGrouping
|
||||
0x0000000008000bf8 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000c6c 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.text.__NVIC_SetPriority
|
||||
0x0000000008000c14 0x54 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000c88 0x54 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.text.NVIC_EncodePriority
|
||||
0x0000000008000c68 0x66 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
*fill* 0x0000000008000cce 0x2
|
||||
0x0000000008000cdc 0x66 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
*fill* 0x0000000008000d42 0x2
|
||||
.text.SysTick_Config
|
||||
0x0000000008000cd0 0x44 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000d44 0x44 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.text.HAL_NVIC_SetPriority
|
||||
0x0000000008000d14 0x38 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000d14 HAL_NVIC_SetPriority
|
||||
0x0000000008000d88 0x38 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000d88 HAL_NVIC_SetPriority
|
||||
.text.HAL_SYSTICK_Config
|
||||
0x0000000008000d4c 0x18 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000d4c HAL_SYSTICK_Config
|
||||
0x0000000008000dc0 0x18 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0x0000000008000dc0 HAL_SYSTICK_Config
|
||||
.text.LL_InitTick
|
||||
0x0000000008000d64 0x34 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0x0000000008000dd8 0x34 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
.text.LL_Init1msTick
|
||||
0x0000000008000d98 0x18 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0x0000000008000d98 LL_Init1msTick
|
||||
0x0000000008000e0c 0x18 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0x0000000008000e0c LL_Init1msTick
|
||||
.text.LL_SetSystemCoreClock
|
||||
0x0000000008000db0 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0x0000000008000db0 LL_SetSystemCoreClock
|
||||
0x0000000008000e24 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0x0000000008000e24 LL_SetSystemCoreClock
|
||||
.text.__libc_init_array
|
||||
0x0000000008000dd0 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
|
||||
0x0000000008000dd0 __libc_init_array
|
||||
0x0000000008000e44 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
|
||||
0x0000000008000e44 __libc_init_array
|
||||
*(.glue_7)
|
||||
.glue_7 0x0000000008000e18 0x0 linker stubs
|
||||
.glue_7 0x0000000008000e8c 0x0 linker stubs
|
||||
*(.glue_7t)
|
||||
.glue_7t 0x0000000008000e18 0x0 linker stubs
|
||||
.glue_7t 0x0000000008000e8c 0x0 linker stubs
|
||||
*(.eh_frame)
|
||||
.eh_frame 0x0000000008000e18 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
.eh_frame 0x0000000008000e8c 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
*(.init)
|
||||
.init 0x0000000008000e18 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
|
||||
0x0000000008000e18 _init
|
||||
.init 0x0000000008000e1c 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
|
||||
.init 0x0000000008000e8c 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
|
||||
0x0000000008000e8c _init
|
||||
.init 0x0000000008000e90 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
|
||||
*(.fini)
|
||||
.fini 0x0000000008000e24 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
|
||||
0x0000000008000e24 _fini
|
||||
.fini 0x0000000008000e28 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000e30 _etext = .
|
||||
.fini 0x0000000008000e98 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
|
||||
0x0000000008000e98 _fini
|
||||
.fini 0x0000000008000e9c 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 _etext = .
|
||||
|
||||
.vfp11_veneer 0x0000000008000e30 0x0
|
||||
.vfp11_veneer 0x0000000008000e30 0x0 linker stubs
|
||||
.vfp11_veneer 0x0000000008000ea4 0x0
|
||||
.vfp11_veneer 0x0000000008000ea4 0x0 linker stubs
|
||||
|
||||
.v4_bx 0x0000000008000e30 0x0
|
||||
.v4_bx 0x0000000008000e30 0x0 linker stubs
|
||||
.v4_bx 0x0000000008000ea4 0x0
|
||||
.v4_bx 0x0000000008000ea4 0x0 linker stubs
|
||||
|
||||
.iplt 0x0000000008000e30 0x0
|
||||
.iplt 0x0000000008000e30 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
.iplt 0x0000000008000ea4 0x0
|
||||
.iplt 0x0000000008000ea4 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
|
||||
.rel.dyn 0x0000000008000e30 0x0
|
||||
.rel.iplt 0x0000000008000e30 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
.rel.dyn 0x0000000008000ea4 0x0
|
||||
.rel.iplt 0x0000000008000ea4 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
|
||||
.rodata 0x0000000008000e30 0x0
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
.rodata 0x0000000008000ea4 0x0
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
|
||||
.ARM.extab 0x0000000008000e30 0x0
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
.ARM.extab 0x0000000008000ea4 0x0
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
|
||||
.ARM 0x0000000008000e30 0x0
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000e30 __exidx_start = .
|
||||
.ARM 0x0000000008000ea4 0x0
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 __exidx_start = .
|
||||
*(.ARM.exidx*)
|
||||
0x0000000008000e30 __exidx_end = .
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 __exidx_end = .
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
|
||||
.preinit_array 0x0000000008000e30 0x0
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000e30 PROVIDE (__preinit_array_start = .)
|
||||
.preinit_array 0x0000000008000ea4 0x0
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 PROVIDE (__preinit_array_start = .)
|
||||
*(.preinit_array*)
|
||||
0x0000000008000e30 PROVIDE (__preinit_array_end = .)
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 PROVIDE (__preinit_array_end = .)
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
|
||||
.init_array 0x0000000008000e30 0x4
|
||||
0x0000000008000e30 . = ALIGN (0x4)
|
||||
0x0000000008000e30 PROVIDE (__init_array_start = .)
|
||||
.init_array 0x0000000008000ea4 0x4
|
||||
0x0000000008000ea4 . = ALIGN (0x4)
|
||||
0x0000000008000ea4 PROVIDE (__init_array_start = .)
|
||||
*(SORT_BY_NAME(.init_array.*))
|
||||
*(.init_array*)
|
||||
.init_array 0x0000000008000e30 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
0x0000000008000e34 PROVIDE (__init_array_end = .)
|
||||
0x0000000008000e34 . = ALIGN (0x4)
|
||||
.init_array 0x0000000008000ea4 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
0x0000000008000ea8 PROVIDE (__init_array_end = .)
|
||||
0x0000000008000ea8 . = ALIGN (0x4)
|
||||
|
||||
.fini_array 0x0000000008000e34 0x4
|
||||
0x0000000008000e34 . = ALIGN (0x4)
|
||||
.fini_array 0x0000000008000ea8 0x4
|
||||
0x0000000008000ea8 . = ALIGN (0x4)
|
||||
[!provide] PROVIDE (__fini_array_start = .)
|
||||
*(SORT_BY_NAME(.fini_array.*))
|
||||
*(.fini_array*)
|
||||
.fini_array 0x0000000008000e34 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
.fini_array 0x0000000008000ea8 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
[!provide] PROVIDE (__fini_array_end = .)
|
||||
0x0000000008000e38 . = ALIGN (0x4)
|
||||
0x0000000008000e38 _sidata = LOADADDR (.data)
|
||||
0x0000000008000eac . = ALIGN (0x4)
|
||||
0x0000000008000eac _sidata = LOADADDR (.data)
|
||||
|
||||
.data 0x0000000020000000 0x10 load address 0x0000000008000e38
|
||||
.data 0x0000000020000000 0xc load address 0x0000000008000eac
|
||||
0x0000000020000000 . = ALIGN (0x4)
|
||||
0x0000000020000000 _sdata = .
|
||||
*(.data)
|
||||
*(.data*)
|
||||
.data.expe 0x0000000020000000 0x1 Core/Src/main.o
|
||||
0x0000000020000000 expe
|
||||
*fill* 0x0000000020000001 0x3
|
||||
.data.SystemCoreClock
|
||||
0x0000000020000004 0x4 Core/Src/system_stm32l4xx.o
|
||||
0x0000000020000004 SystemCoreClock
|
||||
0x0000000020000000 0x4 Core/Src/system_stm32l4xx.o
|
||||
0x0000000020000000 SystemCoreClock
|
||||
.data.uwTickPrio
|
||||
0x0000000020000008 0x4 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x0000000020000008 uwTickPrio
|
||||
0x0000000020000004 0x4 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x0000000020000004 uwTickPrio
|
||||
.data.uwTickFreq
|
||||
0x000000002000000c 0x1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x000000002000000c uwTickFreq
|
||||
0x0000000020000010 . = ALIGN (0x4)
|
||||
*fill* 0x000000002000000d 0x3
|
||||
0x0000000020000010 _edata = .
|
||||
0x0000000020000008 0x1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0x0000000020000008 uwTickFreq
|
||||
0x000000002000000c . = ALIGN (0x4)
|
||||
*fill* 0x0000000020000009 0x3
|
||||
0x000000002000000c _edata = .
|
||||
|
||||
.igot.plt 0x0000000020000010 0x0 load address 0x0000000008000e48
|
||||
.igot.plt 0x0000000020000010 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
0x0000000020000010 . = ALIGN (0x4)
|
||||
.igot.plt 0x000000002000000c 0x0 load address 0x0000000008000eb8
|
||||
.igot.plt 0x000000002000000c 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
0x000000002000000c . = ALIGN (0x4)
|
||||
|
||||
.bss 0x0000000020000010 0x24 load address 0x0000000008000e48
|
||||
0x0000000020000010 _sbss = .
|
||||
0x0000000020000010 __bss_start__ = _sbss
|
||||
.bss 0x000000002000000c 0x24 load address 0x0000000008000eb8
|
||||
0x000000002000000c _sbss = .
|
||||
0x000000002000000c __bss_start__ = _sbss
|
||||
*(.bss)
|
||||
.bss 0x0000000020000010 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
.bss 0x000000002000000c 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
|
||||
*(.bss*)
|
||||
.bss.msTicks 0x000000002000002c 0x4 Core/Src/main.o
|
||||
0x000000002000002c msTicks
|
||||
.bss.msTicks 0x0000000020000028 0x4 Core/Src/main.o
|
||||
0x0000000020000028 msTicks
|
||||
.bss.expe 0x000000002000002c 0x1 Core/Src/main.o
|
||||
0x000000002000002c expe
|
||||
.bss.blue_mode
|
||||
0x0000000020000030 0x1 Core/Src/main.o
|
||||
0x0000000020000030 blue_mode
|
||||
0x000000002000002d 0x1 Core/Src/main.o
|
||||
0x000000002000002d blue_mode
|
||||
*(COMMON)
|
||||
0x0000000020000034 . = ALIGN (0x4)
|
||||
*fill* 0x0000000020000031 0x3
|
||||
0x0000000020000034 _ebss = .
|
||||
0x0000000020000034 __bss_end__ = _ebss
|
||||
0x0000000020000030 . = ALIGN (0x4)
|
||||
*fill* 0x000000002000002e 0x2
|
||||
0x0000000020000030 _ebss = .
|
||||
0x0000000020000030 __bss_end__ = _ebss
|
||||
|
||||
._user_heap_stack
|
||||
0x0000000020000034 0x604 load address 0x0000000008000e48
|
||||
0x0000000020000038 . = ALIGN (0x8)
|
||||
*fill* 0x0000000020000034 0x4
|
||||
0x0000000020000030 0x600 load address 0x0000000008000eb8
|
||||
0x0000000020000030 . = ALIGN (0x8)
|
||||
[!provide] PROVIDE (end = .)
|
||||
0x0000000020000038 PROVIDE (_end = .)
|
||||
0x0000000020000238 . = (. + _Min_Heap_Size)
|
||||
*fill* 0x0000000020000038 0x200
|
||||
0x0000000020000638 . = (. + _Min_Stack_Size)
|
||||
*fill* 0x0000000020000238 0x400
|
||||
0x0000000020000638 . = ALIGN (0x8)
|
||||
0x0000000020000030 PROVIDE (_end = .)
|
||||
0x0000000020000230 . = (. + _Min_Heap_Size)
|
||||
*fill* 0x0000000020000030 0x200
|
||||
0x0000000020000630 . = (. + _Min_Stack_Size)
|
||||
*fill* 0x0000000020000230 0x400
|
||||
0x0000000020000630 . = ALIGN (0x8)
|
||||
|
||||
/DISCARD/
|
||||
libc.a(*)
|
||||
|
@ -3862,15 +3860,15 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
|
|||
0x000000000000023a 0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
|
||||
OUTPUT(RealOne.elf elf32-littlearm)
|
||||
|
||||
.debug_info 0x0000000000000000 0x4920
|
||||
.debug_info 0x0000000000000000 0x4bd6
|
||||
.debug_info 0x0000000000000000 0x84a Core/Src/gpio.o
|
||||
.debug_info 0x000000000000084a 0xd0e Core/Src/main.o
|
||||
.debug_info 0x0000000000001558 0x35e Core/Src/stm32l4xx_it.o
|
||||
.debug_info 0x00000000000018b6 0x727 Core/Src/system_stm32l4xx.o
|
||||
.debug_info 0x0000000000001fdd 0x22 Core/Startup/startup_stm32l476rgtx.o
|
||||
.debug_info 0x0000000000001fff 0xc20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
.debug_info 0x0000000000002c1f 0xf6d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.debug_info 0x0000000000003b8c 0xd94 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
.debug_info 0x000000000000084a 0xfc4 Core/Src/main.o
|
||||
.debug_info 0x000000000000180e 0x35e Core/Src/stm32l4xx_it.o
|
||||
.debug_info 0x0000000000001b6c 0x727 Core/Src/system_stm32l4xx.o
|
||||
.debug_info 0x0000000000002293 0x22 Core/Startup/startup_stm32l476rgtx.o
|
||||
.debug_info 0x00000000000022b5 0xc20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
.debug_info 0x0000000000002ed5 0xf6d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.debug_info 0x0000000000003e42 0xd94 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
|
||||
.debug_abbrev 0x0000000000000000 0xd51
|
||||
.debug_abbrev 0x0000000000000000 0x233 Core/Src/gpio.o
|
||||
|
@ -3968,32 +3966,32 @@ OUTPUT(RealOne.elf elf32-littlearm)
|
|||
.debug_macro 0x0000000000025ffb 0x29b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
.debug_macro 0x0000000000026296 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
|
||||
.debug_line 0x0000000000000000 0x40e6
|
||||
.debug_line 0x0000000000000000 0x40fa
|
||||
.debug_line 0x0000000000000000 0x7e6 Core/Src/gpio.o
|
||||
.debug_line 0x00000000000007e6 0xacc Core/Src/main.o
|
||||
.debug_line 0x00000000000012b2 0x855 Core/Src/stm32l4xx_it.o
|
||||
.debug_line 0x0000000000001b07 0x6eb Core/Src/system_stm32l4xx.o
|
||||
.debug_line 0x00000000000021f2 0x87 Core/Startup/startup_stm32l476rgtx.o
|
||||
.debug_line 0x0000000000002279 0x961 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
.debug_line 0x0000000000002bda 0x9e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.debug_line 0x00000000000035c3 0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
.debug_line 0x00000000000007e6 0xae0 Core/Src/main.o
|
||||
.debug_line 0x00000000000012c6 0x855 Core/Src/stm32l4xx_it.o
|
||||
.debug_line 0x0000000000001b1b 0x6eb Core/Src/system_stm32l4xx.o
|
||||
.debug_line 0x0000000000002206 0x87 Core/Startup/startup_stm32l476rgtx.o
|
||||
.debug_line 0x000000000000228d 0x961 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
.debug_line 0x0000000000002bee 0x9e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.debug_line 0x00000000000035d7 0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
|
||||
.debug_str 0x0000000000000000 0xee792
|
||||
.debug_str 0x0000000000000000 0xee8c5
|
||||
.debug_str 0x0000000000000000 0xe3d91 Core/Src/gpio.o
|
||||
0xe4dab (size before relaxing)
|
||||
.debug_str 0x00000000000e3d91 0x8d43 Core/Src/main.o
|
||||
0xed98d (size before relaxing)
|
||||
.debug_str 0x00000000000ecad4 0xad Core/Src/stm32l4xx_it.o
|
||||
.debug_str 0x00000000000e3d91 0x8e76 Core/Src/main.o
|
||||
0xedac0 (size before relaxing)
|
||||
.debug_str 0x00000000000ecc07 0xad Core/Src/stm32l4xx_it.o
|
||||
0xed404 (size before relaxing)
|
||||
.debug_str 0x00000000000ecb81 0x79 Core/Src/system_stm32l4xx.o
|
||||
.debug_str 0x00000000000eccb4 0x79 Core/Src/system_stm32l4xx.o
|
||||
0xe3959 (size before relaxing)
|
||||
.debug_str 0x00000000000ecbfa 0x36 Core/Startup/startup_stm32l476rgtx.o
|
||||
.debug_str 0x00000000000ecd2d 0x36 Core/Startup/startup_stm32l476rgtx.o
|
||||
0x62 (size before relaxing)
|
||||
.debug_str 0x00000000000ecc30 0x9fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
.debug_str 0x00000000000ecd63 0x9fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
|
||||
0xe443d (size before relaxing)
|
||||
.debug_str 0x00000000000ed62a 0x3a6 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
.debug_str 0x00000000000ed75d 0x3a6 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
|
||||
0xe41ad (size before relaxing)
|
||||
.debug_str 0x00000000000ed9d0 0xdc2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
.debug_str 0x00000000000edb03 0xdc2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
|
||||
0xea58d (size before relaxing)
|
||||
|
||||
.comment 0x0000000000000000 0x7b
|
||||
|
|
Loading…
Reference in a new issue