diff --git a/PlaygroundYoupi/.metadata/.ide.log b/PlaygroundYoupi/.metadata/.ide.log index 08e90c4..0b896e0 100644 --- a/PlaygroundYoupi/.metadata/.ide.log +++ b/PlaygroundYoupi/.metadata/.ide.log @@ -946,3 +946,328 @@ 2020-11-18 09:40:28,013 [INFO] Activator:179 - !SESSION log4j initialized +2020-11-18 10:56:32,919 [INFO] Activator:178 - + + +2020-11-18 10:56:32,920 [INFO] Activator:179 - !SESSION log4j initialized +2020-11-18 11:48:39,241 [ERROR] ApiDbMcu:1464 - Can't use Application install path: +2020-11-18 11:48:41,498 [WARN] RulesReader:54 - Compatibility file://mcu/compatibility.xml not found +2020-11-18 11:56:45,843 [INFO] ApplicationProperties:181 - Using Application install path: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824 +2020-11-18 11:56:45,851 [INFO] DbMcusXml:70 - Set database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/mcu/ +2020-11-18 11:56:45,856 [INFO] DbBoardsPdsc:56 - Set plugin database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/boardmanager/ +2020-11-18 11:56:45,856 [INFO] DbMcus:258 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:45,856 [INFO] DbBoards:264 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:45,859 [INFO] DbExamples:326 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:45,865 [INFO] DbMcusDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:45,868 [INFO] DbMcusJson:63 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:45,869 [INFO] DbBoardsDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:45,871 [INFO] DbBoardsJson:56 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:45,907 [INFO] CrossReferenceDbSqlite:196 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/cs/ +2020-11-18 11:56:45,912 [INFO] DbExamplesSqlite:800 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,056 [INFO] MicroXplorer:564 - Detected Java Version = 1.8.0_252 +2020-11-18 11:56:46,056 [INFO] DbMcusXml:70 - Set database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/mcu/ +2020-11-18 11:56:46,057 [INFO] DbBoardsPdsc:56 - Set plugin database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/boardmanager/ +2020-11-18 11:56:46,058 [INFO] DbMcus:258 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,058 [INFO] DbBoards:264 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,058 [INFO] DbExamples:326 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,058 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,059 [INFO] DbMcusDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,059 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,059 [INFO] DbMcusJson:63 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,059 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,060 [INFO] DbBoardsDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,060 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,060 [INFO] DbBoardsJson:56 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,060 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,060 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,061 [INFO] CrossReferenceDbSqlite:196 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/cs/ +2020-11-18 11:56:46,061 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,061 [INFO] DbExamplesSqlite:800 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,163 [INFO] MainPanel:189 - HeapMemory: 682622976 +2020-11-18 11:56:46,236 [INFO] DbMcusXml:70 - Set database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/mcu/ +2020-11-18 11:56:46,236 [INFO] DbBoardsPdsc:56 - Set plugin database path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/boardmanager/ +2020-11-18 11:56:46,237 [INFO] DbMcus:258 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,237 [INFO] DbBoards:264 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,237 [INFO] DbExamples:326 - Set plugin images path to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/plugins/mcufinder/images/ +2020-11-18 11:56:46,238 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,238 [INFO] DbMcusDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,239 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,239 [INFO] DbMcusJson:63 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,239 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,240 [INFO] DbBoardsDocs:112 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,240 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,240 [INFO] DbBoardsJson:56 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,240 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,240 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,241 [INFO] CrossReferenceDbSqlite:196 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/cs/ +2020-11-18 11:56:46,241 [WARN] DbFile:36 - Overriding database path with different value: C:\Users\camer\.stmcufinder\plugins\mcufinder/ => C:\Users\camer\.stmcufinder\plugins\mcufinder +2020-11-18 11:56:46,241 [INFO] DbExamplesSqlite:800 - Set database path to: C:\Users\camer\.stmcufinder\plugins\mcufinder//mcu/ +2020-11-18 11:56:46,260 [INFO] ApplicationProperties:181 - Using Application install path: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824 +2020-11-18 11:56:46,262 [INFO] PluginManage:178 - Search for loadable plugins [exclusion list=, ] +2020-11-18 11:56:46,263 [INFO] PluginManage:292 - Check plugin analytics +2020-11-18 11:56:46,457 [INFO] AnalyticsPlugin:203 - Accepted Software Licenses: +2020-11-18 11:56:46,458 [INFO] AnalyticsPlugin:205 - Accepted CMSIS Pack Licenses: +2020-11-18 11:56:46,459 [INFO] AnalyticsPlugin:207 - Accepted Firmware Licenses: +2020-11-18 11:56:46,460 [INFO] PluginManage:342 - Loaded plugin analytics (category:tool,tabindex:-1) +2020-11-18 11:56:46,460 [INFO] PluginManage:292 - Check plugin clock +2020-11-18 11:56:46,479 [INFO] PluginManage:342 - Loaded plugin clock (category:base,tabindex:2) +2020-11-18 11:56:46,480 [INFO] PluginManage:292 - Check plugin ddr +2020-11-18 11:56:46,484 [INFO] PluginManage:342 - Loaded plugin ddr (category:tool,tabindex:6) +2020-11-18 11:56:46,484 [INFO] PluginManage:292 - Check plugin filemanager +2020-11-18 11:56:46,640 [INFO] PluginManage:342 - Loaded plugin filemanager (category:base,tabindex:10) +2020-11-18 11:56:46,640 [INFO] PluginManage:292 - Check plugin ipmanager +2020-11-18 11:56:46,659 [INFO] PluginManage:342 - Loaded plugin ipmanager (category:base,tabindex:5) +2020-11-18 11:56:46,659 [INFO] PluginManage:292 - Check plugin pinoutandconfiguration +2020-11-18 11:56:46,675 [INFO] PluginManage:342 - Loaded plugin pinoutandconfiguration (category:base,tabindex:1) +2020-11-18 11:56:46,675 [INFO] PluginManage:292 - Check plugin pinoutconfig +2020-11-18 11:56:46,708 [INFO] PluginManage:342 - Loaded plugin pinoutconfig (category:base,tabindex:0) +2020-11-18 11:56:46,708 [INFO] PluginManage:292 - Check plugin power +2020-11-18 11:56:46,717 [INFO] PluginManage:342 - Loaded plugin power (category:power,tabindex:4) +2020-11-18 11:56:46,718 [INFO] PluginManage:292 - Check plugin projectmanager +2020-11-18 11:56:46,738 [INFO] PluginManage:342 - Loaded plugin projectmanager (category:projectmanager,tabindex:3) +2020-11-18 11:56:46,739 [INFO] PluginManage:292 - Check plugin thirdparty +2020-11-18 11:56:46,834 [INFO] ThirdPartyDb:333 - Open Third Party DataBase File (C:/Users/camer/.stm32cubemx/plugins/thirdparty/db/thirdparties_db.xml) : 35 ms. number of Sw pack : 23 +2020-11-18 11:56:46,842 [INFO] PluginManage:342 - Loaded plugin thirdparty (category:base,tabindex:-1) +2020-11-18 11:56:46,842 [INFO] PluginManage:292 - Check plugin tools +2020-11-18 11:56:46,845 [INFO] PluginManage:342 - Loaded plugin tools (category:base,tabindex:7) +2020-11-18 11:56:46,846 [INFO] PluginManage:292 - Check plugin tutovideos +2020-11-18 11:56:47,082 [INFO] PluginManage:342 - Loaded plugin tutovideos (category:base,tabindex:-1) +2020-11-18 11:56:47,083 [INFO] PluginManage:292 - Check plugin updater +2020-11-18 11:56:47,101 [INFO] PluginManage:342 - Loaded plugin updater (category:base,tabindex:12) +2020-11-18 11:56:47,102 [INFO] PluginManage:265 - PluginManage : Loaded plugins [13] +2020-11-18 11:56:47,442 [INFO] PinOutPanel:1418 - setPackage(No Configuration,No Configuration) +2020-11-18 11:56:47,589 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,589 [INFO] PluginManager:200 - loadIPPluginJar : add adc +2020-11-18 11:56:47,593 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,593 [INFO] PluginManager:200 - loadIPPluginJar : add aes +2020-11-18 11:56:47,596 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,597 [INFO] PluginManager:200 - loadIPPluginJar : add can +2020-11-18 11:56:47,599 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,600 [INFO] PluginManager:200 - loadIPPluginJar : add comp +2020-11-18 11:56:47,603 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,603 [INFO] PluginManager:200 - loadIPPluginJar : add cryp +2020-11-18 11:56:47,606 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,606 [INFO] PluginManager:200 - loadIPPluginJar : add dfsdm +2020-11-18 11:56:47,613 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,614 [INFO] PluginManager:200 - loadIPPluginJar : add dma +2020-11-18 11:56:47,616 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,616 [INFO] PluginManager:200 - loadIPPluginJar : add fatfs +2020-11-18 11:56:47,621 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,621 [INFO] PluginManager:200 - loadIPPluginJar : add fmc +2020-11-18 11:56:47,628 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,628 [INFO] PluginManager:200 - loadIPPluginJar : add freertos +2020-11-18 11:56:47,630 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,631 [INFO] PluginManager:200 - loadIPPluginJar : add genericplugin +2020-11-18 11:56:47,634 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,634 [INFO] PluginManager:200 - loadIPPluginJar : add gfxmmu +2020-11-18 11:56:47,645 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,645 [INFO] PluginManager:200 - loadIPPluginJar : add gic +2020-11-18 11:56:47,650 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,650 [INFO] PluginManager:200 - loadIPPluginJar : add gpio +2020-11-18 11:56:47,653 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,653 [INFO] PluginManager:200 - loadIPPluginJar : add gtzc +2020-11-18 11:56:47,656 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,656 [INFO] PluginManager:200 - loadIPPluginJar : add hash +2020-11-18 11:56:47,659 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,660 [INFO] PluginManager:200 - loadIPPluginJar : add i2c +2020-11-18 11:56:47,662 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,663 [INFO] PluginManager:200 - loadIPPluginJar : add i2s +2020-11-18 11:56:47,666 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,667 [INFO] PluginManager:200 - loadIPPluginJar : add ipddr +2020-11-18 11:56:47,668 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,669 [INFO] PluginManager:200 - loadIPPluginJar : add ltdc +2020-11-18 11:56:47,673 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,673 [INFO] PluginManager:200 - loadIPPluginJar : add mdma +2020-11-18 11:56:47,677 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,678 [INFO] PluginManager:200 - loadIPPluginJar : add nvic +2020-11-18 11:56:47,681 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,681 [INFO] PluginManager:200 - loadIPPluginJar : add opamp +2020-11-18 11:56:47,685 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,685 [INFO] PluginManager:200 - loadIPPluginJar : add openamp +2020-11-18 11:56:47,688 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,689 [INFO] PluginManager:200 - loadIPPluginJar : add pdm2pcm +2020-11-18 11:56:47,696 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,700 [INFO] PluginManager:200 - loadIPPluginJar : add plateformsettings +2020-11-18 11:56:47,702 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,702 [INFO] PluginManager:200 - loadIPPluginJar : add quadspi +2020-11-18 11:56:47,706 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,706 [INFO] PluginManager:200 - loadIPPluginJar : add resmgrutility +2020-11-18 11:56:47,710 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,710 [INFO] PluginManager:200 - loadIPPluginJar : add sai +2020-11-18 11:56:47,714 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,714 [INFO] PluginManager:200 - loadIPPluginJar : add spi +2020-11-18 11:56:47,720 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,720 [INFO] PluginManager:200 - loadIPPluginJar : add stm32_wpan +2020-11-18 11:56:47,723 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,723 [INFO] PluginManager:200 - loadIPPluginJar : add tim +2020-11-18 11:56:47,728 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,728 [INFO] PluginManager:200 - loadIPPluginJar : add touchsensing +2020-11-18 11:56:47,731 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,732 [INFO] PluginManager:200 - loadIPPluginJar : add tracer_emb +2020-11-18 11:56:47,734 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,735 [INFO] PluginManager:200 - loadIPPluginJar : add ts +2020-11-18 11:56:47,737 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,738 [INFO] PluginManager:200 - loadIPPluginJar : add tsc +2020-11-18 11:56:47,740 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,741 [INFO] PluginManager:200 - loadIPPluginJar : add ucpd +2020-11-18 11:56:47,745 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:56:47,746 [INFO] PluginManager:200 - loadIPPluginJar : add usart +2020-11-18 11:56:48,726 [INFO] CubeProgrammer:457 - [DDR PANEL] - PathOfProgrammer: null +2020-11-18 11:56:49,727 [FATAL] Updater:282 - Updater called before beeing initialized +2020-11-18 11:56:49,928 [FATAL] Updater:282 - Updater called before beeing initialized +2020-11-18 11:56:49,929 [WARN] ThirdParty:775 - waiting for thirdparty lock release [close project] +2020-11-18 11:56:49,929 [INFO] ThirdParty:777 - entering critical section [close project] +2020-11-18 11:56:49,930 [INFO] ThirdParty:790 - exiting critical section [close project] +2020-11-18 11:56:49,933 [INFO] PinOutPanel:1418 - setPackage(No Configuration,No Configuration) +2020-11-18 11:56:49,934 [FATAL] Updater:282 - Updater called before beeing initialized +2020-11-18 11:56:49,940 [ERROR] Updater:967 - MainUpdater not yet initialized. External WinMGr cannot be set. +2020-11-18 11:56:49,941 [INFO] CubeProgrammer:457 - [DDR PANEL] - PathOfProgrammer: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.win32_1.4.0.202007081208\tools\bin +2020-11-18 11:56:49,945 [INFO] ProgrammerExecThread:148 - [ProgrammerAPI] CubeProgrammer command construction: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.win32_1.4.0.202007081208\tools\bin\STM32_Programmer_CLI.exe -l +2020-11-18 11:56:50,046 [INFO] MainDdrPanel:49 - [DDR PANEL] SETTER - Set cubeProgrammerPath to: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.win32_1.4.0.202007081208\tools\bin +2020-11-18 11:56:50,048 [INFO] Updater:904 - Updater Version found : 6.0.0 +2020-11-18 11:56:50,069 [INFO] ApplicationProperties:181 - Using Application install path: C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824 +2020-11-18 11:56:50,260 [INFO] MainUpdater:2268 - connection check result : 10 +2020-11-18 11:56:50,261 [INFO] MainUpdater:239 - Updater Check For Update Now. +2020-11-18 11:56:50,261 [INFO] MicroXplorer:414 - Change Database Version : DB.6.0.0 +2020-11-18 11:56:50,298 [INFO] CheckServerUpdateThread:102 - End of CheckServer Thread +2020-11-18 11:56:50,368 [INFO] MainUpdater:2268 - connection check result : 10 +2020-11-18 11:56:50,369 [INFO] MainUpdater:2268 - connection check result : 10 +2020-11-18 11:56:50,474 [INFO] MicroXplorer:384 - Change Database Path : +2020-11-18 11:56:50,475 [INFO] MicroXplorer:414 - Change Database Version : DB.6.0.0 +2020-11-18 11:56:50,475 [WARN] ThirdParty:775 - waiting for thirdparty lock release [close project] +2020-11-18 11:56:50,476 [INFO] ThirdParty:777 - entering critical section [close project] +2020-11-18 11:56:50,476 [INFO] ThirdParty:790 - exiting critical section [close project] +2020-11-18 11:56:50,480 [INFO] PinOutPanel:1418 - setPackage(No Configuration,No Configuration) +2020-11-18 11:56:50,481 [INFO] UtilMem:74 - Begin LoadConfig() Used Memory: 482966912 Bytes (682622976) +2020-11-18 11:56:50,483 [INFO] MicroXplorer:384 - Change Database Path : +2020-11-18 11:56:50,483 [INFO] MicroXplorer:414 - Change Database Version : DB.6.0.0 +2020-11-18 11:56:50,483 [INFO] OpenFileManager:274 - Change cursor +2020-11-18 11:56:52,845 [WARN] IntegrityCheckThread:61 - waiting for thirdparty lock release [integrity check] +2020-11-18 11:56:52,845 [INFO] IntegrityCheckThread:63 - entering critical section [integrity check] +2020-11-18 11:56:52,937 [INFO] ThirdPartyDb:299 - Save Third Party DataBase File (C:/Users/camer/.stm32cubemx/plugins/thirdparty/db/thirdparties_db.xml) [forced] +2020-11-18 11:56:53,053 [INFO] ThirdPartyDb:299 - Save Third Party DataBase File (C:/Users/camer/.stm32cubemx/plugins/thirdparty/db/thirdparties_db.xml) [forced] +2020-11-18 11:56:53,095 [INFO] IntegrityCheckThread:76 - exiting critical section [integrity check] +2020-11-18 11:56:53,095 [INFO] IntegrityCheckThread:79 - End integrity checks thread +2020-11-18 11:56:55,489 [WARN] ApiManager:274 - Cannot register API 'Board Extension:IKS01A3' from pack STMicroelectronics.X-CUBE-MEMS1.8.1.1: no header file found +2020-11-18 11:56:55,490 [WARN] ApiManager:274 - Cannot register API 'Board Extension:IKS01A2' from pack STMicroelectronics.X-CUBE-MEMS1.8.1.1: no header file found +2020-11-18 11:56:55,490 [WARN] ApiManager:274 - Cannot register API 'Board Extension:IKS02A1' from pack STMicroelectronics.X-CUBE-MEMS1.8.1.1: no header file found +2020-11-18 11:56:55,495 [INFO] DependencyParser:915 - This component is not compatible with the current MCU : [1604477466237] +2020-11-18 11:56:55,495 [INFO] ThirdPartyModel:556 - Component with status : MCU_INCOMPATIBLE for condition : GFX01M1_Condition id : 1604477466222 +2020-11-18 11:56:55,496 [INFO] DependencyParser:915 - This component is not compatible with the current MCU : [1604477466237] +2020-11-18 11:56:55,496 [INFO] ThirdPartyModel:556 - Component with status : MCU_INCOMPATIBLE for condition : GFX01M1_HelloWorld_Condition id : 1604477466224 +2020-11-18 11:56:55,498 [INFO] RtosManager:456 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS +2020-11-18 11:56:55,498 [INFO] RtosManager:456 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS +2020-11-18 11:56:55,499 [INFO] RtosManager:456 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS +2020-11-18 11:56:55,499 [INFO] RtosManager:456 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS +2020-11-18 11:56:55,499 [WARN] ModelIntegratedComponent:188 - Missing modes for component 1604477487609 +2020-11-18 11:56:55,501 [WARN] ApiManager:274 - Cannot register API 'Board Extension:GNSS1A1' from pack STMicroelectronics.X-CUBE-GNSS1.5.0.0: no header file found +2020-11-18 11:56:55,501 [WARN] ApiManager:274 - Cannot register API 'Board Support:Custom' from pack STMicroelectronics.X-CUBE-GNSS1.5.0.0: no header file found +2020-11-18 11:56:55,501 [WARN] ApiManager:274 - Cannot register API 'Data Exchange:lib_gnss' from pack STMicroelectronics.X-CUBE-GNSS1.5.0.0: no header file found +2020-11-18 11:56:55,502 [WARN] ApiManager:274 - Cannot register API 'Board Extension:S2868A1' from pack STMicroelectronics.X-CUBE-SUBG2.2.0.0: no header file found +2020-11-18 11:56:55,502 [WARN] ApiManager:274 - Cannot register API 'Board Extension:S2868A2' from pack STMicroelectronics.X-CUBE-SUBG2.2.0.0: no header file found +2020-11-18 11:56:55,502 [WARN] ApiManager:274 - Cannot register API 'Board Extension:S2915A1' from pack STMicroelectronics.X-CUBE-SUBG2.2.0.0: no header file found +2020-11-18 11:56:55,502 [WARN] ApiManager:274 - Cannot register API 'Wireless:BlueNRG-MS' from pack STMicroelectronics.X-CUBE-BLE1.6.0.0: no header file found +2020-11-18 11:56:55,503 [WARN] ApiManager:274 - Cannot register API 'Wireless:BlueNRG-2' from pack STMicroelectronics.X-CUBE-BLE2.3.0.0: no header file found +2020-11-18 11:56:55,670 [INFO] ImportTextPane:162 - (OptionalMessage_ERROR) IP (RCC) : Invalid parameter (FamilyName) +2020-11-18 11:56:56,174 [INFO] UtilMem:74 - End LoadConfig() Used Memory: 459874264 Bytes (721420288) +2020-11-18 11:56:56,177 [INFO] DbMcusXml:100 - Load MCU database from C:\ST\STM32CubeIDE_1.4.0\STM32CubeIDE\plugins\com.st.stm32cube.common.mx_6.0.0.202007160824\\db\/mcu/families.xml +2020-11-18 11:56:56,913 [INFO] DbMcusJson:92 - JSON generation date=Thu Nov 05 17:05:07 CET 2020 (1604592307) +2020-11-18 11:56:58,007 [INFO] DbMcus:175 - Found 1761 MCUs (1722 are supported by CubeMX, 1738 are visible in CubeMX) +2020-11-18 11:56:58,008 [INFO] ApiDb:201 - Load user favorites file C:\Users\camer/.stm32cubemx/favorites.mcus.txt: 0 item(s) +2020-11-18 11:56:58,008 [INFO] ApiDb:205 - User favorites MCUs=[] +2020-11-18 11:56:58,008 [INFO] DbMcus:187 - Set 0 / 0 favorites MCUs +2020-11-18 11:56:58,011 [WARN] ThirdParty:741 - waiting for thirdparty lock release [change project] +2020-11-18 11:56:58,011 [INFO] ThirdParty:743 - entering critical section [change project] +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 8.1.1 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 1.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.1.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 5.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 2.0.0 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2 +2020-11-18 11:56:58,012 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 6.0.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.15.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 5.2.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.0.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 2.0.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0 +2020-11-18 11:56:58,013 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0 +2020-11-18 11:56:58,014 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0 +2020-11-18 11:56:58,014 [INFO] ThirdParty:968 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0 +2020-11-18 11:56:58,014 [INFO] ThirdParty:749 - exiting critical section [change project] +2020-11-18 11:56:58,597 [INFO] PinOutPanel:1418 - setPackage(No Configuration,No Configuration) +2020-11-18 11:56:58,599 [INFO] PinOutPanel:1418 - setPackage(STM32L476RGTx,LQFP64) +2020-11-18 11:56:59,555 [INFO] UtilMem:74 - Before build in PCC Used Memory: 515862920 Bytes (796917760) +2020-11-18 11:57:00,390 [INFO] SharedServices:71 - Folder for power plug-in: C:/Users/camer/.stm32cubemx/plugins/power +2020-11-18 11:57:00,464 [INFO] SharedServices:71 - Folder for power plug-in: C:/Users/camer/.stm32cubemx/plugins/power +2020-11-18 11:57:00,574 [INFO] SharedServices:71 - Folder for power plug-in: C:/Users/camer/.stm32cubemx/plugins/power +2020-11-18 11:57:00,590 [INFO] SharedServices:71 - Folder for power plug-in: C:/Users/camer/.stm32cubemx/plugins/power +2020-11-18 11:57:00,892 [INFO] UtilMem:74 - After build in PCC Used Memory: 577728904 Bytes (796917760) +2020-11-18 11:57:00,925 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,926 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,926 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,926 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,926 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,927 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,927 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,927 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,927 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,927 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,928 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,928 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,928 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,928 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,929 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,929 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,929 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,930 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,930 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,930 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,931 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,931 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,931 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,932 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,932 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,932 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,933 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,933 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,933 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,934 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,934 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,934 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,934 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,935 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,935 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,935 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,935 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,935 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,936 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,937 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,937 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,937 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,937 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,937 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,938 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,939 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,939 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,940 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,940 [INFO] IPUIPlugin:64 - create IPUIPlugin +2020-11-18 11:57:00,992 [INFO] LogOutputStream:76 - [STDOUT_REDIRECT] toolchainItems.length=====1 +2020-11-18 11:57:01,247 [INFO] OpenFileManager:294 - Restore cursor diff --git a/PlaygroundYoupi/.metadata/.log b/PlaygroundYoupi/.metadata/.log index 4564239..96dd015 100644 --- a/PlaygroundYoupi/.metadata/.log +++ b/PlaygroundYoupi/.metadata/.log @@ -643,3 +643,695 @@ Command-line arguments: -os win32 -ws win32 -arch x86_64 !ENTRY com.st.stm32cube.ide.mcu.ide 4 4 2020-11-18 09:40:35.090 !MESSAGE com.st.stm32cube.ide.mcu.ide/META-INF/version/build_ref file not found, build reference will not be reported into properties +!SESSION 2020-11-18 10:56:26.266 ----------------------------------------------- +eclipse.buildId=Version 1.4.0 +java.version=1.8.0_252 +java.vendor=AdoptOpenJDK +BootLoader constants: OS=win32, ARCH=x86_64, WS=win32, NL=en_GB +Command-line arguments: -os win32 -ws win32 -arch x86_64 + +!ENTRY org.eclipse.core.resources 2 10035 2020-11-18 10:56:28.092 +!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes. + +!ENTRY org.eclipse.core.resources 4 567 2020-11-18 10:56:28.203 +!MESSAGE Workspace restored, but some problems occurred. +!SUBENTRY 1 org.eclipse.core.resources 4 567 2020-11-18 10:56:28.203 +!MESSAGE Could not read metadata for 'RealOne'. +!STACK 1 +org.eclipse.core.internal.resources.ResourceException(/RealOne)[567]: java.lang.Exception: The project description file (.project) for 'RealOne' is missing. This file contains important information about the project. The project will not function properly until this file is restored. + at org.eclipse.core.internal.resources.ResourceException.provideStackTrace(ResourceException.java:42) + at org.eclipse.core.internal.resources.ResourceException.(ResourceException.java:38) + at org.eclipse.core.internal.localstore.FileSystemResourceManager.read(FileSystemResourceManager.java:907) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:888) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:868) + at org.eclipse.core.internal.resources.SaveManager.restore(SaveManager.java:724) + at org.eclipse.core.internal.resources.SaveManager.startup(SaveManager.java:1557) + at org.eclipse.core.internal.resources.Workspace.startup(Workspace.java:2454) + at org.eclipse.core.internal.resources.Workspace.open(Workspace.java:2211) + at org.eclipse.core.resources.ResourcesPlugin.start(ResourcesPlugin.java:489) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:842) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:1) + at java.security.AccessController.doPrivileged(Native Method) + at org.eclipse.osgi.internal.framework.BundleContextImpl.startActivator(BundleContextImpl.java:834) + at org.eclipse.osgi.internal.framework.BundleContextImpl.start(BundleContextImpl.java:791) + at org.eclipse.osgi.internal.framework.EquinoxBundle.startWorker0(EquinoxBundle.java:1015) + at org.eclipse.osgi.internal.framework.EquinoxBundle$EquinoxModule.startWorker(EquinoxBundle.java:365) + at org.eclipse.osgi.container.Module.doStart(Module.java:603) + at org.eclipse.osgi.container.Module.start(Module.java:467) + at org.eclipse.osgi.framework.util.SecureAction.start(SecureAction.java:493) + at org.eclipse.osgi.internal.hooks.EclipseLazyStarter.postFindLocalClass(EclipseLazyStarter.java:117) + at org.eclipse.osgi.internal.loader.classpath.ClasspathManager.findLocalClass(ClasspathManager.java:571) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.findLocalClass(ModuleClassLoader.java:330) + at org.eclipse.osgi.internal.loader.BundleLoader.findLocalClass(BundleLoader.java:398) + at org.eclipse.osgi.internal.loader.sources.SingleSourcePackage.loadClass(SingleSourcePackage.java:41) + at org.eclipse.osgi.internal.loader.BundleLoader.findClassInternal(BundleLoader.java:472) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:425) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:417) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.loadClass(ModuleClassLoader.java:155) + at java.lang.ClassLoader.loadClass(ClassLoader.java:351) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:151) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) +!SUBENTRY 2 org.eclipse.core.resources 4 567 2020-11-18 10:56:28.205 +!MESSAGE The project description file (.project) for 'RealOne' is missing. This file contains important information about the project. The project will not function properly until this file is restored. +!STACK 0 +java.lang.Exception: The project description file (.project) for 'RealOne' is missing. This file contains important information about the project. The project will not function properly until this file is restored. + at org.eclipse.core.internal.resources.ResourceException.provideStackTrace(ResourceException.java:42) + at org.eclipse.core.internal.resources.ResourceException.(ResourceException.java:38) + at org.eclipse.core.internal.localstore.FileSystemResourceManager.read(FileSystemResourceManager.java:907) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:888) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:868) + at org.eclipse.core.internal.resources.SaveManager.restore(SaveManager.java:724) + at org.eclipse.core.internal.resources.SaveManager.startup(SaveManager.java:1557) + at org.eclipse.core.internal.resources.Workspace.startup(Workspace.java:2454) + at org.eclipse.core.internal.resources.Workspace.open(Workspace.java:2211) + at org.eclipse.core.resources.ResourcesPlugin.start(ResourcesPlugin.java:489) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:842) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:1) + at java.security.AccessController.doPrivileged(Native Method) + at org.eclipse.osgi.internal.framework.BundleContextImpl.startActivator(BundleContextImpl.java:834) + at org.eclipse.osgi.internal.framework.BundleContextImpl.start(BundleContextImpl.java:791) + at org.eclipse.osgi.internal.framework.EquinoxBundle.startWorker0(EquinoxBundle.java:1015) + at org.eclipse.osgi.internal.framework.EquinoxBundle$EquinoxModule.startWorker(EquinoxBundle.java:365) + at org.eclipse.osgi.container.Module.doStart(Module.java:603) + at org.eclipse.osgi.container.Module.start(Module.java:467) + at org.eclipse.osgi.framework.util.SecureAction.start(SecureAction.java:493) + at org.eclipse.osgi.internal.hooks.EclipseLazyStarter.postFindLocalClass(EclipseLazyStarter.java:117) + at org.eclipse.osgi.internal.loader.classpath.ClasspathManager.findLocalClass(ClasspathManager.java:571) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.findLocalClass(ModuleClassLoader.java:330) + at org.eclipse.osgi.internal.loader.BundleLoader.findLocalClass(BundleLoader.java:398) + at org.eclipse.osgi.internal.loader.sources.SingleSourcePackage.loadClass(SingleSourcePackage.java:41) + at org.eclipse.osgi.internal.loader.BundleLoader.findClassInternal(BundleLoader.java:472) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:425) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:417) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.loadClass(ModuleClassLoader.java:155) + at java.lang.ClassLoader.loadClass(ClassLoader.java:351) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:151) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) +!SUBENTRY 1 org.eclipse.core.resources 4 567 2020-11-18 10:56:28.206 +!MESSAGE Could not read metadata for 'RemoteSystemsTempFiles'. +!STACK 1 +org.eclipse.core.internal.resources.ResourceException(/RemoteSystemsTempFiles)[567]: java.lang.Exception: The project description file (.project) for 'RemoteSystemsTempFiles' is missing. This file contains important information about the project. The project will not function properly until this file is restored. + at org.eclipse.core.internal.resources.ResourceException.provideStackTrace(ResourceException.java:42) + at org.eclipse.core.internal.resources.ResourceException.(ResourceException.java:38) + at org.eclipse.core.internal.localstore.FileSystemResourceManager.read(FileSystemResourceManager.java:907) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:888) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:868) + at org.eclipse.core.internal.resources.SaveManager.restore(SaveManager.java:724) + at org.eclipse.core.internal.resources.SaveManager.startup(SaveManager.java:1557) + at org.eclipse.core.internal.resources.Workspace.startup(Workspace.java:2454) + at org.eclipse.core.internal.resources.Workspace.open(Workspace.java:2211) + at org.eclipse.core.resources.ResourcesPlugin.start(ResourcesPlugin.java:489) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:842) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:1) + at java.security.AccessController.doPrivileged(Native Method) + at org.eclipse.osgi.internal.framework.BundleContextImpl.startActivator(BundleContextImpl.java:834) + at org.eclipse.osgi.internal.framework.BundleContextImpl.start(BundleContextImpl.java:791) + at org.eclipse.osgi.internal.framework.EquinoxBundle.startWorker0(EquinoxBundle.java:1015) + at org.eclipse.osgi.internal.framework.EquinoxBundle$EquinoxModule.startWorker(EquinoxBundle.java:365) + at org.eclipse.osgi.container.Module.doStart(Module.java:603) + at org.eclipse.osgi.container.Module.start(Module.java:467) + at org.eclipse.osgi.framework.util.SecureAction.start(SecureAction.java:493) + at org.eclipse.osgi.internal.hooks.EclipseLazyStarter.postFindLocalClass(EclipseLazyStarter.java:117) + at org.eclipse.osgi.internal.loader.classpath.ClasspathManager.findLocalClass(ClasspathManager.java:571) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.findLocalClass(ModuleClassLoader.java:330) + at org.eclipse.osgi.internal.loader.BundleLoader.findLocalClass(BundleLoader.java:398) + at org.eclipse.osgi.internal.loader.sources.SingleSourcePackage.loadClass(SingleSourcePackage.java:41) + at org.eclipse.osgi.internal.loader.BundleLoader.findClassInternal(BundleLoader.java:472) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:425) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:417) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.loadClass(ModuleClassLoader.java:155) + at java.lang.ClassLoader.loadClass(ClassLoader.java:351) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:151) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) +!SUBENTRY 2 org.eclipse.core.resources 4 567 2020-11-18 10:56:28.206 +!MESSAGE The project description file (.project) for 'RemoteSystemsTempFiles' is missing. This file contains important information about the project. The project will not function properly until this file is restored. +!STACK 0 +java.lang.Exception: The project description file (.project) for 'RemoteSystemsTempFiles' is missing. This file contains important information about the project. The project will not function properly until this file is restored. + at org.eclipse.core.internal.resources.ResourceException.provideStackTrace(ResourceException.java:42) + at org.eclipse.core.internal.resources.ResourceException.(ResourceException.java:38) + at org.eclipse.core.internal.localstore.FileSystemResourceManager.read(FileSystemResourceManager.java:907) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:888) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:868) + at org.eclipse.core.internal.resources.SaveManager.restore(SaveManager.java:724) + at org.eclipse.core.internal.resources.SaveManager.startup(SaveManager.java:1557) + at org.eclipse.core.internal.resources.Workspace.startup(Workspace.java:2454) + at org.eclipse.core.internal.resources.Workspace.open(Workspace.java:2211) + at org.eclipse.core.resources.ResourcesPlugin.start(ResourcesPlugin.java:489) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:842) + at org.eclipse.osgi.internal.framework.BundleContextImpl$3.run(BundleContextImpl.java:1) + at java.security.AccessController.doPrivileged(Native Method) + at org.eclipse.osgi.internal.framework.BundleContextImpl.startActivator(BundleContextImpl.java:834) + at org.eclipse.osgi.internal.framework.BundleContextImpl.start(BundleContextImpl.java:791) + at org.eclipse.osgi.internal.framework.EquinoxBundle.startWorker0(EquinoxBundle.java:1015) + at org.eclipse.osgi.internal.framework.EquinoxBundle$EquinoxModule.startWorker(EquinoxBundle.java:365) + at org.eclipse.osgi.container.Module.doStart(Module.java:603) + at org.eclipse.osgi.container.Module.start(Module.java:467) + at org.eclipse.osgi.framework.util.SecureAction.start(SecureAction.java:493) + at org.eclipse.osgi.internal.hooks.EclipseLazyStarter.postFindLocalClass(EclipseLazyStarter.java:117) + at org.eclipse.osgi.internal.loader.classpath.ClasspathManager.findLocalClass(ClasspathManager.java:571) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.findLocalClass(ModuleClassLoader.java:330) + at org.eclipse.osgi.internal.loader.BundleLoader.findLocalClass(BundleLoader.java:398) + at org.eclipse.osgi.internal.loader.sources.SingleSourcePackage.loadClass(SingleSourcePackage.java:41) + at org.eclipse.osgi.internal.loader.BundleLoader.findClassInternal(BundleLoader.java:472) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:425) + at org.eclipse.osgi.internal.loader.BundleLoader.findClass(BundleLoader.java:417) + at org.eclipse.osgi.internal.loader.ModuleClassLoader.loadClass(ModuleClassLoader.java:155) + at java.lang.ClassLoader.loadClass(ClassLoader.java:351) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:151) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2020-11-18 10:56:32.911 +!MESSAGE Log4j initialized with config file C:\Users\camer\Desktop\LoPoSo\PlaygroundYoupi\.metadata\.log4j.xml + +!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2020-11-18 10:56:38.849 +!MESSAGE Started RMI Server, listening on port 41337 + +!ENTRY com.st.stm32cube.ide.mcu.ide 4 4 2020-11-18 10:56:39.489 +!MESSAGE com.st.stm32cube.ide.mcu.ide/META-INF/version/build_ref file not found, build reference will not be reported into properties + +!ENTRY org.eclipse.core.resources 4 567 2020-11-18 10:57:22.236 +!MESSAGE The project description file (.project) for 'RealOne' is missing. This file contains important information about the project. The project will not function properly until this file is restored. +!STACK 0 +java.lang.Exception: The project description file (.project) for 'RealOne' is missing. This file contains important information about the project. The project will not function properly until this file is restored. + at org.eclipse.core.internal.resources.ResourceException.provideStackTrace(ResourceException.java:42) + at org.eclipse.core.internal.resources.ResourceException.(ResourceException.java:38) + at org.eclipse.core.internal.localstore.FileSystemResourceManager.read(FileSystemResourceManager.java:907) + at org.eclipse.core.internal.resources.SaveManager.restoreMetaInfo(SaveManager.java:888) + at org.eclipse.core.internal.resources.SaveManager.restore(SaveManager.java:763) + at org.eclipse.core.internal.resources.Project.open(Project.java:1056) + at org.eclipse.core.internal.resources.Project.open(Project.java:1102) + at org.eclipse.ui.actions.OpenResourceAction$1.doOpenWithReferences(OpenResourceAction.java:233) + at org.eclipse.ui.actions.OpenResourceAction$1.runInWorkspace(OpenResourceAction.java:279) + at org.eclipse.core.internal.resources.InternalWorkspaceJob.run(InternalWorkspaceJob.java:42) + at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) + +!ENTRY org.eclipse.cdt.core 1 0 2020-11-18 10:57:58.147 +!MESSAGE Indexed 'RealOne' (29 sources, 119 headers) in 6.29 sec: 11,563 declarations; 57,597 references; 3 unresolved inclusions; 29 syntax errors; 172 unresolved names (0.25%) + +!ENTRY org.eclipse.jface 2 0 2020-11-18 10:58:26.316 +!MESSAGE Ignored reentrant call while viewer is busy. This is only logged once per viewer instance, but similar calls will still be ignored. +!STACK 0 +java.lang.RuntimeException + at org.eclipse.jface.viewers.ColumnViewer.checkBusy(ColumnViewer.java:764) + at org.eclipse.jface.viewers.ColumnViewer.update(ColumnViewer.java:543) + at org.eclipse.ui.navigator.CommonViewer.update(CommonViewer.java:512) + at org.eclipse.jface.viewers.StructuredViewer.update(StructuredViewer.java:1965) + at org.eclipse.ui.internal.navigator.resources.nested.NestedProjectsLabelProvider.lambda$2(NestedProjectsLabelProvider.java:87) + at java.util.concurrent.CompletableFuture.uniAccept(CompletableFuture.java:670) + at java.util.concurrent.CompletableFuture$UniAccept.tryFire(CompletableFuture.java:646) + at java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:488) + at java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1609) + at java.util.concurrent.CompletableFuture$AsyncSupply.exec(CompletableFuture.java:1596) + at java.util.concurrent.ForkJoinTask.doExec(ForkJoinTask.java:289) + at java.util.concurrent.ForkJoinPool$WorkQueue.runTask(ForkJoinPool.java:1056) + at java.util.concurrent.ForkJoinPool.runWorker(ForkJoinPool.java:1692) + at java.util.concurrent.ForkJoinWorkerThread.run(ForkJoinWorkerThread.java:157) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 11:39:14.450 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui 4 4 2020-11-18 11:48:39.089 +!MESSAGE Unable to create part +!STACK 1 +org.eclipse.ui.PartInitException: Invalid Input: Must be project's active .ioc file. + +Project's 'RealOne' active one is 'RealOne.ioc' file + at com.st.stm32cube.common.mx.editor.CubeMxEditor.init(CubeMxEditor.java:795) + at org.eclipse.ui.internal.EditorReference.initialize(EditorReference.java:353) + at org.eclipse.ui.internal.e4.compatibility.CompatibilityPart.create(CompatibilityPart.java:340) + at sun.reflect.GeneratedMethodAccessor61.invoke(Unknown Source) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.e4.core.internal.di.MethodRequestor.execute(MethodRequestor.java:58) + at org.eclipse.e4.core.internal.di.InjectorImpl.processAnnotated(InjectorImpl.java:998) + at org.eclipse.e4.core.internal.di.InjectorImpl.processAnnotated(InjectorImpl.java:963) + at org.eclipse.e4.core.internal.di.InjectorImpl.internalInject(InjectorImpl.java:139) + at org.eclipse.e4.core.internal.di.InjectorImpl.internalMake(InjectorImpl.java:408) + at org.eclipse.e4.core.internal.di.InjectorImpl.make(InjectorImpl.java:331) + at org.eclipse.e4.core.contexts.ContextInjectionFactory.make(ContextInjectionFactory.java:202) + at org.eclipse.e4.ui.internal.workbench.ReflectionContributionFactory.createFromBundle(ReflectionContributionFactory.java:91) + at org.eclipse.e4.ui.internal.workbench.ReflectionContributionFactory.doCreate(ReflectionContributionFactory.java:60) + at org.eclipse.e4.ui.internal.workbench.ReflectionContributionFactory.create(ReflectionContributionFactory.java:42) + at org.eclipse.e4.ui.workbench.renderers.swt.ContributedPartRenderer.createWidget(ContributedPartRenderer.java:132) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.createWidget(PartRenderingEngine.java:1002) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.safeCreateGui(PartRenderingEngine.java:662) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.safeCreateGui(PartRenderingEngine.java:768) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.access$0(PartRenderingEngine.java:739) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$2.run(PartRenderingEngine.java:733) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.createGui(PartRenderingEngine.java:717) + at org.eclipse.e4.ui.internal.workbench.PartServiceImpl$1.handleEvent(PartServiceImpl.java:107) + at org.eclipse.e4.ui.services.internal.events.UIEventHandler.lambda$0(UIEventHandler.java:38) + at org.eclipse.swt.widgets.Synchronizer.syncExec(Synchronizer.java:236) + at org.eclipse.ui.internal.UISynchronizer.syncExec(UISynchronizer.java:146) + at org.eclipse.swt.widgets.Display.syncExec(Display.java:4622) + at org.eclipse.e4.ui.internal.workbench.swt.E4Application$1.syncExec(E4Application.java:219) + at org.eclipse.e4.ui.services.internal.events.UIEventHandler.handleEvent(UIEventHandler.java:38) + at org.eclipse.equinox.internal.event.EventHandlerWrapper.handleEvent(EventHandlerWrapper.java:205) + at org.eclipse.equinox.internal.event.EventHandlerTracker.dispatchEvent(EventHandlerTracker.java:203) + at org.eclipse.equinox.internal.event.EventHandlerTracker.dispatchEvent(EventHandlerTracker.java:1) + at org.eclipse.osgi.framework.eventmgr.EventManager.dispatchEvent(EventManager.java:234) + at org.eclipse.osgi.framework.eventmgr.ListenerQueue.dispatchEventSynchronous(ListenerQueue.java:151) + at org.eclipse.equinox.internal.event.EventAdminImpl.dispatchEvent(EventAdminImpl.java:132) + at org.eclipse.equinox.internal.event.EventAdminImpl.sendEvent(EventAdminImpl.java:75) + at org.eclipse.equinox.internal.event.EventComponent.sendEvent(EventComponent.java:44) + at org.eclipse.e4.ui.services.internal.events.EventBroker.send(EventBroker.java:55) + at org.eclipse.e4.ui.internal.workbench.UIEventPublisher.notifyChanged(UIEventPublisher.java:63) + at org.eclipse.emf.common.notify.impl.BasicNotifierImpl.eNotify(BasicNotifierImpl.java:424) + at org.eclipse.e4.ui.model.application.ui.impl.ElementContainerImpl.setSelectedElementGen(ElementContainerImpl.java:170) + at org.eclipse.e4.ui.model.application.ui.impl.ElementContainerImpl.setSelectedElement(ElementContainerImpl.java:188) + at org.eclipse.e4.ui.internal.workbench.ModelServiceImpl.showElementInWindow(ModelServiceImpl.java:651) + at org.eclipse.e4.ui.internal.workbench.ModelServiceImpl.bringToTop(ModelServiceImpl.java:615) + at org.eclipse.e4.ui.internal.workbench.PartServiceImpl.delegateBringToTop(PartServiceImpl.java:790) + at org.eclipse.e4.ui.internal.workbench.PartServiceImpl.bringToTop(PartServiceImpl.java:404) + at org.eclipse.e4.ui.internal.workbench.PartServiceImpl.showPart(PartServiceImpl.java:1239) + at org.eclipse.ui.internal.WorkbenchPage.busyOpenEditor(WorkbenchPage.java:3205) + at org.eclipse.ui.internal.WorkbenchPage.lambda$9(WorkbenchPage.java:3110) + at org.eclipse.swt.custom.BusyIndicator.showWhile(BusyIndicator.java:72) + at org.eclipse.ui.internal.WorkbenchPage.openEditor(WorkbenchPage.java:3108) + at org.eclipse.ui.internal.WorkbenchPage.openEditor(WorkbenchPage.java:3078) + at org.eclipse.ui.internal.WorkbenchPage.openEditor(WorkbenchPage.java:3069) + at org.eclipse.ui.ide.IDE.openEditor(IDE.java:570) + at org.eclipse.ui.ide.IDE.openEditor(IDE.java:525) + at org.eclipse.ui.actions.OpenFileAction.openFile(OpenFileAction.java:103) + at org.eclipse.ui.actions.OpenSystemEditorAction.run(OpenSystemEditorAction.java:96) + at org.eclipse.ui.actions.RetargetAction.run(RetargetAction.java:215) + at org.eclipse.ui.navigator.CommonNavigatorManager$1.open(CommonNavigatorManager.java:183) + at org.eclipse.ui.OpenAndLinkWithEditorHelper$InternalListener.open(OpenAndLinkWithEditorHelper.java:48) + at org.eclipse.jface.viewers.StructuredViewer$2.run(StructuredViewer.java:797) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.internal.JFaceUtil.lambda$0(JFaceUtil.java:47) + at org.eclipse.jface.util.SafeRunnable.run(SafeRunnable.java:174) + at org.eclipse.jface.viewers.StructuredViewer.fireOpen(StructuredViewer.java:794) + at org.eclipse.jface.viewers.StructuredViewer.handleOpen(StructuredViewer.java:1110) + at org.eclipse.ui.navigator.CommonViewer.handleOpen(CommonViewer.java:454) + at org.eclipse.jface.util.OpenStrategy.fireOpenEvent(OpenStrategy.java:275) + at org.eclipse.jface.util.OpenStrategy.access$2(OpenStrategy.java:270) + at org.eclipse.jface.util.OpenStrategy$1.handleEvent(OpenStrategy.java:310) + at org.eclipse.swt.widgets.EventTable.sendEvent(EventTable.java:89) + at org.eclipse.swt.widgets.Display.sendEvent(Display.java:4173) + at org.eclipse.swt.widgets.Widget.sendEvent(Widget.java:1057) + at org.eclipse.swt.widgets.Display.runDeferredEvents(Display.java:3986) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3585) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) +!SUBENTRY 1 org.eclipse.ui 4 0 2020-11-18 11:48:39.090 +!MESSAGE Invalid Input: Must be project's active .ioc file. + +Project's 'RealOne' active one is 'RealOne.ioc' file + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 11:59:01.606 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:10:15.986 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:20:45.991 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:21:52.383 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:25:51.024 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:27:22.043 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) + +!ENTRY org.eclipse.ui.workbench.texteditor 4 0 2020-11-18 12:28:18.911 +!MESSAGE +!STACK 0 +java.lang.NullPointerException + at org.eclipse.ui.texteditor.AbstractTextEditor$TextEditorSavable.isDirty(AbstractTextEditor.java:7196) + at org.eclipse.ui.internal.Workbench.getFilteredSaveables(Workbench.java:3472) + at org.eclipse.ui.internal.Workbench.saveAll(Workbench.java:3445) + at org.eclipse.ui.ide.IDE$1.run(IDE.java:1495) + at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:45) + at org.eclipse.ui.ide.IDE.saveAllEditors(IDE.java:1483) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.doSave(SaveScopeResourcesHandler.java:228) + at org.eclipse.debug.internal.ui.launchConfigurations.SaveScopeResourcesHandler.handleStatus(SaveScopeResourcesHandler.java:182) + at org.eclipse.debug.internal.ui.sourcelookup.Prompter.lambda$0(Prompter.java:73) + at org.eclipse.ui.internal.PendingSyncExec.run(PendingSyncExec.java:68) + at org.eclipse.ui.internal.UILockListener.doPendingWork(UILockListener.java:171) + at org.eclipse.ui.internal.UISynchronizer.lambda$0(UISynchronizer.java:152) + at org.eclipse.swt.widgets.RunnableLock.run(RunnableLock.java:40) + at org.eclipse.swt.widgets.Synchronizer.runAsyncMessages(Synchronizer.java:185) + at org.eclipse.swt.widgets.Display.runAsyncMessages(Display.java:3961) + at org.eclipse.swt.widgets.Display.readAndDispatch(Display.java:3588) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine$5.run(PartRenderingEngine.java:1160) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.e4.ui.internal.workbench.swt.PartRenderingEngine.run(PartRenderingEngine.java:1049) + at org.eclipse.e4.ui.internal.workbench.E4Workbench.createAndRunUI(E4Workbench.java:155) + at org.eclipse.ui.internal.Workbench.lambda$3(Workbench.java:633) + at org.eclipse.core.databinding.observable.Realm.runWithDefault(Realm.java:338) + at org.eclipse.ui.internal.Workbench.createAndRunWorkbench(Workbench.java:557) + at org.eclipse.ui.PlatformUI.createAndRunWorkbench(PlatformUI.java:150) + at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:150) + at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137) + at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400) + at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255) + at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) + at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) + at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) + at java.lang.reflect.Method.invoke(Method.java:498) + at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:660) + at org.eclipse.equinox.launcher.Main.basicRun(Main.java:597) + at org.eclipse.equinox.launcher.Main.run(Main.java:1468) diff --git a/PlaygroundYoupi/.metadata/.plugins/com.st.stm32cube.ide.mcu.livewatch/params.dat b/PlaygroundYoupi/.metadata/.plugins/com.st.stm32cube.ide.mcu.livewatch/params.dat deleted file mode 100644 index 92f80e6..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/com.st.stm32cube.ide.mcu.livewatch/params.dat +++ /dev/null @@ -1 +0,0 @@ -NUMBER_FORMAT=0 diff --git a/PlaygroundYoupi/.metadata/.plugins/com.st.stm32cube.ide.mcu.livewatch/saved_expr.dat b/PlaygroundYoupi/.metadata/.plugins/com.st.stm32cube.ide.mcu.livewatch/saved_expr.dat deleted file mode 100644 index e69de29..0000000 diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1604569603602.pdom b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1604569603602.pdom deleted file mode 100644 index 4f78b78..0000000 Binary files a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1604569603602.pdom and /dev/null differ diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1605514236092.pdom b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1605514236092.pdom deleted file mode 100644 index 8bee0d3..0000000 Binary files a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.1605514236092.pdom and /dev/null differ diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.language.settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.language.settings.xml deleted file mode 100644 index fceeb51..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/L476_ats_blink-master.language.settings.xml +++ /dev/null @@ -1,5213 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/RealOne.1605693471723.pdom similarity index 67% rename from PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/RealOne.1605601070222.pdom rename to PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/RealOne.1605693471723.pdom index a5b84a0..fcb446b 100644 Binary files a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/RealOne.1605601070222.pdom and b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.core/RealOne.1605693471723.pdom differ diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.dsf.ui/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.dsf.ui/dialog_settings.xml deleted file mode 100644 index 1feea7b..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.dsf.ui/dialog_settings.xml +++ /dev/null @@ -1,9 +0,0 @@ - -
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diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml deleted file mode 100644 index 1cb58a4..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml +++ /dev/null @@ -1,5 +0,0 @@ - -
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diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/L476_ats_blink-master.build.log b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/L476_ats_blink-master.build.log deleted file mode 100644 index e8c07d5..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/L476_ats_blink-master.build.log +++ /dev/null @@ -1,10 +0,0 @@ -10:05:36 **** Incremental Build of configuration Debug for project L476_ats_blink-master **** -make -j8 all -arm-none-eabi-size L476_ats_blink-master.elf - text data bss dec hex filename - 3648 20 1604 5272 1498 L476_ats_blink-master.elf -Finished building: default.size.stdout - - -10:05:37 Build Finished. 0 errors, 0 warnings. (took 260ms) - diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/RealOne.build.log b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/RealOne.build.log index 0cbb227..918a4a8 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/RealOne.build.log +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/RealOne.build.log @@ -1,4 +1,4 @@ -10:00:06 **** Build of configuration Debug for project RealOne **** +12:28:19 **** Incremental Build of configuration Debug for project RealOne **** make -j8 all arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, @@ -29,50 +29,44 @@ In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, #define DATA_CACHE_ENABLE 1U :0:0: note: this is the location of the previous definition -../Core/Src/main.c: In function 'RTC_wakeup_init': -../Core/Src/main.c:297:1: warning: implicit declaration of function 'LL_RTC_DisableWriteProtection'; did you mean 'LL_PWR_DisableSRAM2Retention'? [-Wimplicit-function-declaration] - LL_RTC_DisableWriteProtection( RTC ); - ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - LL_PWR_DisableSRAM2Retention -../Core/Src/main.c:298:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_Disable'; did you mean 'LL_RCC_LSE_Disable'? [-Wimplicit-function-declaration] - LL_RTC_WAKEUP_Disable( RTC ); - ^~~~~~~~~~~~~~~~~~~~~ - LL_RCC_LSE_Disable -../Core/Src/main.c:299:10: warning: implicit declaration of function 'LL_RTC_IsActiveFlag_WUTW'; did you mean 'LL_PWR_IsActiveFlag_WU1'? [-Wimplicit-function-declaration] - while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) - ^~~~~~~~~~~~~~~~~~~~~~~~ - LL_PWR_IsActiveFlag_WU1 -../Core/Src/main.c:302:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_SetClock'; did you mean 'IS_RTC_WAKEUP_CLOCK'? [-Wimplicit-function-declaration] - LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); - ^~~~~~~~~~~~~~~~~~~~~~ - IS_RTC_WAKEUP_CLOCK -../Core/Src/main.c:302:30: error: 'LL_RTC_WAKEUPCLOCK_CKSPRE' undeclared (first use in this function); did you mean 'IS_RTC_WAKEUP_CLOCK'? - LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); - ^~~~~~~~~~~~~~~~~~~~~~~~~ - IS_RTC_WAKEUP_CLOCK -../Core/Src/main.c:302:30: note: each undeclared identifier is reported only once for each function it appears in -../Core/Src/main.c:304:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_SetAutoReload'; did you mean '__HAL_TIM_SetAutoreload'? [-Wimplicit-function-declaration] - LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits - ^~~~~~~~~~~~~~~~~~~~~~~~~~~ - __HAL_TIM_SetAutoreload -../Core/Src/main.c:305:1: warning: implicit declaration of function 'LL_RTC_ClearFlag_WUT'; did you mean 'LL_PWR_ClearFlag_WU1'? [-Wimplicit-function-declaration] - LL_RTC_ClearFlag_WUT(RTC); - ^~~~~~~~~~~~~~~~~~~~ - LL_PWR_ClearFlag_WU1 -../Core/Src/main.c:306:1: warning: implicit declaration of function 'LL_RTC_EnableIT_WUT'; did you mean 'LL_DMA_EnableIT_HT'? [-Wimplicit-function-declaration] - LL_RTC_EnableIT_WUT(RTC); - ^~~~~~~~~~~~~~~~~~~ - LL_DMA_EnableIT_HT -../Core/Src/main.c:307:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_Enable'; did you mean 'LL_RCC_LSE_Enable'? [-Wimplicit-function-declaration] - LL_RTC_WAKEUP_Enable(RTC); - ^~~~~~~~~~~~~~~~~~~~ - LL_RCC_LSE_Enable -../Core/Src/main.c:308:1: warning: implicit declaration of function 'LL_RTC_EnableWriteProtection'; did you mean 'LL_PWR_EnableSRAM2Retention'? [-Wimplicit-function-declaration] - LL_RTC_EnableWriteProtection(RTC); - ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ - LL_PWR_EnableSRAM2Retention -make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1 -"make -j8 all" terminated with exit code 2. Build might be incomplete. +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 5008 20 1572 6600 19c8 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + -10:00:08 Build Failed. 2 errors, 13 warnings. (took 2s.138ms) +12:28:20 Build Finished. 0 errors, 6 warnings. (took 1s.660ms) diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml deleted file mode 100644 index ae4e422..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml +++ /dev/null @@ -1,13 +0,0 @@ - -
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diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log index e756e9f..6067c49 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log @@ -840,3 +840,2296 @@ In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, LL_PWR_EnableSRAM2Retention make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1 "make -j8 all" terminated with exit code 2. Build might be incomplete. +10:58:21 **** Clean-only build of configuration Debug for project RealOne **** +make -j8 clean +rm -rf * + +10:58:22 **** Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:36: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:36: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:36: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:36: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:90: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:87: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:87: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:87: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:87: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:105: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:105: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:105: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:105: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:63: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:63: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:63: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:63: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:106: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:106: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:106: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:106: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:308: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:308: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:308: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:308: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:50: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:26: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:53: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:53: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:53: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:53: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:27: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:27: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:27: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:27: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c:182: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c:182: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c:182: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c:182: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o" +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c:112: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c:112: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c:112: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c:112: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c:187: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c:187: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c:187: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c:187: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c:80: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c:80: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c:80: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c:80: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d" -MT"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o" +arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32l476rgtx.d" -MT"Core/Startup/startup_stm32l476rgtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Startup/startup_stm32l476rgtx.o" "../Core/Startup/startup_stm32l476rgtx.s" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:29, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:29, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:29, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:29, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39:0: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39:0: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:45, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c:39: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc "../Core/Src/gpio.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/gpio.d" -MT"Core/Src/gpio.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/gpio.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:41, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c:20: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:41, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c:20: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:41, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c:20: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:41, + from ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c:20: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:46, + from ../Core/Src/gpio.c:4: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:46, + from ../Core/Src/gpio.c:4: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:46, + from ../Core/Src/gpio.c:4: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:46, + from ../Core/Src/gpio.c:4: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Core/Src/stm32l4xx_hal_msp.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_hal_msp.d" -MT"Core/Src/stm32l4xx_hal_msp.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_hal_msp.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined +arm-none-eabi-gcc "../Core/Src/stm32l4xx_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_it.d" -MT"Core/Src/stm32l4xx_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_it.o" + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Core/Src/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"Core/Src/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/syscalls.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +arm-none-eabi-gcc "../Core/Src/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"Core/Src/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/sysmem.o" +arm-none-eabi-gcc "../Core/Src/system_stm32l4xx.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l4xx.d" -MT"Core/Src/system_stm32l4xx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/system_stm32l4xx.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +../Core/Src/main.c: In function 'RTC_wakeup_init': +../Core/Src/main.c:297:1: warning: implicit declaration of function 'LL_RTC_DisableWriteProtection'; did you mean 'LL_PWR_DisableSRAM2Retention'? [-Wimplicit-function-declaration] + LL_RTC_DisableWriteProtection( RTC ); + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + LL_PWR_DisableSRAM2Retention +../Core/Src/main.c:298:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_Disable'; did you mean 'LL_RCC_LSE_Disable'? [-Wimplicit-function-declaration] + LL_RTC_WAKEUP_Disable( RTC ); + ^~~~~~~~~~~~~~~~~~~~~ + LL_RCC_LSE_Disable +../Core/Src/main.c:299:10: warning: implicit declaration of function 'LL_RTC_IsActiveFlag_WUTW'; did you mean 'LL_PWR_IsActiveFlag_WU1'? [-Wimplicit-function-declaration] + while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + ^~~~~~~~~~~~~~~~~~~~~~~~ + LL_PWR_IsActiveFlag_WU1 +../Core/Src/main.c:302:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_SetClock'; did you mean 'IS_RTC_WAKEUP_CLOCK'? [-Wimplicit-function-declaration] + LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); + ^~~~~~~~~~~~~~~~~~~~~~ + IS_RTC_WAKEUP_CLOCK +../Core/Src/main.c:302:30: error: 'LL_RTC_WAKEUPCLOCK_CKSPRE' undeclared (first use in this function); did you mean 'IS_RTC_WAKEUP_CLOCK'? + LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); + ^~~~~~~~~~~~~~~~~~~~~~~~~ + IS_RTC_WAKEUP_CLOCK +../Core/Src/main.c:302:30: note: each undeclared identifier is reported only once for each function it appears in +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Core/Src/system_stm32l4xx.c:92: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Core/Src/system_stm32l4xx.c:92: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Core/Src/system_stm32l4xx.c:92: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:235, + from ../Core/Src/system_stm32l4xx.c:92: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +../Core/Src/main.c:304:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_SetAutoReload'; did you mean '__HAL_TIM_SetAutoreload'? [-Wimplicit-function-declaration] + LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits + ^~~~~~~~~~~~~~~~~~~~~~~~~~~ + __HAL_TIM_SetAutoreload +../Core/Src/main.c:305:1: warning: implicit declaration of function 'LL_RTC_ClearFlag_WUT'; did you mean 'LL_PWR_ClearFlag_WU1'? [-Wimplicit-function-declaration] + LL_RTC_ClearFlag_WUT(RTC); + ^~~~~~~~~~~~~~~~~~~~ + LL_PWR_ClearFlag_WU1 +../Core/Src/main.c:306:1: warning: implicit declaration of function 'LL_RTC_EnableIT_WUT'; did you mean 'LL_DMA_EnableIT_HT'? [-Wimplicit-function-declaration] + LL_RTC_EnableIT_WUT(RTC); + ^~~~~~~~~~~~~~~~~~~ + LL_DMA_EnableIT_HT +../Core/Src/main.c:307:1: warning: implicit declaration of function 'LL_RTC_WAKEUP_Enable'; did you mean 'LL_RCC_LSE_Enable'? [-Wimplicit-function-declaration] + LL_RTC_WAKEUP_Enable(RTC); + ^~~~~~~~~~~~~~~~~~~~ + LL_RCC_LSE_Enable +../Core/Src/main.c:308:1: warning: implicit declaration of function 'LL_RTC_EnableWriteProtection'; did you mean 'LL_PWR_EnableSRAM2Retention'? [-Wimplicit-function-declaration] + LL_RTC_EnableWriteProtection(RTC); + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ + LL_PWR_EnableSRAM2Retention +make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1 +make: *** Waiting for unfinished jobs.... +"make -j8 all" terminated with exit code 2. Build might be incomplete. +10:59:57 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +arm-none-eabi-gcc "../Core/Src/stm32l4xx_hal_msp.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_hal_msp.d" -MT"Core/Src/stm32l4xx_hal_msp.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_hal_msp.o" +arm-none-eabi-gcc "../Core/Src/stm32l4xx_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_it.d" -MT"Core/Src/stm32l4xx_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_it.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Src/stm32l4xx_hal_msp.c:23:0: +../Core/Inc/main.h:70:13: warning: 'RTC_wakeup_init' declared 'static' but never defined [-Wunused-function] + static void RTC_wakeup_init( int delay ); + ^~~~~~~~~~~~~~~ +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +In file included from ../Core/Src/stm32l4xx_it.c:22:0: +../Core/Inc/main.h:70:13: warning: 'RTC_wakeup_init' declared 'static' but never defined [-Wunused-function] + static void RTC_wakeup_init( int delay ); + ^~~~~~~~~~~~~~~ +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-size RealOne.elf +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" + text data bss dec hex filename + 4036 20 1572 5628 15fc RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +11:00:17 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +arm-none-eabi-gcc "../Core/Src/stm32l4xx_hal_msp.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_hal_msp.d" -MT"Core/Src/stm32l4xx_hal_msp.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_hal_msp.o" +arm-none-eabi-gcc "../Core/Src/stm32l4xx_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_it.d" -MT"Core/Src/stm32l4xx_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/stm32l4xx_it.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_hal_msp.c:23: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/stm32l4xx_it.c:22: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4036 20 1572 5628 15fc RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +11:02:22 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4036 20 1572 5628 15fc RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +11:22:31 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4956 20 1572 6548 1994 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +11:25:55 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4972 20 1572 6564 19a4 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +11:26:16 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4972 20 1572 6564 19a4 RealOne.elf +Finished building: default.size.stdout + +11:36:20 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +11:36:25 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +11:39:14 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +11:43:47 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +11:43:51 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +11:59:01 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4984 20 1572 6576 19b0 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +12:10:16 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4980 20 1572 6572 19ac RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +12:16:54 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +../Core/Src/main.c: In function 'main': +../Core/Src/main.c:141:5: error: expected '}' before 'else' + }else{ + ^~~~ +../Core/Src/main.c:145:5: error: expected ';' before '}' token + } + ^ +make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1 +"make -j8 all" terminated with exit code 2. Build might be incomplete. +12:17:48 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +../Core/Src/main.c: In function 'main': +../Core/Src/main.c:330:13: error: invalid storage class for function 'RTC_wakeup_init' + static void RTC_wakeup_init( int delay ) + ^~~~~~~~~~~~~~~ +../Core/Src/main.c:374:1: error: expected declaration or statement at end of input + } + ^ +At top level: +../Core/Src/main.c:371:6: warning: 'RTC_WKUP_IRQHandler' defined but not used [-Wunused-function] + void RTC_WKUP_IRQHandler() + ^~~~~~~~~~~~~~~~~~~ +../Core/Src/main.c:359:6: warning: 'RTC_wakeup_init_from_stop' defined but not used [-Wunused-function] + void RTC_wakeup_init_from_stop( int delay ) + ^~~~~~~~~~~~~~~~~~~~~~~~~ +../Core/Src/main.c:348:6: warning: 'RTC_wakeup_init_from_standby_or_shutdown' defined but not used [-Wunused-function] + void RTC_wakeup_init_from_standby_or_shutdown( int delay ) + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +../Core/Src/main.c:284:6: warning: 'SystemClock_Config_80M' defined but not used [-Wunused-function] + void SystemClock_Config_80M(void) + ^~~~~~~~~~~~~~~~~~~~~~ +../Core/Src/main.c:219:6: warning: 'SystemClock_Config_24M_LSE' defined but not used [-Wunused-function] + void SystemClock_Config_24M_LSE(void) + ^~~~~~~~~~~~~~~~~~~~~~~~~~ +../Core/Src/main.c:151:6: warning: 'SystemClock_Config_24M_LSE_FL3_VS2' defined but not used [-Wunused-function] + void SystemClock_Config_24M_LSE_FL3_VS2(void){ + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +make: *** [Core/Src/subdir.mk:38: Core/Src/main.o] Error 1 +"make -j8 all" terminated with exit code 2. Build might be incomplete. +12:18:17 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4996 20 1572 6588 19bc RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +12:20:46 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4992 20 1572 6584 19b8 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +12:21:52 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4988 20 1572 6580 19b4 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin + +Finished building: RealOne.list + +12:25:51 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 4992 20 1572 6584 19b8 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +12:27:22 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 5004 20 1572 6596 19c4 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + +12:28:19 **** Incremental Build of configuration Debug for project RealOne **** +make -j8 all +arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o" +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:183:0: warning: "VDD_VALUE" redefined + #define VDD_VALUE 3300U /*!< Value of VDD in mv */ + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:186:0: warning: "PREFETCH_ENABLE" redefined + #define PREFETCH_ENABLE 0U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:187:0: warning: "INSTRUCTION_CACHE_ENABLE" redefined + #define INSTRUCTION_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30:0, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Core/Inc/stm32l4xx_hal_conf.h:188:0: warning: "DATA_CACHE_ENABLE" redefined + #define DATA_CACHE_ENABLE 1U + +:0:0: note: this is the location of the previous definition +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:64:0: warning: "RTC_INIT_MASK" redefined + #define RTC_INIT_MASK 0xFFFFFFFFU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:979:0: note: this is the location of the previous definition + #define RTC_INIT_MASK 0xFFFFFFFFu + +In file included from ../Core/Inc/main.h:42:0, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h:65:0: warning: "RTC_RSF_MASK" redefined + #define RTC_RSF_MASK 0xFFFFFF5FU + +In file included from ../Core/Inc/stm32l4xx_hal_conf.h:409:0, + from ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:30, + from ../Core/Inc/main.h:31, + from ../Core/Src/main.c:8: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:983:0: note: this is the location of the previous definition + #define RTC_RSF_MASK (~(RTC_ISR_INIT | RTC_ISR_RSF)) + +arm-none-eabi-gcc -o "RealOne.elf" @"objects.list" -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\RealOne\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RealOne.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Finished building target: RealOne.elf + +arm-none-eabi-objdump -h -S RealOne.elf > "RealOne.list" +arm-none-eabi-objcopy -O binary RealOne.elf "RealOne.bin" +arm-none-eabi-size RealOne.elf + text data bss dec hex filename + 5008 20 1572 6600 19c8 RealOne.elf +Finished building: default.size.stdout + +Finished building: RealOne.bin +Finished building: RealOne.list + + diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/12/e05539d09029001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/12/e05539d09029001b114bfff082d965b2 new file mode 100644 index 0000000..92c6fb3 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/12/e05539d09029001b114bfff082d965b2 @@ -0,0 +1,372 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/1a/d055de90af28001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/1a/d055de90af28001b1d0af99b6389052e deleted file mode 100644 index 781726d..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/1a/d055de90af28001b1d0af99b6389052e +++ /dev/null @@ -1,217 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ - if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - - //expe = register RTC - expe = RTC->BKP0R; - if (expe == 0){ - expe = 1; - RTC->BKP0R = expe; - }else if (expe != 0 && BLUE_BUTTON()){ - expe ++; - RTC->BKP0R = expe; - } - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } - LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/26/a0b238b08f29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/26/a0b238b08f29001b114bfff082d965b2 new file mode 100644 index 0000000..cba3c70 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/26/a0b238b08f29001b114bfff082d965b2 @@ -0,0 +1,375 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI() + } + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/2b/0002564d8a29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/2b/0002564d8a29001b114bfff082d965b2 new file mode 100644 index 0000000..c8bb5c6 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/2b/0002564d8a29001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + + if (expe > 7) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + __WFI(); + blue_mode = 0; + break; + case 1: + case 3: + case 8: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/36/40d7681a9029001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/36/40d7681a9029001b114bfff082d965b2 new file mode 100644 index 0000000..d9121c2 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/36/40d7681a9029001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3b/c0a8101fb128001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3b/c0a8101fb128001b1d0af99b6389052e deleted file mode 100644 index 04e57e1..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3b/c0a8101fb128001b1d0af99b6389052e +++ /dev/null @@ -1,215 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ - if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - - //expe = register RTC - expe = RTC->BKP0R; - - if (BLUE_BUTTON()){ - expe ++; - RTC->BKP0R = expe; - } - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } - LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - - // config GPIO - GPIO_init(); - - // init systick timer (tick period at 1 ms) - LL_Init1msTick( SystemCoreClock ); - LL_SYSTICK_EnableIT(); - - //Setup Sleep mode - LL_LPM_EnableSleep(); - //LL_LPM_EnableSleepOnExit(); - - while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - // LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3f/00ae52dc8429001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3f/00ae52dc8429001b114bfff082d965b2 new file mode 100644 index 0000000..d0d5c6b --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/3f/00ae52dc8429001b114bfff082d965b2 @@ -0,0 +1,89 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" +#include "stm32l4xx_ll_crs.h" +#include "stm32l4xx_ll_rcc.h" +#include "stm32l4xx_ll_bus.h" +#include "stm32l4xx_ll_system.h" +#include "stm32l4xx_ll_exti.h" +#include "stm32l4xx_ll_cortex.h" +#include "stm32l4xx_ll_utils.h" +#include "stm32l4xx_ll_pwr.h" +#include "stm32l4xx_ll_dma.h" +#include "stm32l4xx_ll_gpio.h" +#include "stm32l4xx_ll_rtc.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "../Src/gpio.h" +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); +void SystemClock_Config_24M_LSE(void); +void SystemClock_Config_24M_LSE_FL3_VS2(void); +void SystemClock_Config_80M(void); +void Init_LSE(void); +static void RTC_wakeup_init( int delay ); +void RTC_wakeup_init_from_standby_or_shutdown( int delay ); +void RTC_wakeup_init_from_stop( int delay ); +void RTC_WKUP_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/43/d07b42e58929001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/43/d07b42e58929001b114bfff082d965b2 new file mode 100644 index 0000000..8f1b8a6 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/43/d07b42e58929001b114bfff082d965b2 @@ -0,0 +1,372 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + + if (expe > 7) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 1: + case 3: + case 5: + case 6: + case 7: + case 8: + __WFI(); + break; + + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/5e/f0de86ebad28001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/5e/f0de86ebad28001b1d0af99b6389052e deleted file mode 100644 index 7c85c90..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/5e/f0de86ebad28001b1d0af99b6389052e +++ /dev/null @@ -1,215 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 2; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ -// if (RCC->BDCR & RCC_BDCR_LSEON) { -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// -// //expe = register RTC -// expe = RTC->BKP0R; -// if (expe == 0){ -// expe = 1; -// RTC->BKP0R = expe; -// }else if (expe != 0 && BLUE_BUTTON()){ -// expe ++; -// RTC->BKP0R = expe; -// } -// }else{ -// SystemClock_Config_24M_LSE(); -// expe = 1; -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// RTC->BKP0R = expe; -// } -// LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/62/90bb79069129001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/62/90bb79069129001b114bfff082d965b2 new file mode 100644 index 0000000..7fcc574 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/62/90bb79069129001b114bfff082d965b2 @@ -0,0 +1,373 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + SystemClock_Config_24M_LSE_FL3_VS2(); + break; + case 8: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/65/c0f25e289129001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/65/c0f25e289129001b114bfff082d965b2 new file mode 100644 index 0000000..2399a73 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/65/c0f25e289129001b114bfff082d965b2 @@ -0,0 +1,375 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_Init1msTick( SystemCoreClock ); + break; + case 8: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6a/90238ac18f29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6a/90238ac18f29001b114bfff082d965b2 new file mode 100644 index 0000000..a254f2d --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6a/90238ac18f29001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } + + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6e/00dce5a28e29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6e/00dce5a28e29001b114bfff082d965b2 new file mode 100644 index 0000000..6b8311e --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/6e/00dce5a28e29001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(10); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + __WFI(); + blue_mode = 0; + break; + case 1: + case 3: + case 8: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE_WUT ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/a1/e0477108b728001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/7/b0023af78729001b114bfff082d965b2 similarity index 58% rename from PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/a1/e0477108b728001b1d0af99b6389052e rename to PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/7/b0023af78729001b114bfff082d965b2 index 90ce987..c239009 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/a1/e0477108b728001b1d0af99b6389052e +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/7/b0023af78729001b114bfff082d965b2 @@ -30,7 +30,7 @@ void SysTick_Handler() msTicks = 0; LED_GREEN(1); } - if(expe == 2){ + if(expe == 2 || expe == 4){ CLK_TOGGLE(); } } @@ -63,7 +63,7 @@ int main(void) expe ++; - if (expe > 2) expe = 1; + if (expe > 7) expe = 1; RTC->BKP0R = expe; } // }else{ @@ -79,6 +79,9 @@ int main(void) /* Configure the system clock */ SystemClock_Config_24M_LSE(); break; + default: //case 3 to 8 + SystemClock_Config_24M_LSE_FL3_VS2(); + break; } @@ -94,17 +97,85 @@ int main(void) if (blue_mode){ switch(expe){ case 1: + case 3: __WFI(); break; + case 2: + case 4: LL_RCC_MSI_EnablePLLMode(); break; + + } } } } +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + /** * @brief System Clock Configuration * @retval None @@ -219,3 +290,50 @@ void SystemClock_Config_80M(void) // Error_Handler(); } } + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/8d/e087c036ae28001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/8d/e087c036ae28001b1d0af99b6389052e deleted file mode 100644 index a16be33..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/8d/e087c036ae28001b1d0af99b6389052e +++ /dev/null @@ -1,215 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 2; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ -// if (RCC->BDCR & RCC_BDCR_LSEON) { -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// -// //expe = register RTC -// expe = RTC->BKP0R; -// if (expe == 0){ -// expe = 1; -// RTC->BKP0R = expe; -// }else if (expe != 0 && BLUE_BUTTON()){ -// expe ++; -// RTC->BKP0R = expe; -// } -// }else{ -// SystemClock_Config_24M_LSE(); -// expe = 1; -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// RTC->BKP0R = expe; -// } -// LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/aa/103a01f08a29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/aa/103a01f08a29001b114bfff082d965b2 new file mode 100644 index 0000000..9bb2a43 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/aa/103a01f08a29001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + __WFI(); + blue_mode = 0; + break; + case 1: + case 3: + case 8: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/af/40857dccb228001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/af/40857dccb228001b1d0af99b6389052e deleted file mode 100644 index dc9f671..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/af/40857dccb228001b1d0af99b6389052e +++ /dev/null @@ -1,218 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ - - - // config GPIO - GPIO_init(); - - if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - - //expe = register RTC - expe = RTC->BKP0R; - - if (BLUE_BUTTON()){ - - expe ++; - - if (expe > 2) expe = 1; - RTC->BKP0R = expe; - } - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } - LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - // init systick timer (tick period at 1 ms) - LL_Init1msTick( SystemCoreClock ); - LL_SYSTICK_EnableIT(); - - //Setup Sleep mode - LL_LPM_EnableSleep(); - //LL_LPM_EnableSleepOnExit(); - - while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - // LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/b/d024d9ddb128001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/b/d024d9ddb128001b1d0af99b6389052e deleted file mode 100644 index b72ad9d..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/b/d024d9ddb128001b1d0af99b6389052e +++ /dev/null @@ -1,215 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ - - - // config GPIO - GPIO_init(); - - if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - - //expe = register RTC - expe = RTC->BKP0R; - - if (BLUE_BUTTON()){ - expe ++; - RTC->BKP0R = expe; - } - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } - LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - // init systick timer (tick period at 1 ms) - LL_Init1msTick( SystemCoreClock ); - LL_SYSTICK_EnableIT(); - - //Setup Sleep mode - LL_LPM_EnableSleep(); - //LL_LPM_EnableSleepOnExit(); - - while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - // LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { - // Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/e5/102e7408b728001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/ba/801b2bd08429001b114bfff082d965b2 similarity index 98% rename from PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/e5/102e7408b728001b1d0af99b6389052e rename to PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/ba/801b2bd08429001b114bfff082d965b2 index dd8d8eb..0543848 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/e5/102e7408b728001b1d0af99b6389052e +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/ba/801b2bd08429001b114bfff082d965b2 @@ -63,6 +63,7 @@ extern "C" { /* Exported functions prototypes ---------------------------------------------*/ void Error_Handler(void); void SystemClock_Config_24M_LSE(void); +void SystemClock_Config_24M_LSE_FL3_VS2(void); void SystemClock_Config_80M(void); void Init_LSE(void); /* USER CODE BEGIN EFP */ diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/bf/005849908f29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/bf/005849908f29001b114bfff082d965b2 new file mode 100644 index 0000000..8c906ba --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/bf/005849908f29001b114bfff082d965b2 @@ -0,0 +1,373 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c2/90b22559b028001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c2/90b22559b028001b1d0af99b6389052e deleted file mode 100644 index b5fc670..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c2/90b22559b028001b1d0af99b6389052e +++ /dev/null @@ -1,215 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ - if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - - //expe = register RTC - expe = RTC->BKP0R; - - if (BLUE_BUTTON()){ - expe ++; - RTC->BKP0R = expe; - - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } - LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/cb/b0b0c2d1ae28001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/cb/b0b0c2d1ae28001b1d0af99b6389052e deleted file mode 100644 index 920491a..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/cb/b0b0c2d1ae28001b1d0af99b6389052e +++ /dev/null @@ -1,217 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 2; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ -// if (RCC->BDCR & RCC_BDCR_LSEON) { -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// -// //expe = register RTC -// expe = RTC->BKP0R; -// if (expe == 0){ -// expe = 1; -// RTC->BKP0R = expe; -// }else if (expe != 0 && BLUE_BUTTON()){ -// expe ++; -// RTC->BKP0R = expe; -// } -// }else{ -// SystemClock_Config_24M_LSE(); -// expe = 1; -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// RTC->BKP0R = expe; -// } -// LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/a026fb419029001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/a026fb419029001b114bfff082d965b2 new file mode 100644 index 0000000..c43ff5f --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/a026fb419029001b114bfff082d965b2 @@ -0,0 +1,373 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + blue_mode = 0; + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + break; + case 8: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_standby_or_shutdown(10); + case 1: + case 3: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + } + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c0/a0303f18b828001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/c0b800278529001b114bfff082d965b2 similarity index 78% rename from PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c0/a0303f18b828001b1d0af99b6389052e rename to PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/c0b800278529001b114bfff082d965b2 index 17e32e2..a6a5c53 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/c0/a0303f18b828001b1d0af99b6389052e +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/d4/c0b800278529001b114bfff082d965b2 @@ -30,7 +30,7 @@ void SysTick_Handler() msTicks = 0; LED_GREEN(1); } - if(expe == 2){ + if(expe == 2 || expe == 4){ CLK_TOGGLE(); } } @@ -290,3 +290,50 @@ void SystemClock_Config_80M(void) // Error_Handler(); } } + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f0/30a6596bae28001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f0/30a6596bae28001b1d0af99b6389052e deleted file mode 100644 index 93bb3ef..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f0/30a6596bae28001b1d0af99b6389052e +++ /dev/null @@ -1,216 +0,0 @@ -/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: - * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. - * The time base is provided by Systick (1000 ticks per second). - * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). - */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -// #if defined(USE_FULL_ASSERT) -// #include "stm32_assert.h" -// #endif /* USE_FULL_ASSERT */ - -#include "gpio.h" - -// systick interrupt handler -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 2; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - if ( BLUE_BUTTON() ){ - blue_mode = 1 ; - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - if (msTicks == 5 * expe){ - LED_GREEN(0); - }else if(msTicks >= 200){ - msTicks = 0; - LED_GREEN(1); - } - if(expe == 2){ - CLK_TOGGLE(); - } -} - - - - -int main(void) -{ -// if (RCC->BDCR & RCC_BDCR_LSEON) { -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// -// //expe = register RTC -// expe = RTC->BKP0R; -// if (expe == 0){ -// expe = 1; -// RTC->BKP0R = expe; -// }else if (expe != 0 && BLUE_BUTTON()){ -// expe ++; -// RTC->BKP0R = expe; -// } -// }else{ -// SystemClock_Config_24M_LSE(); -// expe = 1; -// LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); -// LL_PWR_EnableBkUpAccess(); -// RTC->BKP0R = expe; -// } -// LL_PWR_DisableBkUpAccess(); - switch(expe){ - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - break; - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - break; - } - - - - -// config GPIO -GPIO_init(); - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); -LL_SYSTICK_EnableIT(); - -//Setup Sleep mode -LL_LPM_EnableSleep(); -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - switch(expe){ - case 1: - __WFI(); - break; - case 2: - LL_RCC_MSI_EnablePLLMode(); - break; - } - - } - } -} - -/** - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - - LL_PWR_EnableBkUpAccess(); - LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); -// LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - LL_RCC_EnableRTC(); - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(24000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} - - -void SystemClock_Config_80M(void) -{ - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - LL_RCC_MSI_Enable(); - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - { - - } - LL_RCC_MSI_EnableRangeSelection(); - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - LL_RCC_MSI_SetCalibTrimming(0); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - LL_RCC_PLL_EnableDomain_SYS(); - LL_RCC_PLL_Enable(); - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(80000000); - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { -// Error_Handler(); - } -} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/fd/00deef80b428001b1d0af99b6389052e b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f2/80b0dd708829001b114bfff082d965b2 similarity index 50% rename from PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/fd/00deef80b428001b1d0af99b6389052e rename to PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f2/80b0dd708829001b114bfff082d965b2 index 9572880..ec4cf4f 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/fd/00deef80b428001b1d0af99b6389052e +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f2/80b0dd708829001b114bfff082d965b2 @@ -30,7 +30,7 @@ void SysTick_Handler() msTicks = 0; LED_GREEN(1); } - if(expe == 2){ + if(expe == 2 || expe == 4){ CLK_TOGGLE(); } } @@ -45,37 +45,73 @@ int main(void) // config GPIO GPIO_init(); - if (RCC->BDCR & RCC_BDCR_LSEON) { +// if (RCC->BDCR & RCC_BDCR_LSEON) { LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); LL_PWR_EnableBkUpAccess(); //expe = register RTC expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } if (BLUE_BUTTON()){ expe ++; - if (expe > 2) expe = 1; + if (expe > 7) expe = 1; RTC->BKP0R = expe; } - }else{ - SystemClock_Config_24M_LSE(); - expe = 1; - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - LL_PWR_EnableBkUpAccess(); - RTC->BKP0R = expe; - } +// }else{ + +// } LL_PWR_DisableBkUpAccess(); switch(expe){ case 1: + /* Configure the system clock */ SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); break; case 2: /* Configure the system clock */ SystemClock_Config_24M_LSE(); break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; } @@ -83,25 +119,92 @@ int main(void) LL_Init1msTick( SystemCoreClock ); LL_SYSTICK_EnableIT(); - //Setup Sleep mode - LL_LPM_EnableSleep(); + //LL_LPM_EnableSleepOnExit(); while (1) { if (blue_mode){ switch(expe){ case 1: + case 3: __WFI(); break; + case 2: + case 4: LL_RCC_MSI_EnablePLLMode(); break; + + } } } } +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + /** * @brief System Clock Configuration * @retval None @@ -216,3 +319,50 @@ void SystemClock_Config_80M(void) // Error_Handler(); } } + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f4/7018f0108d29001b114bfff082d965b2 b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f4/7018f0108d29001b114bfff082d965b2 new file mode 100644 index 0000000..79257f8 --- /dev/null +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.history/f4/7018f0108d29001b114bfff082d965b2 @@ -0,0 +1,374 @@ +/* Project L476_ats_blink for STM32L476 mounted on Nucleo board: + * the user LED (mounted on pin PA-5) is flashed every second for 50 ms. + * The time base is provided by Systick (1000 ticks per second). + * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL). + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +// #if defined(USE_FULL_ASSERT) +// #include "stm32_assert.h" +// #endif /* USE_FULL_ASSERT */ + +#include "gpio.h" + +// systick interrupt handler +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + if ( BLUE_BUTTON() ){ + blue_mode = 1 ; + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 5 * expe){ + LED_GREEN(0); + }else if(msTicks >= 200){ + msTicks = 0; + LED_GREEN(1); + } + if(expe == 2 || expe == 4){ + CLK_TOGGLE(); + } +} + + + + +int main(void) +{ + + + // config GPIO + GPIO_init(); + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + + //expe = register RTC + expe = RTC->BKP0R; + if (expe == 0) { + SystemClock_Config_24M_LSE(); + expe = 1; + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_PWR_EnableBkUpAccess(); + RTC->BKP0R = expe; + } + + if (BLUE_BUTTON()){ + + expe ++; + + if (expe > 8) expe = 1; + RTC->BKP0R = expe; + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + switch(expe){ + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); + break; + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + break; + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + LL_LPM_EnableDeepSleep(); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + LL_LPM_EnableDeepSleep(); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_stop(20); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + LL_LPM_EnableDeepSleep(); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + RTC_wakeup_init_from_standby_or_shutdown(10); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + LL_LPM_EnableDeepSleep(); + break; + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + switch(expe){ + case 5: + case 6: + case 7: + __WFI(); + blue_mode = 0; + break; + case 1: + case 3: + case 8: + __WFI(); + break; + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + break; + + + } + + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + + LL_PWR_EnableBkUpAccess(); +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + LL_RCC_EnableRTC(); + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(24000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + + +void SystemClock_Config_80M(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_MSI_Enable(); + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + { + + } + LL_RCC_MSI_EnableRangeSelection(); + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + LL_RCC_MSI_SetCalibTrimming(0); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(80000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + // Error_Handler(); + } +} + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ +LL_RTC_DisableWriteProtection( RTC ); +LL_RTC_WAKEUP_Disable( RTC ); +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits +LL_RTC_ClearFlag_WUT(RTC); +LL_RTC_EnableIT_WUT(RTC); +LL_RTC_WAKEUP_Enable(RTC); +LL_RTC_EnableWriteProtection(RTC); +} + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ +RTC_wakeup_init( delay ); +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx +} + +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ +RTC_wakeup_init( delay ); +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); +NVIC_EnableIRQ( RTC_WKUP_IRQn ); +} + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); +} diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.projects/RealOne/.indexes/bf/be/history.index b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.resources/.projects/RealOne/.indexes/bf/be/history.index index 8a48e01..3a87914 100644 Binary files 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b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/com.st.stm32cube.common.preferences.prefs deleted file mode 100644 index f30647a..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/com.st.stm32cube.common.preferences.prefs +++ /dev/null @@ -1,3 +0,0 @@ -DeviceConfigurationTool.AskToSwitchToCubeMxPerspective=false -DeviceConfigurationTool.SwitchToCubeMxPerspective=true -eclipse.preferences.version=1 diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs deleted file mode 100644 index c03690a..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs +++ /dev/null @@ -1,7 +0,0 @@ -columnOrderKeyEXE=0,1,2,3,4,5 -columnOrderKeySF=0,1,2,3,4,5 -columnSortDirectionKeyEXE=128 -columnSortDirectionKeySF=128 -eclipse.preferences.version=1 -visibleColumnsKeyEXE=1,1,1,0,0,0 -visibleColumnsKeySF=1,1,0,0,0,0 diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.dsf.ui.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.dsf.ui.prefs deleted file mode 100644 index 2c7c1b9..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.dsf.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -useAnnotationsPrefPage=true diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs index 07872e4..6007d4e 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs @@ -1,3 +1,2 @@ eclipse.preferences.version=1 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diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs deleted file mode 100644 index ee2f4f8..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs +++ /dev/null @@ -1,5 +0,0 @@ -eclipse.preferences.version=1 -spelling_locale=en_GB -spelling_locale_initialized=true -useAnnotationsPrefPage=true -useQuickDiffPrefPage=true diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs index 77207d9..dd78b8d 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs @@ -1,7 +1,5 @@ -//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.debug.gdbjtag.launchConfigurationType=org.eclipse.cdt.debug.gdbjtag.core.dsfLaunchDelegate,debug,; //org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.applicationLaunchType=org.eclipse.cdt.dsf.gdb.launch.localCLaunch,debug,;org.eclipse.cdt.cdi.launch.localCLaunch,run,; //org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.attachLaunchType=org.eclipse.cdt.dsf.gdb.launch.attachCLaunch,debug,; //org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.postmortemLaunchType=org.eclipse.cdt.dsf.gdb.launch.coreCLaunch,debug,; //org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug,; eclipse.preferences.version=1 -prefWatchExpressions=\r\n\r\n\r\n\r\n\r\n\r\n diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs index ece0b02..f83fb63 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs @@ -1,8 +1,3 @@ eclipse.preferences.version=1 -org.eclipse.debug.ui.MemoryView.orientation=0 org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=\r\n\r\n -org.eclipse.debug.ui.user_view_bindings=\r\n\r\n\r\n\r\n\r\n\r\n -pref_state_memento.org.eclipse.debug.ui.ExpressionView=\r\n\r\n\r\n\r\n\r\njava.lang.String\r\n\r\n\r\n\r\n -pref_state_memento.org.eclipse.debug.ui.VariableView=\r\n\r\n\r\n\r\n\r\n\r\n -preferredDetailPanes=NumberFormatPane\:NumberFormatPane|DefaultDetailPane\:DefaultDetailPane| preferredTargets=org.eclipse.cdt.debug.ui.toggleCBreakpointTarget,org.eclipse.cdt.debug.ui.toggleCDynamicPrintfTarget\:org.eclipse.cdt.debug.ui.toggleCBreakpointTarget| diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.launchbar.core.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.launchbar.core.prefs index 371f3d6..682a465 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.launchbar.core.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.launchbar.core.prefs @@ -5,4 +5,3 @@ configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-m eclipse.preferences.version=1 org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-master\ Debug/activeLaunchMode=run org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:L476_ats_blink-master\ Debug/activeLaunchTarget=null\:--- -org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:RealOne\ Debug/activeLaunchMode=run diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs index d7f98a4..65e9cc0 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs @@ -1,4 +1,3 @@ activeuserprofiles=DESKTOP-9AR6HHQ;Team eclipse.preferences.version=1 org.eclipse.rse.systemtype.local.systemType.defaultUserId=camer -useridperkey=DESKTOP-9AR6HHQ.Local\=camer; diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs deleted file mode 100644 index 61f3bb8..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -overviewRuler_migration=migrated_3.1 diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs deleted file mode 100644 index e0a40a4..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs +++ /dev/null @@ -1,6 +0,0 @@ -PROBLEMS_FILTERS_MIGRATE=true -TASKS_FILTERS_MIGRATE=true -eclipse.preferences.version=1 -platformState=1604477333731 -quickStart=false -tipsAndTricks=true diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs index 93b0f03..1ad9b8f 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs @@ -1,4 +1,2 @@ -//org.eclipse.ui.commands/state/com.st.stm32cube.ide.mcu.buildanalyzer.showstate/org.eclipse.ui.commands.radioState=human -//org.eclipse.ui.commands/state/org.eclipse.ui.navigator.resources.nested.changeProjectPresentation/org.eclipse.ui.commands.radioState=false UIActivities.org.eclipse.cdt.debug.dsfgdbActivity=true eclipse.preferences.version=1 diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml deleted file mode 100644 index 09b72d7..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml +++ /dev/null @@ -1,13 +0,0 @@ - -
-
- - - -
-
- - - -
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi index b03bbd7..e387097 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi @@ -1,9 +1,9 @@ - - + + activeSchemeId:org.eclipse.ui.defaultAcceleratorConfiguration ModelMigrationProcessor.001 - + @@ -12,9 +12,9 @@ topLevel shellMaximized - - - + + + persp.actionSet:com.st.stm32cube.ide.mcu.informationcenter.actionSet3 persp.actionSet:org.eclipse.ui.cheatsheets.actionSet @@ -70,70 +70,69 @@ persp.viewSC:com.st.stm32cube.ide.mcu.buildanalyzer.view persp.viewSC:com.st.stm32cube.ide.mcu.stackanalyzer.stackanalyzer.view persp.viewSC:com.st.stm32cube.ide.mcu.sfrview - - - active + + noFocus - + View categoryTag:General - + View categoryTag:C/C++ - + View categoryTag:General - + View categoryTag:General - - - - - + + + + + View categoryTag:General - + View categoryTag:General - + View categoryTag:Make - - - + + + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - - + + View categoryTag:C/C++ - + View categoryTag:C/C++ @@ -142,7 +141,7 @@ - + persp.actionSet:com.st.stm32cube.ide.mcu.informationcenter.actionSet3 persp.actionSet:org.eclipse.ui.cheatsheets.actionSet @@ -159,20 +158,20 @@ persp.actionSet:org.eclipse.debug.ui.launchActionSet persp.newWizSC:com.st.stm32cube.common.projectcreation.ui.stm32projectwizard persp.newWizSC:com.st.stm32cube.common.projectcreation.ui.stm32projectfromiocwizard - - - + + + View categoryTag:General active - - - - - - + + + + + + View categoryTag:Device Configuration Tool @@ -181,7 +180,7 @@ - + persp.actionSet:com.st.stm32cube.ide.mcu.informationcenter.actionSet3 persp.actionSet:org.eclipse.ui.cheatsheets.actionSet @@ -228,116 +227,116 @@ persp.viewSC:com.st.stm32cube.ide.mcu.livewatch.LiveExpressionsView persp.viewSC:com.st.stm32cube.ide.mcu.faultanalyzer.view persp.viewSC:com.st.stm32cube.ide.mcu.sfrview - - - + + + org.eclipse.e4.primaryNavigationStack - + View categoryTag:Debug - + View categoryTag:General - - + + View categoryTag:Debug - - - - + + + + org.eclipse.e4.secondaryNavigationStack - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + Debug - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug @@ -346,1960 +345,1955 @@ - - + + View categoryTag:Help - + View categoryTag:General - + View categoryTag:Help - + View categoryTag:Help - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:Help - - + + org.eclipse.e4.primaryDataStack EditorStack - - + active + + + Editor + removeOnHide + org.eclipse.cdt.ui.editor.CEditor + active + + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - - Editor - removeOnHide - org.eclipse.cdt.ui.editor.asm.AsmEditor - - - + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - + + Editor removeOnHide org.eclipse.cdt.ui.editor.CEditor - - + + Editor removeOnHide - org.eclipse.cdt.ui.editor.CEditor - - - - Editor - removeOnHide - org.eclipse.cdt.ui.editor.CEditor + com.st.stm32cube.common.mx.startCubeMx - + View categoryTag:General - active - + ViewMenu menuContribution:menu - + - + View categoryTag:C/C++ - + View categoryTag:General - + View categoryTag:General - + - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + View categoryTag:Make - + ViewMenu menuContribution:menu - + - + View categoryTag:C/C++ - + ViewMenu menuContribution:menu - + - + View categoryTag:C/C++ - + ViewMenu menuContribution:menu - + - + View categoryTag:Device Configuration Tool - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:General - + View categoryTag:Debug - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - + View categoryTag:Debug - + ViewMenu menuContribution:menu - + - - + + toolbarSeparator - + - + Draggable - + - + toolbarSeparator - + - + Draggable - + toolbarSeparator - + - + Draggable - + Draggable - + Draggable - + Draggable - + toolbarSeparator - + - + Draggable - + - + Draggable - + toolbarSeparator - + - + toolbarSeparator - + - + Draggable - + stretch SHOW_RESTORE_MENU - + Draggable HIDEABLE SHOW_RESTORE_MENU - - + + stretch - + Draggable - + Draggable - - + + TrimStack Draggable - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + - - - - - - - + + + + + + + - - + + - - - - + + + + - - - + + + - - - - - + + + + + - - + + - - + + - - - - - - - - - - + + + + + + + + + + - - + + - - - - - - + + + + + + - - + + - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + platform:win32 - - - - - - + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - - - - + + + + + + + - - - + + + - - - + + + - - - - - - + + + + + + - - - - - - - + + + + + + + - - - - + + + + - - - + + + - - + + platform:win32 - - - - - - + + + + + + - - - - + + + + - - + + - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + - - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - + + - - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Editor removeOnHide - + View categoryTag:Device Configuration Tool - + View categoryTag:C/C++ - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:SWV - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:C/C++ - + View categoryTag:C/C++ - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Make - + View categoryTag:C/C++ - + View categoryTag:C/C++ - + View categoryTag:C/C++ - + View categoryTag:C/C++ - + View categoryTag:C/C++ - + View categoryTag:General - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Debug - + View categoryTag:Help - + View categoryTag:Connections - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:Remote Systems - + View categoryTag:General - + View categoryTag:General - + View categoryTag:Team - + View categoryTag:Team - + View categoryTag:General - + View categoryTag:General - + View categoryTag:Help - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - + View categoryTag:General - - + + glue move_after:PerspectiveSpacer SHOW_RESTORE_MENU - + move_after:Spacer Glue HIDEABLE SHOW_RESTORE_MENU - + glue move_after:SearchField SHOW_RESTORE_MENU - - - - - - - - - - - - - - + + + + + + + + + + + + + + - - - + + + - - - - + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - + + + + - - - - - - - + + + + + + + - - - - - - - - + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + - - - - - - - + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + - - - - + + + + - - - - - - - - - - - - - - + + + + + + + + + + + + + + - - - - - - - - - - - - - + + + + + + + + + + + + + - - - + + + - - + + - - - - - + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.history b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.history index ef251e3..cdfe29b 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.history +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.history @@ -1,3 +1,4 @@ - + + \ No newline at end of file diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.index b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.index index 309d02c..fa0033a 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.index +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2020/11/47/refactorings.index @@ -1,3 +1 @@ -1605514212142 Delete resource 'L476_ats_blink-master' -1605597878223 Delete resource 'L476_ats_blink-master' -1605601055463 Delete resource 'RealOne' +1605693456598 Delete resource 'RealOne' diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml deleted file mode 100644 index dcde5d4..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml +++ /dev/null @@ -1,7 +0,0 @@ - -
-
- - -
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.search/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.search/dialog_settings.xml deleted file mode 100644 index f44eb4b..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.search/dialog_settings.xml +++ /dev/null @@ -1,28 +0,0 @@ - -
-
- -
-
- - - - - - - - - - -
-
- -
-
- - - - - -
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.editors/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.editors/dialog_settings.xml deleted file mode 100644 index 50f1edb..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.editors/dialog_settings.xml +++ /dev/null @@ -1,5 +0,0 @@ - -
-
-
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml index c576a8e..35be43f 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml @@ -3,14 +3,4 @@
-
- - - - - - - - -
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml deleted file mode 100644 index 0b4c833..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml +++ /dev/null @@ -1,23 +0,0 @@ - -
-
- - - - - - - - - - - -
-
- - - - - -
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml deleted file mode 100644 index c7ed1df..0000000 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml +++ /dev/null @@ -1,15 +0,0 @@ - -
-
- - - - - - - - - - -
-
diff --git a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml index 876a933..1a0d41c 100644 --- a/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml +++ b/PlaygroundYoupi/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml @@ -1,4 +1,4 @@ - + \ No newline at end of file diff --git a/PlaygroundYoupi/.metadata/version.ini b/PlaygroundYoupi/.metadata/version.ini index 38dd9d8..0a47047 100644 --- a/PlaygroundYoupi/.metadata/version.ini +++ b/PlaygroundYoupi/.metadata/version.ini @@ -1,3 +1,3 @@ -#Wed Nov 18 09:40:21 CET 2020 +#Wed Nov 18 10:56:27 CET 2020 org.eclipse.core.runtime=2 org.eclipse.platform=4.13.0.v20190916-1045 diff --git a/RealOne/Core/Inc/main.h b/RealOne/Core/Inc/main.h index 0543848..4e4a7a3 100644 --- a/RealOne/Core/Inc/main.h +++ b/RealOne/Core/Inc/main.h @@ -39,6 +39,7 @@ extern "C" { #include "stm32l4xx_ll_pwr.h" #include "stm32l4xx_ll_dma.h" #include "stm32l4xx_ll_gpio.h" +#include "stm32l4xx_ll_rtc.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ @@ -66,6 +67,9 @@ void SystemClock_Config_24M_LSE(void); void SystemClock_Config_24M_LSE_FL3_VS2(void); void SystemClock_Config_80M(void); void Init_LSE(void); +void RTC_wakeup_init_from_standby_or_shutdown( int delay ); +void RTC_wakeup_init_from_stop( int delay ); +void RTC_WKUP_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/RealOne/Core/Src/main.c b/RealOne/Core/Src/main.c index a6a5c53..0550151 100644 --- a/RealOne/Core/Src/main.c +++ b/RealOne/Core/Src/main.c @@ -62,8 +62,8 @@ int main(void) if (BLUE_BUTTON()){ expe ++; - - if (expe > 4) expe = 1; + blue_mode = 0; + if (expe > 8) expe = 1; RTC->BKP0R = expe; } // }else{ @@ -72,15 +72,37 @@ int main(void) LL_PWR_DisableBkUpAccess(); switch(expe){ case 1: + /* Configure the system clock */ SystemClock_Config_80M(); + //Setup Sleep mode + LL_LPM_EnableSleep(); break; case 2: /* Configure the system clock */ SystemClock_Config_24M_LSE(); break; - default: //case 3 to 8 + case 3: SystemClock_Config_24M_LSE_FL3_VS2(); + LL_LPM_EnableSleep(); + break; + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + break; + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + break; + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + break; + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); break; } @@ -89,26 +111,41 @@ int main(void) LL_Init1msTick( SystemCoreClock ); LL_SYSTICK_EnableIT(); - //Setup Sleep mode - LL_LPM_EnableSleep(); + //LL_LPM_EnableSleepOnExit(); while (1) { if (blue_mode){ switch(expe){ + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_stop(20); + __WFI(); + blue_mode = 0; + + SystemClock_Config_24M_LSE_FL3_VS2(); + LL_Init1msTick( SystemCoreClock ); + LL_SYSTICK_EnableIT(); + break; + case 8: + LL_LPM_EnableDeepSleep(); + RTC_wakeup_init_from_standby_or_shutdown(10); case 1: case 3: __WFI(); break; - case 2: case 4: LL_RCC_MSI_EnablePLLMode(); break; - - } - + }else{ + if (expe > 4) { + LL_LPM_EnableSleep(); + __WFI(); + } } } } diff --git a/RealOne/Debug/Core/Src/main.d b/RealOne/Debug/Core/Src/main.d index e034d95..79cd592 100644 --- a/RealOne/Debug/Core/Src/main.d +++ b/RealOne/Debug/Core/Src/main.d @@ -37,6 +37,7 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h \ + ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h \ ../Core/Inc/../Src/gpio.h ../Core/Src/gpio.h ../Core/Inc/main.h: @@ -117,6 +118,8 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h: + ../Core/Inc/../Src/gpio.h: ../Core/Src/gpio.h: diff --git a/RealOne/Debug/Core/Src/main.o b/RealOne/Debug/Core/Src/main.o index e721792..305002e 100644 Binary files a/RealOne/Debug/Core/Src/main.o and b/RealOne/Debug/Core/Src/main.o differ diff --git a/RealOne/Debug/Core/Src/main.su b/RealOne/Debug/Core/Src/main.su index e69de29..05fdf49 100644 --- a/RealOne/Debug/Core/Src/main.su +++ b/RealOne/Debug/Core/Src/main.su @@ -0,0 +1,55 @@ +core_cm4.h:1679:22:__NVIC_EnableIRQ 16 static,ignoring_inline_asm +core_cm4.h:1809:22:__NVIC_SetPriority 16 static +stm32l4xx_ll_rcc.h:2270:22:LL_RCC_LSE_Enable 4 static +stm32l4xx_ll_rcc.h:2316:22:LL_RCC_LSE_SetDriveCapability 16 static +stm32l4xx_ll_rcc.h:2362:26:LL_RCC_LSE_IsReady 4 static +stm32l4xx_ll_rcc.h:2489:22:LL_RCC_MSI_Enable 4 static +stm32l4xx_ll_rcc.h:2509:26:LL_RCC_MSI_IsReady 4 static +stm32l4xx_ll_rcc.h:2523:22:LL_RCC_MSI_EnablePLLMode 4 static +stm32l4xx_ll_rcc.h:2548:22:LL_RCC_MSI_EnableRangeSelection 4 static +stm32l4xx_ll_rcc.h:2581:22:LL_RCC_MSI_SetRange 16 static +stm32l4xx_ll_rcc.h:2656:22:LL_RCC_MSI_SetCalibTrimming 16 static +stm32l4xx_ll_rcc.h:2742:22:LL_RCC_SetSysClkSource 16 static +stm32l4xx_ll_rcc.h:2756:26:LL_RCC_GetSysClkSource 4 static +stm32l4xx_ll_rcc.h:2776:22:LL_RCC_SetAHBPrescaler 16 static +stm32l4xx_ll_rcc.h:2792:22:LL_RCC_SetAPB1Prescaler 16 static +stm32l4xx_ll_rcc.h:2808:22:LL_RCC_SetAPB2Prescaler 16 static +stm32l4xx_ll_rcc.h:3650:22:LL_RCC_SetRTCClockSource 16 static +stm32l4xx_ll_rcc.h:3674:22:LL_RCC_EnableRTC 4 static +stm32l4xx_ll_rcc.h:3714:22:LL_RCC_ReleaseBackupDomainReset 4 static +stm32l4xx_ll_rcc.h:3733:22:LL_RCC_PLL_Enable 4 static +stm32l4xx_ll_rcc.h:3754:26:LL_RCC_PLL_IsReady 4 static +stm32l4xx_ll_rcc.h:3800:22:LL_RCC_PLL_ConfigDomain_SYS 24 static +stm32l4xx_ll_rcc.h:4178:22:LL_RCC_PLL_EnableDomain_SYS 4 static +stm32l4xx_ll_bus.h:1089:22:LL_APB1_GRP1_EnableClock 24 static +stm32l4xx_ll_system.h:1400:22:LL_FLASH_SetLatency 16 static +stm32l4xx_ll_system.h:1428:26:LL_FLASH_GetLatency 4 static +stm32l4xx_ll_exti.h:306:22:LL_EXTI_EnableIT_0_31 16 static +stm32l4xx_ll_exti.h:739:22:LL_EXTI_EnableRisingTrig_0_31 16 static +stm32l4xx_ll_exti.h:1299:22:LL_EXTI_ClearFlag_0_31 16 static +stm32l4xx_ll_cortex.h:272:22:LL_SYSTICK_EnableIT 4 static +stm32l4xx_ll_cortex.h:310:22:LL_LPM_EnableSleep 4 static +stm32l4xx_ll_cortex.h:321:22:LL_LPM_EnableDeepSleep 4 static +stm32l4xx_ll_pwr.h:344:22:LL_PWR_SetRegulVoltageScaling 16 static +stm32l4xx_ll_pwr.h:398:22:LL_PWR_EnableBkUpAccess 4 static +stm32l4xx_ll_pwr.h:408:22:LL_PWR_DisableBkUpAccess 4 static +stm32l4xx_ll_pwr.h:434:22:LL_PWR_SetPowerMode 16 static +stm32l4xx_ll_pwr.h:714:22:LL_PWR_EnableInternWU 4 static +stm32l4xx_ll_rtc.h:1049:23:LL_RTC_EnableWriteProtection 16 static +stm32l4xx_ll_rtc.h:1060:23:LL_RTC_DisableWriteProtection 16 static +stm32l4xx_ll_rtc.h:2921:23:LL_RTC_WAKEUP_Enable 16 static +stm32l4xx_ll_rtc.h:2933:23:LL_RTC_WAKEUP_Disable 16 static +stm32l4xx_ll_rtc.h:2964:23:LL_RTC_WAKEUP_SetClock 16 static +stm32l4xx_ll_rtc.h:2994:23:LL_RTC_WAKEUP_SetAutoReload 16 static +stm32l4xx_ll_rtc.h:3452:23:LL_RTC_ClearFlag_WUT 16 static +stm32l4xx_ll_rtc.h:3542:27:LL_RTC_IsActiveFlag_WUTW 16 static +stm32l4xx_ll_rtc.h:3610:23:LL_RTC_EnableIT_WUT 16 static +main.c:20:6:SysTick_Handler 8 static +main.c:41:5:main 8 static,ignoring_inline_asm +main.c:153:6:SystemClock_Config_24M_LSE_FL3_VS2 8 static +main.c:221:6:SystemClock_Config_24M_LSE 8 static +main.c:286:6:SystemClock_Config_80M 8 static +main.c:332:13:RTC_wakeup_init 16 static +main.c:350:6:RTC_wakeup_init_from_standby_or_shutdown 16 static +main.c:361:6:RTC_wakeup_init_from_stop 16 static +main.c:373:6:RTC_WKUP_IRQHandler 8 static diff --git a/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.d b/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.d index c4892aa..418ccdf 100644 --- a/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.d +++ b/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.d @@ -37,6 +37,7 @@ Core/Src/stm32l4xx_hal_msp.o: ../Core/Src/stm32l4xx_hal_msp.c \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h \ + ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h \ ../Core/Inc/../Src/gpio.h ../Core/Inc/main.h: @@ -117,4 +118,6 @@ Core/Src/stm32l4xx_hal_msp.o: ../Core/Src/stm32l4xx_hal_msp.c \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h: + ../Core/Inc/../Src/gpio.h: diff --git a/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.o b/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.o index 07d52e3..547c801 100644 Binary files a/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.o and b/RealOne/Debug/Core/Src/stm32l4xx_hal_msp.o differ diff --git a/RealOne/Debug/Core/Src/stm32l4xx_it.d b/RealOne/Debug/Core/Src/stm32l4xx_it.d index 6573b85..f344cff 100644 --- a/RealOne/Debug/Core/Src/stm32l4xx_it.d +++ b/RealOne/Debug/Core/Src/stm32l4xx_it.d @@ -37,6 +37,7 @@ Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h \ + ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h \ ../Core/Inc/../Src/gpio.h ../Core/Inc/stm32l4xx_it.h ../Core/Inc/main.h: @@ -117,6 +118,8 @@ Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h: + ../Core/Inc/../Src/gpio.h: ../Core/Inc/stm32l4xx_it.h: diff --git a/RealOne/Debug/Core/Src/stm32l4xx_it.o b/RealOne/Debug/Core/Src/stm32l4xx_it.o index 89f9afb..fa4db06 100644 Binary files a/RealOne/Debug/Core/Src/stm32l4xx_it.o and b/RealOne/Debug/Core/Src/stm32l4xx_it.o differ diff --git a/RealOne/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk b/RealOne/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk index 0329ee3..e0db8b4 100644 --- a/RealOne/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk +++ b/RealOne/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk @@ -24,6 +24,7 @@ C_SRCS += \ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c \ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c \ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c \ +../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c \ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c OBJS += \ @@ -47,6 +48,7 @@ OBJS += \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o \ +./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o C_DEPS += \ @@ -70,6 +72,7 @@ C_DEPS += \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.d \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.d \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d \ +./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.d \ ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d @@ -114,6 +117,8 @@ Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o: ../Drivers/STM32L4xx_HA arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" diff --git a/RealOne/Debug/L476_ats_blink-master.bin b/RealOne/Debug/L476_ats_blink-master.bin deleted file mode 100644 index 893cdf0..0000000 Binary files a/RealOne/Debug/L476_ats_blink-master.bin and /dev/null differ diff --git a/RealOne/Debug/L476_ats_blink-master.elf b/RealOne/Debug/L476_ats_blink-master.elf deleted file mode 100644 index b17cf8d..0000000 Binary files a/RealOne/Debug/L476_ats_blink-master.elf and /dev/null differ diff --git a/RealOne/Debug/L476_ats_blink-master.list b/RealOne/Debug/L476_ats_blink-master.list deleted file mode 100644 index aedb04d..0000000 --- a/RealOne/Debug/L476_ats_blink-master.list +++ /dev/null @@ -1,1647 +0,0 @@ - -L476_ats_blink-master.elf: file format elf32-littlearm - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .isr_vector 00000188 08000000 08000000 00010000 2**0 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00000890 08000188 08000188 00010188 2**2 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000040 08000a18 08000a18 00010a18 2**2 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08000a58 08000a58 00020004 2**0 - CONTENTS - 4 .ARM 00000000 08000a58 08000a58 00020004 2**0 - CONTENTS - 5 .preinit_array 00000000 08000a58 08000a58 00020004 2**0 - CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08000a58 08000a58 00010a58 2**2 - CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08000a5c 08000a5c 00010a5c 2**2 - CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000004 20000000 08000a60 00020000 2**2 - CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000024 20000004 08000a64 00020004 2**2 - ALLOC - 10 ._user_heap_stack 00000600 20000028 08000a64 00020028 2**0 - ALLOC - 11 .ARM.attributes 00000030 00000000 00000000 00020004 2**0 - CONTENTS, READONLY - 12 .debug_info 00002a6f 00000000 00000000 00020034 2**0 - CONTENTS, READONLY, DEBUGGING - 13 .debug_abbrev 0000086e 00000000 00000000 00022aa3 2**0 - CONTENTS, READONLY, DEBUGGING - 14 .debug_aranges 000002f0 00000000 00000000 00023318 2**3 - CONTENTS, READONLY, DEBUGGING - 15 .debug_ranges 00000298 00000000 00000000 00023608 2**3 - CONTENTS, READONLY, DEBUGGING - 16 .debug_macro 0002572e 00000000 00000000 000238a0 2**0 - CONTENTS, READONLY, DEBUGGING - 17 .debug_line 00002b6b 00000000 00000000 00048fce 2**0 - CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000ed85b 00000000 00000000 0004bb39 2**0 - CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 00139394 2**0 - CONTENTS, READONLY - 20 .debug_frame 00000a64 00000000 00000000 00139410 2**2 - CONTENTS, READONLY, DEBUGGING - -Disassembly of section .text: - -08000188 <__do_global_dtors_aux>: - 8000188: b510 push {r4, lr} - 800018a: 4c05 ldr r4, [pc, #20] ; (80001a0 <__do_global_dtors_aux+0x18>) - 800018c: 7823 ldrb r3, [r4, #0] - 800018e: b933 cbnz r3, 800019e <__do_global_dtors_aux+0x16> - 8000190: 4b04 ldr r3, [pc, #16] ; (80001a4 <__do_global_dtors_aux+0x1c>) - 8000192: b113 cbz r3, 800019a <__do_global_dtors_aux+0x12> - 8000194: 4804 ldr r0, [pc, #16] ; (80001a8 <__do_global_dtors_aux+0x20>) - 8000196: f3af 8000 nop.w - 800019a: 2301 movs r3, #1 - 800019c: 7023 strb r3, [r4, #0] - 800019e: bd10 pop {r4, pc} - 80001a0: 20000004 .word 0x20000004 - 80001a4: 00000000 .word 0x00000000 - 80001a8: 08000a00 .word 0x08000a00 - -080001ac : - 80001ac: b508 push {r3, lr} - 80001ae: 4b03 ldr r3, [pc, #12] ; (80001bc ) - 80001b0: b11b cbz r3, 80001ba - 80001b2: 4903 ldr r1, [pc, #12] ; (80001c0 ) - 80001b4: 4803 ldr r0, [pc, #12] ; (80001c4 ) - 80001b6: f3af 8000 nop.w - 80001ba: bd08 pop {r3, pc} - 80001bc: 00000000 .word 0x00000000 - 80001c0: 20000008 .word 0x20000008 - 80001c4: 08000a00 .word 0x08000a00 - -080001c8 : - * - * (*) value not defined in all devices. - * @retval None -*/ -__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) -{ - 80001c8: b480 push {r7} - 80001ca: b085 sub sp, #20 - 80001cc: af00 add r7, sp, #0 - 80001ce: 6078 str r0, [r7, #4] - __IO uint32_t tmpreg; - SET_BIT(RCC->AHB2ENR, Periphs); - 80001d0: 4b08 ldr r3, [pc, #32] ; (80001f4 ) - 80001d2: 6cda ldr r2, [r3, #76] ; 0x4c - 80001d4: 4907 ldr r1, [pc, #28] ; (80001f4 ) - 80001d6: 687b ldr r3, [r7, #4] - 80001d8: 4313 orrs r3, r2 - 80001da: 64cb str r3, [r1, #76] ; 0x4c - /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); - 80001dc: 4b05 ldr r3, [pc, #20] ; (80001f4 ) - 80001de: 6cda ldr r2, [r3, #76] ; 0x4c - 80001e0: 687b ldr r3, [r7, #4] - 80001e2: 4013 ands r3, r2 - 80001e4: 60fb str r3, [r7, #12] - (void)tmpreg; - 80001e6: 68fb ldr r3, [r7, #12] -} - 80001e8: bf00 nop - 80001ea: 3714 adds r7, #20 - 80001ec: 46bd mov sp, r7 - 80001ee: f85d 7b04 ldr.w r7, [sp], #4 - 80001f2: 4770 bx lr - 80001f4: 40021000 .word 0x40021000 - -080001f8 : - * @arg @ref LL_GPIO_MODE_ALTERNATE - * @arg @ref LL_GPIO_MODE_ANALOG - * @retval None - */ -__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode) -{ - 80001f8: b480 push {r7} - 80001fa: b08b sub sp, #44 ; 0x2c - 80001fc: af00 add r7, sp, #0 - 80001fe: 60f8 str r0, [r7, #12] - 8000200: 60b9 str r1, [r7, #8] - 8000202: 607a str r2, [r7, #4] - MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U))); - 8000204: 68fb ldr r3, [r7, #12] - 8000206: 681a ldr r2, [r3, #0] - 8000208: 68bb ldr r3, [r7, #8] - 800020a: 617b str r3, [r7, #20] - uint32_t result; - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800020c: 697b ldr r3, [r7, #20] - 800020e: fa93 f3a3 rbit r3, r3 - 8000212: 613b str r3, [r7, #16] - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return result; - 8000214: 693b ldr r3, [r7, #16] - 8000216: 61bb str r3, [r7, #24] - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - 8000218: 69bb ldr r3, [r7, #24] - 800021a: 2b00 cmp r3, #0 - 800021c: d101 bne.n 8000222 - { - return 32U; - 800021e: 2320 movs r3, #32 - 8000220: e003 b.n 800022a - } - return __builtin_clz(value); - 8000222: 69bb ldr r3, [r7, #24] - 8000224: fab3 f383 clz r3, r3 - 8000228: b2db uxtb r3, r3 - 800022a: 005b lsls r3, r3, #1 - 800022c: 2103 movs r1, #3 - 800022e: fa01 f303 lsl.w r3, r1, r3 - 8000232: 43db mvns r3, r3 - 8000234: 401a ands r2, r3 - 8000236: 68bb ldr r3, [r7, #8] - 8000238: 623b str r3, [r7, #32] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800023a: 6a3b ldr r3, [r7, #32] - 800023c: fa93 f3a3 rbit r3, r3 - 8000240: 61fb str r3, [r7, #28] - return result; - 8000242: 69fb ldr r3, [r7, #28] - 8000244: 627b str r3, [r7, #36] ; 0x24 - if (value == 0U) - 8000246: 6a7b ldr r3, [r7, #36] ; 0x24 - 8000248: 2b00 cmp r3, #0 - 800024a: d101 bne.n 8000250 - return 32U; - 800024c: 2320 movs r3, #32 - 800024e: e003 b.n 8000258 - return __builtin_clz(value); - 8000250: 6a7b ldr r3, [r7, #36] ; 0x24 - 8000252: fab3 f383 clz r3, r3 - 8000256: b2db uxtb r3, r3 - 8000258: 005b lsls r3, r3, #1 - 800025a: 6879 ldr r1, [r7, #4] - 800025c: fa01 f303 lsl.w r3, r1, r3 - 8000260: 431a orrs r2, r3 - 8000262: 68fb ldr r3, [r7, #12] - 8000264: 601a str r2, [r3, #0] -} - 8000266: bf00 nop - 8000268: 372c adds r7, #44 ; 0x2c - 800026a: 46bd mov sp, r7 - 800026c: f85d 7b04 ldr.w r7, [sp], #4 - 8000270: 4770 bx lr - -08000272 : - * @arg @ref LL_GPIO_OUTPUT_PUSHPULL - * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN - * @retval None - */ -__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType) -{ - 8000272: b480 push {r7} - 8000274: b085 sub sp, #20 - 8000276: af00 add r7, sp, #0 - 8000278: 60f8 str r0, [r7, #12] - 800027a: 60b9 str r1, [r7, #8] - 800027c: 607a str r2, [r7, #4] - MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType)); - 800027e: 68fb ldr r3, [r7, #12] - 8000280: 685a ldr r2, [r3, #4] - 8000282: 68bb ldr r3, [r7, #8] - 8000284: 43db mvns r3, r3 - 8000286: 401a ands r2, r3 - 8000288: 68bb ldr r3, [r7, #8] - 800028a: 6879 ldr r1, [r7, #4] - 800028c: fb01 f303 mul.w r3, r1, r3 - 8000290: 431a orrs r2, r3 - 8000292: 68fb ldr r3, [r7, #12] - 8000294: 605a str r2, [r3, #4] -} - 8000296: bf00 nop - 8000298: 3714 adds r7, #20 - 800029a: 46bd mov sp, r7 - 800029c: f85d 7b04 ldr.w r7, [sp], #4 - 80002a0: 4770 bx lr - -080002a2 : - * @arg @ref LL_GPIO_PIN_15 - * @arg @ref LL_GPIO_PIN_ALL - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) -{ - 80002a2: b480 push {r7} - 80002a4: b083 sub sp, #12 - 80002a6: af00 add r7, sp, #0 - 80002a8: 6078 str r0, [r7, #4] - 80002aa: 6039 str r1, [r7, #0] - return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL); - 80002ac: 687b ldr r3, [r7, #4] - 80002ae: 691a ldr r2, [r3, #16] - 80002b0: 683b ldr r3, [r7, #0] - 80002b2: 4013 ands r3, r2 - 80002b4: 683a ldr r2, [r7, #0] - 80002b6: 429a cmp r2, r3 - 80002b8: d101 bne.n 80002be - 80002ba: 2301 movs r3, #1 - 80002bc: e000 b.n 80002c0 - 80002be: 2300 movs r3, #0 -} - 80002c0: 4618 mov r0, r3 - 80002c2: 370c adds r7, #12 - 80002c4: 46bd mov sp, r7 - 80002c6: f85d 7b04 ldr.w r7, [sp], #4 - 80002ca: 4770 bx lr - -080002cc : - * @arg @ref LL_GPIO_PIN_15 - * @arg @ref LL_GPIO_PIN_ALL - * @retval None - */ -__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) -{ - 80002cc: b480 push {r7} - 80002ce: b083 sub sp, #12 - 80002d0: af00 add r7, sp, #0 - 80002d2: 6078 str r0, [r7, #4] - 80002d4: 6039 str r1, [r7, #0] - WRITE_REG(GPIOx->BSRR, PinMask); - 80002d6: 687b ldr r3, [r7, #4] - 80002d8: 683a ldr r2, [r7, #0] - 80002da: 619a str r2, [r3, #24] -} - 80002dc: bf00 nop - 80002de: 370c adds r7, #12 - 80002e0: 46bd mov sp, r7 - 80002e2: f85d 7b04 ldr.w r7, [sp], #4 - 80002e6: 4770 bx lr - -080002e8 : - * @arg @ref LL_GPIO_PIN_15 - * @arg @ref LL_GPIO_PIN_ALL - * @retval None - */ -__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) -{ - 80002e8: b480 push {r7} - 80002ea: b083 sub sp, #12 - 80002ec: af00 add r7, sp, #0 - 80002ee: 6078 str r0, [r7, #4] - 80002f0: 6039 str r1, [r7, #0] - WRITE_REG(GPIOx->BRR, PinMask); - 80002f2: 687b ldr r3, [r7, #4] - 80002f4: 683a ldr r2, [r7, #0] - 80002f6: 629a str r2, [r3, #40] ; 0x28 -} - 80002f8: bf00 nop - 80002fa: 370c adds r7, #12 - 80002fc: 46bd mov sp, r7 - 80002fe: f85d 7b04 ldr.w r7, [sp], #4 - 8000302: 4770 bx lr - -08000304 : - * @arg @ref LL_GPIO_PIN_15 - * @arg @ref LL_GPIO_PIN_ALL - * @retval None - */ -__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask) -{ - 8000304: b480 push {r7} - 8000306: b085 sub sp, #20 - 8000308: af00 add r7, sp, #0 - 800030a: 6078 str r0, [r7, #4] - 800030c: 6039 str r1, [r7, #0] - uint32_t odr = READ_REG(GPIOx->ODR); - 800030e: 687b ldr r3, [r7, #4] - 8000310: 695b ldr r3, [r3, #20] - 8000312: 60fb str r3, [r7, #12] - WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask)); - 8000314: 68fa ldr r2, [r7, #12] - 8000316: 683b ldr r3, [r7, #0] - 8000318: 4013 ands r3, r2 - 800031a: 041a lsls r2, r3, #16 - 800031c: 68fb ldr r3, [r7, #12] - 800031e: 43d9 mvns r1, r3 - 8000320: 683b ldr r3, [r7, #0] - 8000322: 400b ands r3, r1 - 8000324: 431a orrs r2, r3 - 8000326: 687b ldr r3, [r7, #4] - 8000328: 619a str r2, [r3, #24] -} - 800032a: bf00 nop - 800032c: 3714 adds r7, #20 - 800032e: 46bd mov sp, r7 - 8000330: f85d 7b04 ldr.w r7, [sp], #4 - 8000334: 4770 bx lr - ... - -08000338 : -#define BUT_PORT GPIOC -#define BUT_PIN LL_GPIO_PIN_13 -#define CLK_PIN LL_GPIO_PIN_10 - -void GPIO_init(void) -{ - 8000338: b580 push {r7, lr} - 800033a: af00 add r7, sp, #0 -// PORT A -LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOA ); - 800033c: 2001 movs r0, #1 - 800033e: f7ff ff43 bl 80001c8 -// Green LED (user LED) - PA5 -LL_GPIO_SetPinMode( LED_PORT, LED_PIN, LL_GPIO_MODE_OUTPUT ); - 8000342: 2201 movs r2, #1 - 8000344: 2120 movs r1, #32 - 8000346: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 800034a: f7ff ff55 bl 80001f8 -LL_GPIO_SetPinOutputType( LED_PORT, LED_PIN, LL_GPIO_OUTPUT_PUSHPULL ); - 800034e: 2200 movs r2, #0 - 8000350: 2120 movs r1, #32 - 8000352: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8000356: f7ff ff8c bl 8000272 - -// PORT C -LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOC ); - 800035a: 2004 movs r0, #4 - 800035c: f7ff ff34 bl 80001c8 -// Blue button - PC13 -LL_GPIO_SetPinMode( BUT_PORT, BUT_PIN, LL_GPIO_MODE_INPUT ); - 8000360: 2200 movs r2, #0 - 8000362: f44f 5100 mov.w r1, #8192 ; 0x2000 - 8000366: 4805 ldr r0, [pc, #20] ; (800037c ) - 8000368: f7ff ff46 bl 80001f8 -LL_GPIO_SetPinMode( BUT_PORT, CLK_PIN, LL_GPIO_MODE_OUTPUT ); - 800036c: 2201 movs r2, #1 - 800036e: f44f 6180 mov.w r1, #1024 ; 0x400 - 8000372: 4802 ldr r0, [pc, #8] ; (800037c ) - 8000374: f7ff ff40 bl 80001f8 -} - 8000378: bf00 nop - 800037a: bd80 pop {r7, pc} - 800037c: 48000800 .word 0x48000800 - -08000380 : - -void CLK_TOGGLE(){ - 8000380: b580 push {r7, lr} - 8000382: af00 add r7, sp, #0 - LL_GPIO_TogglePin(BUT_PORT, CLK_PIN); - 8000384: f44f 6180 mov.w r1, #1024 ; 0x400 - 8000388: 4802 ldr r0, [pc, #8] ; (8000394 ) - 800038a: f7ff ffbb bl 8000304 -} - 800038e: bf00 nop - 8000390: bd80 pop {r7, pc} - 8000392: bf00 nop - 8000394: 48000800 .word 0x48000800 - -08000398 : - -void LED_GREEN( int val ) -{ - 8000398: b580 push {r7, lr} - 800039a: b082 sub sp, #8 - 800039c: af00 add r7, sp, #0 - 800039e: 6078 str r0, [r7, #4] -if ( val ) - 80003a0: 687b ldr r3, [r7, #4] - 80003a2: 2b00 cmp r3, #0 - 80003a4: d005 beq.n 80003b2 - LL_GPIO_SetOutputPin( LED_PORT, LED_PIN ); - 80003a6: 2120 movs r1, #32 - 80003a8: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 80003ac: f7ff ff8e bl 80002cc -else LL_GPIO_ResetOutputPin( LED_PORT, LED_PIN ); -} - 80003b0: e004 b.n 80003bc -else LL_GPIO_ResetOutputPin( LED_PORT, LED_PIN ); - 80003b2: 2120 movs r1, #32 - 80003b4: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 80003b8: f7ff ff96 bl 80002e8 -} - 80003bc: bf00 nop - 80003be: 3708 adds r7, #8 - 80003c0: 46bd mov sp, r7 - 80003c2: bd80 pop {r7, pc} - -080003c4 : - -int BLUE_BUTTON() -{ - 80003c4: b580 push {r7, lr} - 80003c6: af00 add r7, sp, #0 -return ( !LL_GPIO_IsInputPinSet( BUT_PORT, BUT_PIN ) ); - 80003c8: f44f 5100 mov.w r1, #8192 ; 0x2000 - 80003cc: 4805 ldr r0, [pc, #20] ; (80003e4 ) - 80003ce: f7ff ff68 bl 80002a2 - 80003d2: 4603 mov r3, r0 - 80003d4: 2b00 cmp r3, #0 - 80003d6: bf0c ite eq - 80003d8: 2301 moveq r3, #1 - 80003da: 2300 movne r3, #0 - 80003dc: b2db uxtb r3, r3 -} - 80003de: 4618 mov r0, r3 - 80003e0: bd80 pop {r7, pc} - 80003e2: bf00 nop - 80003e4: 48000800 .word 0x48000800 - -080003e8 : - * @brief Enable MSI oscillator - * @rmtoll CR MSION LL_RCC_MSI_Enable - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_Enable(void) -{ - 80003e8: b480 push {r7} - 80003ea: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_MSION); - 80003ec: 4b05 ldr r3, [pc, #20] ; (8000404 ) - 80003ee: 681b ldr r3, [r3, #0] - 80003f0: 4a04 ldr r2, [pc, #16] ; (8000404 ) - 80003f2: f043 0301 orr.w r3, r3, #1 - 80003f6: 6013 str r3, [r2, #0] -} - 80003f8: bf00 nop - 80003fa: 46bd mov sp, r7 - 80003fc: f85d 7b04 ldr.w r7, [sp], #4 - 8000400: 4770 bx lr - 8000402: bf00 nop - 8000404: 40021000 .word 0x40021000 - -08000408 : - * @brief Check if MSI oscillator Ready - * @rmtoll CR MSIRDY LL_RCC_MSI_IsReady - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void) -{ - 8000408: b480 push {r7} - 800040a: af00 add r7, sp, #0 - return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL); - 800040c: 4b06 ldr r3, [pc, #24] ; (8000428 ) - 800040e: 681b ldr r3, [r3, #0] - 8000410: f003 0302 and.w r3, r3, #2 - 8000414: 2b02 cmp r3, #2 - 8000416: d101 bne.n 800041c - 8000418: 2301 movs r3, #1 - 800041a: e000 b.n 800041e - 800041c: 2300 movs r3, #0 -} - 800041e: 4618 mov r0, r3 - 8000420: 46bd mov sp, r7 - 8000422: f85d 7b04 ldr.w r7, [sp], #4 - 8000426: 4770 bx lr - 8000428: 40021000 .word 0x40021000 - -0800042c : - * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE - * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source) -{ - 800042c: b480 push {r7} - 800042e: b083 sub sp, #12 - 8000430: af00 add r7, sp, #0 - 8000432: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); - 8000434: 4b06 ldr r3, [pc, #24] ; (8000450 ) - 8000436: 689b ldr r3, [r3, #8] - 8000438: f023 0203 bic.w r2, r3, #3 - 800043c: 4904 ldr r1, [pc, #16] ; (8000450 ) - 800043e: 687b ldr r3, [r7, #4] - 8000440: 4313 orrs r3, r2 - 8000442: 608b str r3, [r1, #8] -} - 8000444: bf00 nop - 8000446: 370c adds r7, #12 - 8000448: 46bd mov sp, r7 - 800044a: f85d 7b04 ldr.w r7, [sp], #4 - 800044e: 4770 bx lr - 8000450: 40021000 .word 0x40021000 - -08000454 : - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL - */ -__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void) -{ - 8000454: b480 push {r7} - 8000456: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); - 8000458: 4b04 ldr r3, [pc, #16] ; (800046c ) - 800045a: 689b ldr r3, [r3, #8] - 800045c: f003 030c and.w r3, r3, #12 -} - 8000460: 4618 mov r0, r3 - 8000462: 46bd mov sp, r7 - 8000464: f85d 7b04 ldr.w r7, [sp], #4 - 8000468: 4770 bx lr - 800046a: bf00 nop - 800046c: 40021000 .word 0x40021000 - -08000470 : - * @arg @ref LL_RCC_SYSCLK_DIV_256 - * @arg @ref LL_RCC_SYSCLK_DIV_512 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler) -{ - 8000470: b480 push {r7} - 8000472: b083 sub sp, #12 - 8000474: af00 add r7, sp, #0 - 8000476: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); - 8000478: 4b06 ldr r3, [pc, #24] ; (8000494 ) - 800047a: 689b ldr r3, [r3, #8] - 800047c: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 8000480: 4904 ldr r1, [pc, #16] ; (8000494 ) - 8000482: 687b ldr r3, [r7, #4] - 8000484: 4313 orrs r3, r2 - 8000486: 608b str r3, [r1, #8] -} - 8000488: bf00 nop - 800048a: 370c adds r7, #12 - 800048c: 46bd mov sp, r7 - 800048e: f85d 7b04 ldr.w r7, [sp], #4 - 8000492: 4770 bx lr - 8000494: 40021000 .word 0x40021000 - -08000498 : - * @arg @ref LL_RCC_APB1_DIV_8 - * @arg @ref LL_RCC_APB1_DIV_16 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler) -{ - 8000498: b480 push {r7} - 800049a: b083 sub sp, #12 - 800049c: af00 add r7, sp, #0 - 800049e: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); - 80004a0: 4b06 ldr r3, [pc, #24] ; (80004bc ) - 80004a2: 689b ldr r3, [r3, #8] - 80004a4: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 80004a8: 4904 ldr r1, [pc, #16] ; (80004bc ) - 80004aa: 687b ldr r3, [r7, #4] - 80004ac: 4313 orrs r3, r2 - 80004ae: 608b str r3, [r1, #8] -} - 80004b0: bf00 nop - 80004b2: 370c adds r7, #12 - 80004b4: 46bd mov sp, r7 - 80004b6: f85d 7b04 ldr.w r7, [sp], #4 - 80004ba: 4770 bx lr - 80004bc: 40021000 .word 0x40021000 - -080004c0 : - * @arg @ref LL_RCC_APB2_DIV_8 - * @arg @ref LL_RCC_APB2_DIV_16 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) -{ - 80004c0: b480 push {r7} - 80004c2: b083 sub sp, #12 - 80004c4: af00 add r7, sp, #0 - 80004c6: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); - 80004c8: 4b06 ldr r3, [pc, #24] ; (80004e4 ) - 80004ca: 689b ldr r3, [r3, #8] - 80004cc: f423 5260 bic.w r2, r3, #14336 ; 0x3800 - 80004d0: 4904 ldr r1, [pc, #16] ; (80004e4 ) - 80004d2: 687b ldr r3, [r7, #4] - 80004d4: 4313 orrs r3, r2 - 80004d6: 608b str r3, [r1, #8] -} - 80004d8: bf00 nop - 80004da: 370c adds r7, #12 - 80004dc: 46bd mov sp, r7 - 80004de: f85d 7b04 ldr.w r7, [sp], #4 - 80004e2: 4770 bx lr - 80004e4: 40021000 .word 0x40021000 - -080004e8 : - * @brief Enable PLL - * @rmtoll CR PLLON LL_RCC_PLL_Enable - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_Enable(void) -{ - 80004e8: b480 push {r7} - 80004ea: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_PLLON); - 80004ec: 4b05 ldr r3, [pc, #20] ; (8000504 ) - 80004ee: 681b ldr r3, [r3, #0] - 80004f0: 4a04 ldr r2, [pc, #16] ; (8000504 ) - 80004f2: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 80004f6: 6013 str r3, [r2, #0] -} - 80004f8: bf00 nop - 80004fa: 46bd mov sp, r7 - 80004fc: f85d 7b04 ldr.w r7, [sp], #4 - 8000500: 4770 bx lr - 8000502: bf00 nop - 8000504: 40021000 .word 0x40021000 - -08000508 : - * @brief Check if PLL Ready - * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void) -{ - 8000508: b480 push {r7} - 800050a: af00 add r7, sp, #0 - return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL); - 800050c: 4b07 ldr r3, [pc, #28] ; (800052c ) - 800050e: 681b ldr r3, [r3, #0] - 8000510: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8000514: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8000518: d101 bne.n 800051e - 800051a: 2301 movs r3, #1 - 800051c: e000 b.n 8000520 - 800051e: 2300 movs r3, #0 -} - 8000520: 4618 mov r0, r3 - 8000522: 46bd mov sp, r7 - 8000524: f85d 7b04 ldr.w r7, [sp], #4 - 8000528: 4770 bx lr - 800052a: bf00 nop - 800052c: 40021000 .word 0x40021000 - -08000530 : - * @arg @ref LL_RCC_PLLR_DIV_6 - * @arg @ref LL_RCC_PLLR_DIV_8 - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) -{ - 8000530: b480 push {r7} - 8000532: b085 sub sp, #20 - 8000534: af00 add r7, sp, #0 - 8000536: 60f8 str r0, [r7, #12] - 8000538: 60b9 str r1, [r7, #8] - 800053a: 607a str r2, [r7, #4] - 800053c: 603b str r3, [r7, #0] - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR, - 800053e: 4b0a ldr r3, [pc, #40] ; (8000568 ) - 8000540: 68da ldr r2, [r3, #12] - 8000542: 4b0a ldr r3, [pc, #40] ; (800056c ) - 8000544: 4013 ands r3, r2 - 8000546: 68f9 ldr r1, [r7, #12] - 8000548: 68ba ldr r2, [r7, #8] - 800054a: 4311 orrs r1, r2 - 800054c: 687a ldr r2, [r7, #4] - 800054e: 0212 lsls r2, r2, #8 - 8000550: 4311 orrs r1, r2 - 8000552: 683a ldr r2, [r7, #0] - 8000554: 430a orrs r2, r1 - 8000556: 4904 ldr r1, [pc, #16] ; (8000568 ) - 8000558: 4313 orrs r3, r2 - 800055a: 60cb str r3, [r1, #12] - Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLR); -} - 800055c: bf00 nop - 800055e: 3714 adds r7, #20 - 8000560: 46bd mov sp, r7 - 8000562: f85d 7b04 ldr.w r7, [sp], #4 - 8000566: 4770 bx lr - 8000568: 40021000 .word 0x40021000 - 800056c: f9ff808c .word 0xf9ff808c - -08000570 : - * @brief Enable PLL output mapped on SYSCLK domain - * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_EnableDomain_SYS - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_EnableDomain_SYS(void) -{ - 8000570: b480 push {r7} - 8000572: af00 add r7, sp, #0 - SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); - 8000574: 4b05 ldr r3, [pc, #20] ; (800058c ) - 8000576: 68db ldr r3, [r3, #12] - 8000578: 4a04 ldr r2, [pc, #16] ; (800058c ) - 800057a: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 800057e: 60d3 str r3, [r2, #12] -} - 8000580: bf00 nop - 8000582: 46bd mov sp, r7 - 8000584: f85d 7b04 ldr.w r7, [sp], #4 - 8000588: 4770 bx lr - 800058a: bf00 nop - 800058c: 40021000 .word 0x40021000 - -08000590 : - * - * (*) value not defined in all devices. - * @retval None - */ -__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) -{ - 8000590: b480 push {r7} - 8000592: b083 sub sp, #12 - 8000594: af00 add r7, sp, #0 - 8000596: 6078 str r0, [r7, #4] - MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); - 8000598: 4b06 ldr r3, [pc, #24] ; (80005b4 ) - 800059a: 681b ldr r3, [r3, #0] - 800059c: f023 0207 bic.w r2, r3, #7 - 80005a0: 4904 ldr r1, [pc, #16] ; (80005b4 ) - 80005a2: 687b ldr r3, [r7, #4] - 80005a4: 4313 orrs r3, r2 - 80005a6: 600b str r3, [r1, #0] -} - 80005a8: bf00 nop - 80005aa: 370c adds r7, #12 - 80005ac: 46bd mov sp, r7 - 80005ae: f85d 7b04 ldr.w r7, [sp], #4 - 80005b2: 4770 bx lr - 80005b4: 40022000 .word 0x40022000 - -080005b8 : - * @brief Enable SysTick exception request - * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT - * @retval None - */ -__STATIC_INLINE void LL_SYSTICK_EnableIT(void) -{ - 80005b8: b480 push {r7} - 80005ba: af00 add r7, sp, #0 - SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); - 80005bc: 4b05 ldr r3, [pc, #20] ; (80005d4 ) - 80005be: 681b ldr r3, [r3, #0] - 80005c0: 4a04 ldr r2, [pc, #16] ; (80005d4 ) - 80005c2: f043 0302 orr.w r3, r3, #2 - 80005c6: 6013 str r3, [r2, #0] -} - 80005c8: bf00 nop - 80005ca: 46bd mov sp, r7 - 80005cc: f85d 7b04 ldr.w r7, [sp], #4 - 80005d0: 4770 bx lr - 80005d2: bf00 nop - 80005d4: e000e010 .word 0xe000e010 - -080005d8 : - * @brief Processor uses sleep as its low power mode - * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep - * @retval None - */ -__STATIC_INLINE void LL_LPM_EnableSleep(void) -{ - 80005d8: b480 push {r7} - 80005da: af00 add r7, sp, #0 - /* Clear SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - 80005dc: 4b05 ldr r3, [pc, #20] ; (80005f4 ) - 80005de: 691b ldr r3, [r3, #16] - 80005e0: 4a04 ldr r2, [pc, #16] ; (80005f4 ) - 80005e2: f023 0304 bic.w r3, r3, #4 - 80005e6: 6113 str r3, [r2, #16] -} - 80005e8: bf00 nop - 80005ea: 46bd mov sp, r7 - 80005ec: f85d 7b04 ldr.w r7, [sp], #4 - 80005f0: 4770 bx lr - 80005f2: bf00 nop - 80005f4: e000ed00 .word 0xe000ed00 - -080005f8 : -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - 80005f8: b580 push {r7, lr} - 80005fa: af00 add r7, sp, #0 - if ( BLUE_BUTTON() ){ - 80005fc: f7ff fee2 bl 80003c4 - 8000600: 4603 mov r3, r0 - 8000602: 2b00 cmp r3, #0 - 8000604: d002 beq.n 800060c - blue_mode = 1 ; - 8000606: 4b0f ldr r3, [pc, #60] ; (8000644 ) - 8000608: 2201 movs r2, #1 - 800060a: 701a strb r2, [r3, #0] - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - 800060c: 4b0e ldr r3, [pc, #56] ; (8000648 ) - 800060e: 681b ldr r3, [r3, #0] - 8000610: 3301 adds r3, #1 - 8000612: 4a0d ldr r2, [pc, #52] ; (8000648 ) - 8000614: 6013 str r3, [r2, #0] - if (msTicks == 5){ - 8000616: 4b0c ldr r3, [pc, #48] ; (8000648 ) - 8000618: 681b ldr r3, [r3, #0] - 800061a: 2b05 cmp r3, #5 - 800061c: d103 bne.n 8000626 - LED_GREEN(0); - 800061e: 2000 movs r0, #0 - 8000620: f7ff feba bl 8000398 - 8000624: e009 b.n 800063a - }else if(msTicks >= 200){ - 8000626: 4b08 ldr r3, [pc, #32] ; (8000648 ) - 8000628: 681b ldr r3, [r3, #0] - 800062a: 2bc7 cmp r3, #199 ; 0xc7 - 800062c: d905 bls.n 800063a - msTicks = 0; - 800062e: 4b06 ldr r3, [pc, #24] ; (8000648 ) - 8000630: 2200 movs r2, #0 - 8000632: 601a str r2, [r3, #0] - LED_GREEN(1); - 8000634: 2001 movs r0, #1 - 8000636: f7ff feaf bl 8000398 - } - CLK_TOGGLE(); - 800063a: f7ff fea1 bl 8000380 -} - 800063e: bf00 nop - 8000640: bd80 pop {r7, pc} - 8000642: bf00 nop - 8000644: 20000024 .word 0x20000024 - 8000648: 20000020 .word 0x20000020 - -0800064c
: - -// -//void SystemClock_Config(void); - -int main(void) -{ - 800064c: b580 push {r7, lr} - 800064e: af00 add r7, sp, #0 -/* Configure the system clock */ -SystemClock_Config(); - 8000650: f000 f816 bl 8000680 - -// config GPIO -GPIO_init(); - 8000654: f7ff fe70 bl 8000338 - -// init systick timer (tick period at 1 ms) -LL_Init1msTick( SystemCoreClock ); - 8000658: 4b07 ldr r3, [pc, #28] ; (8000678 ) - 800065a: 681b ldr r3, [r3, #0] - 800065c: 4618 mov r0, r3 - 800065e: f000 f99f bl 80009a0 -LL_SYSTICK_EnableIT(); - 8000662: f7ff ffa9 bl 80005b8 - -//Setup Sleep mode -LL_LPM_EnableSleep(); - 8000666: f7ff ffb7 bl 80005d8 -//LL_LPM_EnableSleepOnExit(); - -while (1) { - if (blue_mode){ - 800066a: 4b04 ldr r3, [pc, #16] ; (800067c ) - 800066c: 781b ldrb r3, [r3, #0] - 800066e: b2db uxtb r3, r3 - 8000670: 2b00 cmp r3, #0 - 8000672: d0fa beq.n 800066a - __WFI(); - 8000674: bf30 wfi - if (blue_mode){ - 8000676: e7f8 b.n 800066a - 8000678: 20000000 .word 0x20000000 - 800067c: 20000024 .word 0x20000024 - -08000680 : - * PLL_R = 2 - * Flash Latency(WS) = 4 - * @param None - * @retval None - */ -void SystemClock_Config(void) { - 8000680: b580 push {r7, lr} - 8000682: af00 add r7, sp, #0 -/* MSI configuration and activation */ -LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - 8000684: 2004 movs r0, #4 - 8000686: f7ff ff83 bl 8000590 -LL_RCC_MSI_Enable(); - 800068a: f7ff fead bl 80003e8 -while (LL_RCC_MSI_IsReady() != 1) - 800068e: bf00 nop - 8000690: f7ff feba bl 8000408 - 8000694: 4603 mov r3, r0 - 8000696: 2b01 cmp r3, #1 - 8000698: d1fa bne.n 8000690 - { }; - -/* Main PLL configuration and activation */ -LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - 800069a: 2300 movs r3, #0 - 800069c: 2228 movs r2, #40 ; 0x28 - 800069e: 2100 movs r1, #0 - 80006a0: 2001 movs r0, #1 - 80006a2: f7ff ff45 bl 8000530 -LL_RCC_PLL_Enable(); - 80006a6: f7ff ff1f bl 80004e8 -LL_RCC_PLL_EnableDomain_SYS(); - 80006aa: f7ff ff61 bl 8000570 -while(LL_RCC_PLL_IsReady() != 1) - 80006ae: bf00 nop - 80006b0: f7ff ff2a bl 8000508 - 80006b4: 4603 mov r3, r0 - 80006b6: 2b01 cmp r3, #1 - 80006b8: d1fa bne.n 80006b0 - { }; - -/* Sysclk activation on the main PLL */ -LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 80006ba: 2000 movs r0, #0 - 80006bc: f7ff fed8 bl 8000470 -LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 80006c0: 2003 movs r0, #3 - 80006c2: f7ff feb3 bl 800042c -while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 80006c6: bf00 nop - 80006c8: f7ff fec4 bl 8000454 - 80006cc: 4603 mov r3, r0 - 80006ce: 2b0c cmp r3, #12 - 80006d0: d1fa bne.n 80006c8 - { }; - -/* Set APB1 & APB2 prescaler*/ -LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 80006d2: 2000 movs r0, #0 - 80006d4: f7ff fee0 bl 8000498 -LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 80006d8: 2000 movs r0, #0 - 80006da: f7ff fef1 bl 80004c0 - -/* Update the global variable called SystemCoreClock */ -SystemCoreClockUpdate(); - 80006de: f000 f861 bl 80007a4 -} - 80006e2: bf00 nop - 80006e4: bd80 pop {r7, pc} - -080006e6 : -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ - 80006e6: b480 push {r7} - 80006e8: af00 add r7, sp, #0 - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - 80006ea: bf00 nop - 80006ec: 46bd mov sp, r7 - 80006ee: f85d 7b04 ldr.w r7, [sp], #4 - 80006f2: 4770 bx lr - -080006f4 : - -/** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ - 80006f4: b480 push {r7} - 80006f6: af00 add r7, sp, #0 - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - 80006f8: e7fe b.n 80006f8 - -080006fa : - -/** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ - 80006fa: b480 push {r7} - 80006fc: af00 add r7, sp, #0 - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - 80006fe: e7fe b.n 80006fe - -08000700 : - -/** - * @brief This function handles Prefetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ - 8000700: b480 push {r7} - 8000702: af00 add r7, sp, #0 - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - 8000704: e7fe b.n 8000704 - -08000706 : - -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - 8000706: b480 push {r7} - 8000708: af00 add r7, sp, #0 - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - 800070a: e7fe b.n 800070a - -0800070c : - -/** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ - 800070c: b480 push {r7} - 800070e: af00 add r7, sp, #0 - - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ - - /* USER CODE END SVCall_IRQn 1 */ -} - 8000710: bf00 nop - 8000712: 46bd mov sp, r7 - 8000714: f85d 7b04 ldr.w r7, [sp], #4 - 8000718: 4770 bx lr - -0800071a : - -/** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ - 800071a: b480 push {r7} - 800071c: af00 add r7, sp, #0 - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - 800071e: bf00 nop - 8000720: 46bd mov sp, r7 - 8000722: f85d 7b04 ldr.w r7, [sp], #4 - 8000726: 4770 bx lr - -08000728 : - -/** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ - 8000728: b480 push {r7} - 800072a: af00 add r7, sp, #0 - - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ - - /* USER CODE END PendSV_IRQn 1 */ -} - 800072c: bf00 nop - 800072e: 46bd mov sp, r7 - 8000730: f85d 7b04 ldr.w r7, [sp], #4 - 8000734: 4770 bx lr - ... - -08000738 : - * @param None - * @retval None - */ - -void SystemInit(void) -{ - 8000738: b480 push {r7} - 800073a: af00 add r7, sp, #0 - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 800073c: 4b17 ldr r3, [pc, #92] ; (800079c ) - 800073e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8000742: 4a16 ldr r2, [pc, #88] ; (800079c ) - 8000744: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8000748: f8c2 3088 str.w r3, [r2, #136] ; 0x88 - #endif - - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set MSION bit */ - RCC->CR |= RCC_CR_MSION; - 800074c: 4b14 ldr r3, [pc, #80] ; (80007a0 ) - 800074e: 681b ldr r3, [r3, #0] - 8000750: 4a13 ldr r2, [pc, #76] ; (80007a0 ) - 8000752: f043 0301 orr.w r3, r3, #1 - 8000756: 6013 str r3, [r2, #0] - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000U; - 8000758: 4b11 ldr r3, [pc, #68] ; (80007a0 ) - 800075a: 2200 movs r2, #0 - 800075c: 609a str r2, [r3, #8] - - /* Reset HSEON, CSSON , HSION, and PLLON bits */ - RCC->CR &= 0xEAF6FFFFU; - 800075e: 4b10 ldr r3, [pc, #64] ; (80007a0 ) - 8000760: 681b ldr r3, [r3, #0] - 8000762: 4a0f ldr r2, [pc, #60] ; (80007a0 ) - 8000764: f023 53a8 bic.w r3, r3, #352321536 ; 0x15000000 - 8000768: f423 2310 bic.w r3, r3, #589824 ; 0x90000 - 800076c: 6013 str r3, [r2, #0] - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = 0x00001000U; - 800076e: 4b0c ldr r3, [pc, #48] ; (80007a0 ) - 8000770: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8000774: 60da str r2, [r3, #12] - - /* Reset HSEBYP bit */ - RCC->CR &= 0xFFFBFFFFU; - 8000776: 4b0a ldr r3, [pc, #40] ; (80007a0 ) - 8000778: 681b ldr r3, [r3, #0] - 800077a: 4a09 ldr r2, [pc, #36] ; (80007a0 ) - 800077c: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8000780: 6013 str r3, [r2, #0] - - /* Disable all interrupts */ - RCC->CIER = 0x00000000U; - 8000782: 4b07 ldr r3, [pc, #28] ; (80007a0 ) - 8000784: 2200 movs r2, #0 - 8000786: 619a str r2, [r3, #24] - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 8000788: 4b04 ldr r3, [pc, #16] ; (800079c ) - 800078a: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 800078e: 609a str r2, [r3, #8] -#endif -} - 8000790: bf00 nop - 8000792: 46bd mov sp, r7 - 8000794: f85d 7b04 ldr.w r7, [sp], #4 - 8000798: 4770 bx lr - 800079a: bf00 nop - 800079c: e000ed00 .word 0xe000ed00 - 80007a0: 40021000 .word 0x40021000 - -080007a4 : - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - 80007a4: b480 push {r7} - 80007a6: b087 sub sp, #28 - 80007a8: af00 add r7, sp, #0 - uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; - 80007aa: 2300 movs r3, #0 - 80007ac: 60fb str r3, [r7, #12] - 80007ae: 2300 movs r3, #0 - 80007b0: 617b str r3, [r7, #20] - 80007b2: 2300 movs r3, #0 - 80007b4: 613b str r3, [r7, #16] - 80007b6: 2302 movs r3, #2 - 80007b8: 60bb str r3, [r7, #8] - 80007ba: 2300 movs r3, #0 - 80007bc: 607b str r3, [r7, #4] - 80007be: 2302 movs r3, #2 - 80007c0: 603b str r3, [r7, #0] - - /* Get MSI Range frequency--------------------------------------------------*/ - if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) - 80007c2: 4b4f ldr r3, [pc, #316] ; (8000900 ) - 80007c4: 681b ldr r3, [r3, #0] - 80007c6: f003 0308 and.w r3, r3, #8 - 80007ca: 2b00 cmp r3, #0 - 80007cc: d107 bne.n 80007de - { /* MSISRANGE from RCC_CSR applies */ - msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; - 80007ce: 4b4c ldr r3, [pc, #304] ; (8000900 ) - 80007d0: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 80007d4: 0a1b lsrs r3, r3, #8 - 80007d6: f003 030f and.w r3, r3, #15 - 80007da: 617b str r3, [r7, #20] - 80007dc: e005 b.n 80007ea - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; - 80007de: 4b48 ldr r3, [pc, #288] ; (8000900 ) - 80007e0: 681b ldr r3, [r3, #0] - 80007e2: 091b lsrs r3, r3, #4 - 80007e4: f003 030f and.w r3, r3, #15 - 80007e8: 617b str r3, [r7, #20] - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - 80007ea: 4a46 ldr r2, [pc, #280] ; (8000904 ) - 80007ec: 697b ldr r3, [r7, #20] - 80007ee: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80007f2: 617b str r3, [r7, #20] - - /* Get SYSCLK source -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) - 80007f4: 4b42 ldr r3, [pc, #264] ; (8000900 ) - 80007f6: 689b ldr r3, [r3, #8] - 80007f8: f003 030c and.w r3, r3, #12 - 80007fc: 2b0c cmp r3, #12 - 80007fe: d865 bhi.n 80008cc - 8000800: a201 add r2, pc, #4 ; (adr r2, 8000808 ) - 8000802: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000806: bf00 nop - 8000808: 0800083d .word 0x0800083d - 800080c: 080008cd .word 0x080008cd - 8000810: 080008cd .word 0x080008cd - 8000814: 080008cd .word 0x080008cd - 8000818: 08000845 .word 0x08000845 - 800081c: 080008cd .word 0x080008cd - 8000820: 080008cd .word 0x080008cd - 8000824: 080008cd .word 0x080008cd - 8000828: 0800084d .word 0x0800084d - 800082c: 080008cd .word 0x080008cd - 8000830: 080008cd .word 0x080008cd - 8000834: 080008cd .word 0x080008cd - 8000838: 08000855 .word 0x08000855 - { - case 0x00: /* MSI used as system clock source */ - SystemCoreClock = msirange; - 800083c: 4a32 ldr r2, [pc, #200] ; (8000908 ) - 800083e: 697b ldr r3, [r7, #20] - 8000840: 6013 str r3, [r2, #0] - break; - 8000842: e047 b.n 80008d4 - - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - 8000844: 4b30 ldr r3, [pc, #192] ; (8000908 ) - 8000846: 4a31 ldr r2, [pc, #196] ; (800090c ) - 8000848: 601a str r2, [r3, #0] - break; - 800084a: e043 b.n 80008d4 - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - 800084c: 4b2e ldr r3, [pc, #184] ; (8000908 ) - 800084e: 4a30 ldr r2, [pc, #192] ; (8000910 ) - 8000850: 601a str r2, [r3, #0] - break; - 8000852: e03f b.n 80008d4 - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - 8000854: 4b2a ldr r3, [pc, #168] ; (8000900 ) - 8000856: 68db ldr r3, [r3, #12] - 8000858: f003 0303 and.w r3, r3, #3 - 800085c: 607b str r3, [r7, #4] - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; - 800085e: 4b28 ldr r3, [pc, #160] ; (8000900 ) - 8000860: 68db ldr r3, [r3, #12] - 8000862: 091b lsrs r3, r3, #4 - 8000864: f003 0307 and.w r3, r3, #7 - 8000868: 3301 adds r3, #1 - 800086a: 603b str r3, [r7, #0] - - switch (pllsource) - 800086c: 687b ldr r3, [r7, #4] - 800086e: 2b02 cmp r3, #2 - 8000870: d002 beq.n 8000878 - 8000872: 2b03 cmp r3, #3 - 8000874: d006 beq.n 8000884 - 8000876: e00b b.n 8000890 - { - case 0x02: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm); - 8000878: 4a24 ldr r2, [pc, #144] ; (800090c ) - 800087a: 683b ldr r3, [r7, #0] - 800087c: fbb2 f3f3 udiv r3, r2, r3 - 8000880: 613b str r3, [r7, #16] - break; - 8000882: e00b b.n 800089c - - case 0x03: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm); - 8000884: 4a22 ldr r2, [pc, #136] ; (8000910 ) - 8000886: 683b ldr r3, [r7, #0] - 8000888: fbb2 f3f3 udiv r3, r2, r3 - 800088c: 613b str r3, [r7, #16] - break; - 800088e: e005 b.n 800089c - - default: /* MSI used as PLL clock source */ - pllvco = (msirange / pllm); - 8000890: 697a ldr r2, [r7, #20] - 8000892: 683b ldr r3, [r7, #0] - 8000894: fbb2 f3f3 udiv r3, r2, r3 - 8000898: 613b str r3, [r7, #16] - break; - 800089a: bf00 nop - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); - 800089c: 4b18 ldr r3, [pc, #96] ; (8000900 ) - 800089e: 68db ldr r3, [r3, #12] - 80008a0: 0a1b lsrs r3, r3, #8 - 80008a2: f003 027f and.w r2, r3, #127 ; 0x7f - 80008a6: 693b ldr r3, [r7, #16] - 80008a8: fb02 f303 mul.w r3, r2, r3 - 80008ac: 613b str r3, [r7, #16] - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; - 80008ae: 4b14 ldr r3, [pc, #80] ; (8000900 ) - 80008b0: 68db ldr r3, [r3, #12] - 80008b2: 0e5b lsrs r3, r3, #25 - 80008b4: f003 0303 and.w r3, r3, #3 - 80008b8: 3301 adds r3, #1 - 80008ba: 005b lsls r3, r3, #1 - 80008bc: 60bb str r3, [r7, #8] - SystemCoreClock = pllvco/pllr; - 80008be: 693a ldr r2, [r7, #16] - 80008c0: 68bb ldr r3, [r7, #8] - 80008c2: fbb2 f3f3 udiv r3, r2, r3 - 80008c6: 4a10 ldr r2, [pc, #64] ; (8000908 ) - 80008c8: 6013 str r3, [r2, #0] - break; - 80008ca: e003 b.n 80008d4 - - default: - SystemCoreClock = msirange; - 80008cc: 4a0e ldr r2, [pc, #56] ; (8000908 ) - 80008ce: 697b ldr r3, [r7, #20] - 80008d0: 6013 str r3, [r2, #0] - break; - 80008d2: bf00 nop - } - /* Compute HCLK clock frequency --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; - 80008d4: 4b0a ldr r3, [pc, #40] ; (8000900 ) - 80008d6: 689b ldr r3, [r3, #8] - 80008d8: 091b lsrs r3, r3, #4 - 80008da: f003 030f and.w r3, r3, #15 - 80008de: 4a0d ldr r2, [pc, #52] ; (8000914 ) - 80008e0: 5cd3 ldrb r3, [r2, r3] - 80008e2: 60fb str r3, [r7, #12] - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; - 80008e4: 4b08 ldr r3, [pc, #32] ; (8000908 ) - 80008e6: 681a ldr r2, [r3, #0] - 80008e8: 68fb ldr r3, [r7, #12] - 80008ea: fa22 f303 lsr.w r3, r2, r3 - 80008ee: 4a06 ldr r2, [pc, #24] ; (8000908 ) - 80008f0: 6013 str r3, [r2, #0] -} - 80008f2: bf00 nop - 80008f4: 371c adds r7, #28 - 80008f6: 46bd mov sp, r7 - 80008f8: f85d 7b04 ldr.w r7, [sp], #4 - 80008fc: 4770 bx lr - 80008fe: bf00 nop - 8000900: 40021000 .word 0x40021000 - 8000904: 08000a28 .word 0x08000a28 - 8000908: 20000000 .word 0x20000000 - 800090c: 00f42400 .word 0x00f42400 - 8000910: 007a1200 .word 0x007a1200 - 8000914: 08000a18 .word 0x08000a18 - -08000918 : - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* Set stack pointer */ - 8000918: f8df d034 ldr.w sp, [pc, #52] ; 8000950 - -/* Call the clock system initialization function.*/ - bl SystemInit - 800091c: f7ff ff0c bl 8000738 - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - 8000920: 2100 movs r1, #0 - b LoopCopyDataInit - 8000922: e003 b.n 800092c - -08000924 : - -CopyDataInit: - ldr r3, =_sidata - 8000924: 4b0b ldr r3, [pc, #44] ; (8000954 ) - ldr r3, [r3, r1] - 8000926: 585b ldr r3, [r3, r1] - str r3, [r0, r1] - 8000928: 5043 str r3, [r0, r1] - adds r1, r1, #4 - 800092a: 3104 adds r1, #4 - -0800092c : - -LoopCopyDataInit: - ldr r0, =_sdata - 800092c: 480a ldr r0, [pc, #40] ; (8000958 ) - ldr r3, =_edata - 800092e: 4b0b ldr r3, [pc, #44] ; (800095c ) - adds r2, r0, r1 - 8000930: 1842 adds r2, r0, r1 - cmp r2, r3 - 8000932: 429a cmp r2, r3 - bcc CopyDataInit - 8000934: d3f6 bcc.n 8000924 - ldr r2, =_sbss - 8000936: 4a0a ldr r2, [pc, #40] ; (8000960 ) - b LoopFillZerobss - 8000938: e002 b.n 8000940 - -0800093a : -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - 800093a: 2300 movs r3, #0 - str r3, [r2], #4 - 800093c: f842 3b04 str.w r3, [r2], #4 - -08000940 : - -LoopFillZerobss: - ldr r3, = _ebss - 8000940: 4b08 ldr r3, [pc, #32] ; (8000964 ) - cmp r2, r3 - 8000942: 429a cmp r2, r3 - bcc FillZerobss - 8000944: d3f9 bcc.n 800093a - -/* Call static constructors */ - bl __libc_init_array - 8000946: f000 f837 bl 80009b8 <__libc_init_array> -/* Call the application's entry point.*/ - bl main - 800094a: f7ff fe7f bl 800064c
- -0800094e : - -LoopForever: - b LoopForever - 800094e: e7fe b.n 800094e - ldr sp, =_estack /* Set stack pointer */ - 8000950: 20018000 .word 0x20018000 - ldr r3, =_sidata - 8000954: 08000a60 .word 0x08000a60 - ldr r0, =_sdata - 8000958: 20000000 .word 0x20000000 - ldr r3, =_edata - 800095c: 20000004 .word 0x20000004 - ldr r2, =_sbss - 8000960: 20000004 .word 0x20000004 - ldr r3, = _ebss - 8000964: 20000028 .word 0x20000028 - -08000968 : - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - 8000968: e7fe b.n 8000968 - ... - -0800096c : - * configuration by calling this function, for a delay use rather osDelay RTOS service. - * @param Ticks Number of ticks - * @retval None - */ -__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) -{ - 800096c: b480 push {r7} - 800096e: b083 sub sp, #12 - 8000970: af00 add r7, sp, #0 - 8000972: 6078 str r0, [r7, #4] - 8000974: 6039 str r1, [r7, #0] - /* Configure the SysTick to have interrupt in 1ms time base */ - SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ - 8000976: 687a ldr r2, [r7, #4] - 8000978: 683b ldr r3, [r7, #0] - 800097a: fbb2 f3f3 udiv r3, r2, r3 - 800097e: 4a07 ldr r2, [pc, #28] ; (800099c ) - 8000980: 3b01 subs r3, #1 - 8000982: 6053 str r3, [r2, #4] - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000984: 4b05 ldr r3, [pc, #20] ; (800099c ) - 8000986: 2200 movs r2, #0 - 8000988: 609a str r2, [r3, #8] - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800098a: 4b04 ldr r3, [pc, #16] ; (800099c ) - 800098c: 2205 movs r2, #5 - 800098e: 601a str r2, [r3, #0] - SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ -} - 8000990: bf00 nop - 8000992: 370c adds r7, #12 - 8000994: 46bd mov sp, r7 - 8000996: f85d 7b04 ldr.w r7, [sp], #4 - 800099a: 4770 bx lr - 800099c: e000e010 .word 0xe000e010 - -080009a0 : - * @param HCLKFrequency HCLK frequency in Hz - * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq - * @retval None - */ -void LL_Init1msTick(uint32_t HCLKFrequency) -{ - 80009a0: b580 push {r7, lr} - 80009a2: b082 sub sp, #8 - 80009a4: af00 add r7, sp, #0 - 80009a6: 6078 str r0, [r7, #4] - /* Use frequency provided in argument */ - LL_InitTick(HCLKFrequency, 100U); - 80009a8: 2164 movs r1, #100 ; 0x64 - 80009aa: 6878 ldr r0, [r7, #4] - 80009ac: f7ff ffde bl 800096c -} - 80009b0: bf00 nop - 80009b2: 3708 adds r7, #8 - 80009b4: 46bd mov sp, r7 - 80009b6: bd80 pop {r7, pc} - -080009b8 <__libc_init_array>: - 80009b8: b570 push {r4, r5, r6, lr} - 80009ba: 4e0d ldr r6, [pc, #52] ; (80009f0 <__libc_init_array+0x38>) - 80009bc: 4c0d ldr r4, [pc, #52] ; (80009f4 <__libc_init_array+0x3c>) - 80009be: 1ba4 subs r4, r4, r6 - 80009c0: 10a4 asrs r4, r4, #2 - 80009c2: 2500 movs r5, #0 - 80009c4: 42a5 cmp r5, r4 - 80009c6: d109 bne.n 80009dc <__libc_init_array+0x24> - 80009c8: 4e0b ldr r6, [pc, #44] ; (80009f8 <__libc_init_array+0x40>) - 80009ca: 4c0c ldr r4, [pc, #48] ; (80009fc <__libc_init_array+0x44>) - 80009cc: f000 f818 bl 8000a00 <_init> - 80009d0: 1ba4 subs r4, r4, r6 - 80009d2: 10a4 asrs r4, r4, #2 - 80009d4: 2500 movs r5, #0 - 80009d6: 42a5 cmp r5, r4 - 80009d8: d105 bne.n 80009e6 <__libc_init_array+0x2e> - 80009da: bd70 pop {r4, r5, r6, pc} - 80009dc: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 80009e0: 4798 blx r3 - 80009e2: 3501 adds r5, #1 - 80009e4: e7ee b.n 80009c4 <__libc_init_array+0xc> - 80009e6: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 80009ea: 4798 blx r3 - 80009ec: 3501 adds r5, #1 - 80009ee: e7f2 b.n 80009d6 <__libc_init_array+0x1e> - 80009f0: 08000a58 .word 0x08000a58 - 80009f4: 08000a58 .word 0x08000a58 - 80009f8: 08000a58 .word 0x08000a58 - 80009fc: 08000a5c .word 0x08000a5c - -08000a00 <_init>: - 8000a00: b5f8 push {r3, r4, r5, r6, r7, lr} - 8000a02: bf00 nop - 8000a04: bcf8 pop {r3, r4, r5, r6, r7} - 8000a06: bc08 pop {r3} - 8000a08: 469e mov lr, r3 - 8000a0a: 4770 bx lr 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Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o -LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -START GROUP -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libm.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a -END GROUP -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o -LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - 0x0000000020018000 _estack = (ORIGIN (RAM) + LENGTH (RAM)) - 0x0000000000000200 _Min_Heap_Size = 0x200 - 0x0000000000000400 _Min_Stack_Size = 0x400 - -.isr_vector 0x0000000008000000 0x188 - 0x0000000008000000 . = ALIGN (0x4) - *(.isr_vector) - .isr_vector 0x0000000008000000 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.text.GPIO_init - 0x0000000008000338 0x48 Core/Src/gpio.o - 0x0000000008000338 GPIO_init - .text.CLK_TOGGLE - 0x0000000008000380 0x18 Core/Src/gpio.o - 0x0000000008000380 CLK_TOGGLE - .text.LED_GREEN - 0x0000000008000398 0x2c Core/Src/gpio.o - 0x0000000008000398 LED_GREEN - .text.BLUE_BUTTON - 0x00000000080003c4 0x24 Core/Src/gpio.o - 0x00000000080003c4 BLUE_BUTTON - .text.LL_RCC_MSI_Enable - 0x00000000080003e8 0x20 Core/Src/main.o - .text.LL_RCC_MSI_IsReady - 0x0000000008000408 0x24 Core/Src/main.o - .text.LL_RCC_SetSysClkSource - 0x000000000800042c 0x28 Core/Src/main.o - .text.LL_RCC_GetSysClkSource - 0x0000000008000454 0x1c Core/Src/main.o - .text.LL_RCC_SetAHBPrescaler - 0x0000000008000470 0x28 Core/Src/main.o - .text.LL_RCC_SetAPB1Prescaler - 0x0000000008000498 0x28 Core/Src/main.o - .text.LL_RCC_SetAPB2Prescaler - 0x00000000080004c0 0x28 Core/Src/main.o - .text.LL_RCC_PLL_Enable - 0x00000000080004e8 0x20 Core/Src/main.o - .text.LL_RCC_PLL_IsReady - 0x0000000008000508 0x28 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c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - .ARM.attributes - 0x0000000000000056 0x39 Core/Src/gpio.o - .ARM.attributes - 0x000000000000008f 0x39 Core/Src/main.o - .ARM.attributes - 0x00000000000000c8 0x39 Core/Src/stm32l4xx_it.o - .ARM.attributes - 0x0000000000000101 0x39 Core/Src/system_stm32l4xx.o - .ARM.attributes - 0x000000000000013a 0x21 Core/Startup/startup_stm32l476rgtx.o - .ARM.attributes - 0x000000000000015b 0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .ARM.attributes - 0x0000000000000194 0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .ARM.attributes - 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0x0000000000002291 0x11f Core/Src/gpio.o - .debug_macro 0x00000000000023b0 0x1a13d Core/Src/gpio.o - .debug_macro 0x000000000001c4ed 0x43 Core/Src/gpio.o - .debug_macro 0x000000000001c530 0x17a Core/Src/gpio.o - .debug_macro 0x000000000001c6aa 0x3890 Core/Src/gpio.o - .debug_macro 0x000000000001ff3a 0x174 Core/Src/gpio.o - .debug_macro 0x00000000000200ae 0x5c Core/Src/gpio.o - .debug_macro 0x000000000002010a 0x155f Core/Src/gpio.o - .debug_macro 0x0000000000021669 0x59e Core/Src/gpio.o - .debug_macro 0x0000000000021c07 0x13d Core/Src/gpio.o - .debug_macro 0x0000000000021d44 0x18b Core/Src/gpio.o - .debug_macro 0x0000000000021ecf 0x26b Core/Src/gpio.o - .debug_macro 0x000000000002213a 0x23d Core/Src/gpio.o - .debug_macro 0x0000000000022377 0x241 Core/Src/gpio.o - .debug_macro 0x00000000000225b8 0x37c Core/Src/gpio.o - .debug_macro 0x0000000000022934 0xd6 Core/Src/gpio.o - .debug_macro 0x0000000000022a0a 0x22c Core/Src/gpio.o - .debug_macro 0x0000000000022c36 0x61 Core/Src/gpio.o - .debug_macro 0x0000000000022c97 0xa5 Core/Src/gpio.o - .debug_macro 0x0000000000022d3c 0x122 Core/Src/gpio.o - .debug_macro 0x0000000000022e5e 0x3e9 Core/Src/gpio.o - .debug_macro 0x0000000000023247 0x31a Core/Src/gpio.o - .debug_macro 0x0000000000023561 0x4fb Core/Src/gpio.o - .debug_macro 0x0000000000023a5c 0xe4 Core/Src/gpio.o - .debug_macro 0x0000000000023b40 0x331 Core/Src/gpio.o - .debug_macro 0x0000000000023e71 0x1b9 Core/Src/gpio.o - .debug_macro 0x000000000002402a 0x16a Core/Src/gpio.o - .debug_macro 0x0000000000024194 0x20a Core/Src/main.o - .debug_macro 0x000000000002439e 0x708 Core/Src/main.o - .debug_macro 0x0000000000024aa6 0x2f5 Core/Src/main.o - .debug_macro 0x0000000000024d9b 0xa7 Core/Src/main.o - .debug_macro 0x0000000000024e42 0x1a7 Core/Src/main.o - .debug_macro 0x0000000000024fe9 0x239 Core/Src/stm32l4xx_it.o - .debug_macro 0x0000000000025222 0x1d0 Core/Src/system_stm32l4xx.o - .debug_macro 0x00000000000253f2 0x29b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_macro 0x000000000002568d 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - -.debug_line 0x0000000000000000 0x2b6b - .debug_line 0x0000000000000000 0x7e6 Core/Src/gpio.o - .debug_line 0x00000000000007e6 0x8b8 Core/Src/main.o - .debug_line 0x000000000000109e 0x838 Core/Src/stm32l4xx_it.o - .debug_line 0x00000000000018d6 0x6eb Core/Src/system_stm32l4xx.o - .debug_line 0x0000000000001fc1 0x87 Core/Startup/startup_stm32l476rgtx.o - .debug_line 0x0000000000002048 0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - -.debug_str 0x0000000000000000 0xed85b - .debug_str 0x0000000000000000 0xe3da4 Core/Src/gpio.o - 0xe4dab (size before relaxing) - .debug_str 0x00000000000e3da4 0x6009 Core/Src/main.o - 0xeac2b (size before relaxing) - .debug_str 0x00000000000e9dad 0x2bb6 Core/Src/stm32l4xx_it.o - 0xed404 (size before relaxing) - .debug_str 0x00000000000ec963 0x79 Core/Src/system_stm32l4xx.o - 0xe3959 (size before relaxing) - .debug_str 0x00000000000ec9dc 0x36 Core/Startup/startup_stm32l476rgtx.o - 0x62 (size before relaxing) - .debug_str 0x00000000000eca12 0xe49 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - 0xea58d (size before relaxing) - -.comment 0x0000000000000000 0x7b - .comment 0x0000000000000000 0x7b Core/Src/gpio.o - 0x7c (size before relaxing) - .comment 0x000000000000007b 0x7c Core/Src/main.o - .comment 0x000000000000007b 0x7c Core/Src/stm32l4xx_it.o - .comment 0x000000000000007b 0x7c Core/Src/system_stm32l4xx.o - .comment 0x000000000000007b 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - -.debug_frame 0x0000000000000000 0xa64 - .debug_frame 0x0000000000000000 0x1a0 Core/Src/gpio.o - .debug_frame 0x00000000000001a0 0x254 Core/Src/main.o - .debug_frame 0x00000000000003f4 0xf0 Core/Src/stm32l4xx_it.o - .debug_frame 0x00000000000004e4 0x58 Core/Src/system_stm32l4xx.o - .debug_frame 0x000000000000053c 0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_frame 0x0000000000000a38 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) diff --git a/RealOne/Debug/RealOne.bin b/RealOne/Debug/RealOne.bin index 4b588c9..61dc094 100644 Binary files a/RealOne/Debug/RealOne.bin and b/RealOne/Debug/RealOne.bin differ diff --git a/RealOne/Debug/RealOne.elf b/RealOne/Debug/RealOne.elf index 5a6ac84..f53554e 100644 Binary files a/RealOne/Debug/RealOne.elf and b/RealOne/Debug/RealOne.elf differ diff --git a/RealOne/Debug/RealOne.list b/RealOne/Debug/RealOne.list index ac97c0c..9309953 100644 --- a/RealOne/Debug/RealOne.list +++ b/RealOne/Debug/RealOne.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000188 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00000e0c 08000188 08000188 00010188 2**2 + 1 .text 00001208 08000188 08000188 00010188 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000000 08000f94 08000f94 0002000c 2**0 + 2 .rodata 00000000 08001390 08001390 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 3 .ARM.extab 00000000 08000f94 08000f94 0002000c 2**0 + 3 .ARM.extab 00000000 08001390 08001390 0002000c 2**0 CONTENTS - 4 .ARM 00000000 08000f94 08000f94 0002000c 2**0 + 4 .ARM 00000000 08001390 08001390 0002000c 2**0 CONTENTS - 5 .preinit_array 00000000 08000f94 08000f94 0002000c 2**0 + 5 .preinit_array 00000000 08001390 08001390 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08000f94 08000f94 00010f94 2**2 + 6 .init_array 00000004 08001390 08001390 00011390 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08000f98 08000f98 00010f98 2**2 + 7 .fini_array 00000004 08001394 08001394 00011394 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 08000f9c 00020000 2**2 + 8 .data 0000000c 20000000 08001398 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000024 2000000c 08000fa8 0002000c 2**2 + 9 .bss 00000024 2000000c 080013a4 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000600 20000030 08000fa8 00020030 2**0 + 10 ._user_heap_stack 00000600 20000030 080013a4 00020030 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0002000c 2**0 CONTENTS, READONLY - 12 .debug_info 00004be7 00000000 00000000 0002003c 2**0 + 12 .debug_info 00005321 00000000 00000000 0002003c 2**0 CONTENTS, READONLY, DEBUGGING - 13 .debug_abbrev 00000d51 00000000 00000000 00024c23 2**0 + 13 .debug_abbrev 00000e11 00000000 00000000 0002535d 2**0 CONTENTS, READONLY, DEBUGGING - 14 .debug_aranges 000005c0 00000000 00000000 00025978 2**3 + 14 .debug_aranges 00000668 00000000 00000000 00026170 2**3 CONTENTS, READONLY, DEBUGGING - 15 .debug_ranges 00000548 00000000 00000000 00025f38 2**3 + 15 .debug_ranges 000005f0 00000000 00000000 000267d8 2**3 CONTENTS, READONLY, DEBUGGING - 16 .debug_macro 00026337 00000000 00000000 00026480 2**0 + 16 .debug_macro 0002682e 00000000 00000000 00026dc8 2**0 CONTENTS, READONLY, DEBUGGING - 17 .debug_line 00004155 00000000 00000000 0004c7b7 2**0 + 17 .debug_line 00004387 00000000 00000000 0004d5f6 2**0 CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000ee8e8 00000000 00000000 0005090c 2**0 + 18 .debug_str 000f056b 00000000 00000000 0005197d 2**0 CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 0013f1f4 2**0 + 19 .comment 0000007b 00000000 00000000 00141ee8 2**0 CONTENTS, READONLY - 20 .debug_frame 000015dc 00000000 00000000 0013f270 2**2 + 20 .debug_frame 000018fc 00000000 00000000 00141f64 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -62,7 +62,7 @@ Disassembly of section .text: 800019e: bd10 pop {r4, pc} 80001a0: 2000000c .word 0x2000000c 80001a4: 00000000 .word 0x00000000 - 80001a8: 08000f7c .word 0x08000f7c + 80001a8: 08001378 .word 0x08001378 080001ac : 80001ac: b508 push {r3, lr} @@ -74,7 +74,7 @@ Disassembly of section .text: 80001ba: bd08 pop {r3, pc} 80001bc: 00000000 .word 0x00000000 80001c0: 20000010 .word 0x20000010 - 80001c4: 08000f7c .word 0x08000f7c + 80001c4: 08001378 .word 0x08001378 080001c8 : * @@ -458,2179 +458,2858 @@ return ( !LL_GPIO_IsInputPinSet( BUT_PORT, BUT_PIN ) ); 80003e2: bf00 nop 80003e4: 48000800 .word 0x48000800 -080003e8 : - * @brief Enable Low Speed External (LSE) crystal. - * @rmtoll BDCR LSEON LL_RCC_LSE_Enable - * @retval None - */ -__STATIC_INLINE void LL_RCC_LSE_Enable(void) +080003e8 <__NVIC_EnableIRQ>: + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 80003e8: b480 push {r7} - 80003ea: af00 add r7, sp, #0 - SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); - 80003ec: 4b06 ldr r3, [pc, #24] ; (8000408 ) - 80003ee: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80003f2: 4a05 ldr r2, [pc, #20] ; (8000408 ) - 80003f4: f043 0301 orr.w r3, r3, #1 - 80003f8: f8c2 3090 str.w r3, [r2, #144] ; 0x90 -} - 80003fc: bf00 nop - 80003fe: 46bd mov sp, r7 - 8000400: f85d 7b04 ldr.w r7, [sp], #4 - 8000404: 4770 bx lr - 8000406: bf00 nop - 8000408: 40021000 .word 0x40021000 - -0800040c : - * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH - * @arg @ref LL_RCC_LSEDRIVE_HIGH - * @retval None - */ -__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive) -{ - 800040c: b480 push {r7} - 800040e: b083 sub sp, #12 - 8000410: af00 add r7, sp, #0 - 8000412: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); - 8000414: 4b07 ldr r3, [pc, #28] ; (8000434 ) - 8000416: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 800041a: f023 0218 bic.w r2, r3, #24 - 800041e: 4905 ldr r1, [pc, #20] ; (8000434 ) - 8000420: 687b ldr r3, [r7, #4] - 8000422: 4313 orrs r3, r2 - 8000424: f8c1 3090 str.w r3, [r1, #144] ; 0x90 -} - 8000428: bf00 nop - 800042a: 370c adds r7, #12 - 800042c: 46bd mov sp, r7 - 800042e: f85d 7b04 ldr.w r7, [sp], #4 - 8000432: 4770 bx lr - 8000434: 40021000 .word 0x40021000 - -08000438 : - * @brief Check if LSE oscillator Ready - * @rmtoll BDCR LSERDY LL_RCC_LSE_IsReady - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void) -{ - 8000438: b480 push {r7} - 800043a: af00 add r7, sp, #0 - return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RCC_BDCR_LSERDY) ? 1UL : 0UL); - 800043c: 4b07 ldr r3, [pc, #28] ; (800045c ) - 800043e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8000442: f003 0302 and.w r3, r3, #2 - 8000446: 2b02 cmp r3, #2 - 8000448: d101 bne.n 800044e - 800044a: 2301 movs r3, #1 - 800044c: e000 b.n 8000450 - 800044e: 2300 movs r3, #0 -} - 8000450: 4618 mov r0, r3 - 8000452: 46bd mov sp, r7 - 8000454: f85d 7b04 ldr.w r7, [sp], #4 - 8000458: 4770 bx lr - 800045a: bf00 nop - 800045c: 40021000 .word 0x40021000 - -08000460 : - * @brief Enable MSI oscillator - * @rmtoll CR MSION LL_RCC_MSI_Enable - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_Enable(void) -{ - 8000460: b480 push {r7} - 8000462: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_MSION); - 8000464: 4b05 ldr r3, [pc, #20] ; (800047c ) - 8000466: 681b ldr r3, [r3, #0] - 8000468: 4a04 ldr r2, [pc, #16] ; (800047c ) - 800046a: f043 0301 orr.w r3, r3, #1 - 800046e: 6013 str r3, [r2, #0] -} - 8000470: bf00 nop - 8000472: 46bd mov sp, r7 - 8000474: f85d 7b04 ldr.w r7, [sp], #4 - 8000478: 4770 bx lr - 800047a: bf00 nop - 800047c: 40021000 .word 0x40021000 - -08000480 : - * @brief Check if MSI oscillator Ready - * @rmtoll CR MSIRDY LL_RCC_MSI_IsReady - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void) -{ - 8000480: b480 push {r7} - 8000482: af00 add r7, sp, #0 - return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL); - 8000484: 4b06 ldr r3, [pc, #24] ; (80004a0 ) - 8000486: 681b ldr r3, [r3, #0] - 8000488: f003 0302 and.w r3, r3, #2 - 800048c: 2b02 cmp r3, #2 - 800048e: d101 bne.n 8000494 - 8000490: 2301 movs r3, #1 - 8000492: e000 b.n 8000496 - 8000494: 2300 movs r3, #0 -} - 8000496: 4618 mov r0, r3 - 8000498: 46bd mov sp, r7 - 800049a: f85d 7b04 ldr.w r7, [sp], #4 - 800049e: 4770 bx lr - 80004a0: 40021000 .word 0x40021000 - -080004a4 : - * ready - * @rmtoll CR MSIPLLEN LL_RCC_MSI_EnablePLLMode - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_EnablePLLMode(void) -{ - 80004a4: b480 push {r7} - 80004a6: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_MSIPLLEN); - 80004a8: 4b05 ldr r3, [pc, #20] ; (80004c0 ) - 80004aa: 681b ldr r3, [r3, #0] - 80004ac: 4a04 ldr r2, [pc, #16] ; (80004c0 ) - 80004ae: f043 0304 orr.w r3, r3, #4 - 80004b2: 6013 str r3, [r2, #0] -} - 80004b4: bf00 nop - 80004b6: 46bd mov sp, r7 - 80004b8: f85d 7b04 ldr.w r7, [sp], #4 - 80004bc: 4770 bx lr - 80004be: bf00 nop - 80004c0: 40021000 .word 0x40021000 - -080004c4 : - * MSISRANGE - * @rmtoll CR MSIRGSEL LL_RCC_MSI_EnableRangeSelection - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_EnableRangeSelection(void) -{ - 80004c4: b480 push {r7} - 80004c6: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_MSIRGSEL); - 80004c8: 4b05 ldr r3, [pc, #20] ; (80004e0 ) - 80004ca: 681b ldr r3, [r3, #0] - 80004cc: 4a04 ldr r2, [pc, #16] ; (80004e0 ) - 80004ce: f043 0308 orr.w r3, r3, #8 - 80004d2: 6013 str r3, [r2, #0] -} - 80004d4: bf00 nop - 80004d6: 46bd mov sp, r7 - 80004d8: f85d 7b04 ldr.w r7, [sp], #4 - 80004dc: 4770 bx lr - 80004de: bf00 nop - 80004e0: 40021000 .word 0x40021000 - -080004e4 : - * @arg @ref LL_RCC_MSIRANGE_10 - * @arg @ref LL_RCC_MSIRANGE_11 - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range) -{ - 80004e4: b480 push {r7} - 80004e6: b083 sub sp, #12 - 80004e8: af00 add r7, sp, #0 - 80004ea: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, Range); - 80004ec: 4b06 ldr r3, [pc, #24] ; (8000508 ) - 80004ee: 681b ldr r3, [r3, #0] - 80004f0: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 80004f4: 4904 ldr r1, [pc, #16] ; (8000508 ) - 80004f6: 687b ldr r3, [r7, #4] - 80004f8: 4313 orrs r3, r2 - 80004fa: 600b str r3, [r1, #0] -} - 80004fc: bf00 nop - 80004fe: 370c adds r7, #12 - 8000500: 46bd mov sp, r7 - 8000502: f85d 7b04 ldr.w r7, [sp], #4 - 8000506: 4770 bx lr - 8000508: 40021000 .word 0x40021000 - -0800050c : - * @rmtoll ICSCR MSITRIM LL_RCC_MSI_SetCalibTrimming - * @param Value Between Min_Data = 0 and Max_Data = 255 - * @retval None - */ -__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value) -{ - 800050c: b480 push {r7} - 800050e: b083 sub sp, #12 - 8000510: af00 add r7, sp, #0 - 8000512: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_ICSCR_MSITRIM_Pos); - 8000514: 4b07 ldr r3, [pc, #28] ; (8000534 ) - 8000516: 685b ldr r3, [r3, #4] - 8000518: f423 427f bic.w r2, r3, #65280 ; 0xff00 - 800051c: 687b ldr r3, [r7, #4] - 800051e: 021b lsls r3, r3, #8 - 8000520: 4904 ldr r1, [pc, #16] ; (8000534 ) - 8000522: 4313 orrs r3, r2 - 8000524: 604b str r3, [r1, #4] -} - 8000526: bf00 nop - 8000528: 370c adds r7, #12 - 800052a: 46bd mov sp, r7 - 800052c: f85d 7b04 ldr.w r7, [sp], #4 - 8000530: 4770 bx lr - 8000532: bf00 nop - 8000534: 40021000 .word 0x40021000 - -08000538 : - * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE - * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source) -{ - 8000538: b480 push {r7} - 800053a: b083 sub sp, #12 - 800053c: af00 add r7, sp, #0 - 800053e: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); - 8000540: 4b06 ldr r3, [pc, #24] ; (800055c ) - 8000542: 689b ldr r3, [r3, #8] - 8000544: f023 0203 bic.w r2, r3, #3 - 8000548: 4904 ldr r1, [pc, #16] ; (800055c ) - 800054a: 687b ldr r3, [r7, #4] - 800054c: 4313 orrs r3, r2 - 800054e: 608b str r3, [r1, #8] -} - 8000550: bf00 nop - 8000552: 370c adds r7, #12 - 8000554: 46bd mov sp, r7 - 8000556: f85d 7b04 ldr.w r7, [sp], #4 - 800055a: 4770 bx lr - 800055c: 40021000 .word 0x40021000 - -08000560 : - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE - * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL - */ -__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void) -{ - 8000560: b480 push {r7} - 8000562: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); - 8000564: 4b04 ldr r3, [pc, #16] ; (8000578 ) - 8000566: 689b ldr r3, [r3, #8] - 8000568: f003 030c and.w r3, r3, #12 -} - 800056c: 4618 mov r0, r3 - 800056e: 46bd mov sp, r7 - 8000570: f85d 7b04 ldr.w r7, [sp], #4 - 8000574: 4770 bx lr - 8000576: bf00 nop - 8000578: 40021000 .word 0x40021000 - -0800057c : - * @arg @ref LL_RCC_SYSCLK_DIV_256 - * @arg @ref LL_RCC_SYSCLK_DIV_512 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler) -{ - 800057c: b480 push {r7} - 800057e: b083 sub sp, #12 - 8000580: af00 add r7, sp, #0 - 8000582: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); - 8000584: 4b06 ldr r3, [pc, #24] ; (80005a0 ) - 8000586: 689b ldr r3, [r3, #8] - 8000588: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 800058c: 4904 ldr r1, [pc, #16] ; (80005a0 ) - 800058e: 687b ldr r3, [r7, #4] - 8000590: 4313 orrs r3, r2 - 8000592: 608b str r3, [r1, #8] -} - 8000594: bf00 nop - 8000596: 370c adds r7, #12 - 8000598: 46bd mov sp, r7 - 800059a: f85d 7b04 ldr.w r7, [sp], #4 - 800059e: 4770 bx lr - 80005a0: 40021000 .word 0x40021000 - -080005a4 : - * @arg @ref LL_RCC_APB1_DIV_8 - * @arg @ref LL_RCC_APB1_DIV_16 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler) -{ - 80005a4: b480 push {r7} - 80005a6: b083 sub sp, #12 - 80005a8: af00 add r7, sp, #0 - 80005aa: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); - 80005ac: 4b06 ldr r3, [pc, #24] ; (80005c8 ) - 80005ae: 689b ldr r3, [r3, #8] - 80005b0: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 80005b4: 4904 ldr r1, [pc, #16] ; (80005c8 ) - 80005b6: 687b ldr r3, [r7, #4] - 80005b8: 4313 orrs r3, r2 - 80005ba: 608b str r3, [r1, #8] -} - 80005bc: bf00 nop - 80005be: 370c adds r7, #12 - 80005c0: 46bd mov sp, r7 - 80005c2: f85d 7b04 ldr.w r7, [sp], #4 - 80005c6: 4770 bx lr - 80005c8: 40021000 .word 0x40021000 - -080005cc : - * @arg @ref LL_RCC_APB2_DIV_8 - * @arg @ref LL_RCC_APB2_DIV_16 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) -{ - 80005cc: b480 push {r7} - 80005ce: b083 sub sp, #12 - 80005d0: af00 add r7, sp, #0 - 80005d2: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); - 80005d4: 4b06 ldr r3, [pc, #24] ; (80005f0 ) - 80005d6: 689b ldr r3, [r3, #8] - 80005d8: f423 5260 bic.w r2, r3, #14336 ; 0x3800 - 80005dc: 4904 ldr r1, [pc, #16] ; (80005f0 ) - 80005de: 687b ldr r3, [r7, #4] - 80005e0: 4313 orrs r3, r2 - 80005e2: 608b str r3, [r1, #8] -} - 80005e4: bf00 nop - 80005e6: 370c adds r7, #12 - 80005e8: 46bd mov sp, r7 - 80005ea: f85d 7b04 ldr.w r7, [sp], #4 - 80005ee: 4770 bx lr - 80005f0: 40021000 .word 0x40021000 - -080005f4 : - * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI - * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV32 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source) -{ - 80005f4: b480 push {r7} - 80005f6: b083 sub sp, #12 - 80005f8: af00 add r7, sp, #0 - 80005fa: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); - 80005fc: 4b07 ldr r3, [pc, #28] ; (800061c ) - 80005fe: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8000602: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8000606: 4905 ldr r1, [pc, #20] ; (800061c ) - 8000608: 687b ldr r3, [r7, #4] - 800060a: 4313 orrs r3, r2 - 800060c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 -} - 8000610: bf00 nop - 8000612: 370c adds r7, #12 - 8000614: 46bd mov sp, r7 - 8000616: f85d 7b04 ldr.w r7, [sp], #4 - 800061a: 4770 bx lr - 800061c: 40021000 .word 0x40021000 - -08000620 : - * @brief Enable RTC - * @rmtoll BDCR RTCEN LL_RCC_EnableRTC - * @retval None - */ -__STATIC_INLINE void LL_RCC_EnableRTC(void) -{ - 8000620: b480 push {r7} - 8000622: af00 add r7, sp, #0 - SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN); - 8000624: 4b06 ldr r3, [pc, #24] ; (8000640 ) - 8000626: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 800062a: 4a05 ldr r2, [pc, #20] ; (8000640 ) - 800062c: f443 4300 orr.w r3, r3, #32768 ; 0x8000 - 8000630: f8c2 3090 str.w r3, [r2, #144] ; 0x90 -} - 8000634: bf00 nop - 8000636: 46bd mov sp, r7 - 8000638: f85d 7b04 ldr.w r7, [sp], #4 - 800063c: 4770 bx lr - 800063e: bf00 nop - 8000640: 40021000 .word 0x40021000 - -08000644 : - * @brief Release the Backup domain reset - * @rmtoll BDCR BDRST LL_RCC_ReleaseBackupDomainReset - * @retval None - */ -__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void) -{ - 8000644: b480 push {r7} - 8000646: af00 add r7, sp, #0 - CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST); - 8000648: 4b06 ldr r3, [pc, #24] ; (8000664 ) - 800064a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 800064e: 4a05 ldr r2, [pc, #20] ; (8000664 ) - 8000650: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8000654: f8c2 3090 str.w r3, [r2, #144] ; 0x90 -} - 8000658: bf00 nop - 800065a: 46bd mov sp, r7 - 800065c: f85d 7b04 ldr.w r7, [sp], #4 - 8000660: 4770 bx lr - 8000662: bf00 nop - 8000664: 40021000 .word 0x40021000 - -08000668 : - * @brief Enable PLL - * @rmtoll CR PLLON LL_RCC_PLL_Enable - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_Enable(void) -{ - 8000668: b480 push {r7} - 800066a: af00 add r7, sp, #0 - SET_BIT(RCC->CR, RCC_CR_PLLON); - 800066c: 4b05 ldr r3, [pc, #20] ; (8000684 ) - 800066e: 681b ldr r3, [r3, #0] - 8000670: 4a04 ldr r2, [pc, #16] ; (8000684 ) - 8000672: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 8000676: 6013 str r3, [r2, #0] -} - 8000678: bf00 nop - 800067a: 46bd mov sp, r7 - 800067c: f85d 7b04 ldr.w r7, [sp], #4 - 8000680: 4770 bx lr - 8000682: bf00 nop - 8000684: 40021000 .word 0x40021000 - -08000688 : - * @brief Check if PLL Ready - * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void) -{ - 8000688: b480 push {r7} - 800068a: af00 add r7, sp, #0 - return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL); - 800068c: 4b07 ldr r3, [pc, #28] ; (80006ac ) - 800068e: 681b ldr r3, [r3, #0] - 8000690: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8000694: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8000698: d101 bne.n 800069e - 800069a: 2301 movs r3, #1 - 800069c: e000 b.n 80006a0 - 800069e: 2300 movs r3, #0 -} - 80006a0: 4618 mov r0, r3 - 80006a2: 46bd mov sp, r7 - 80006a4: f85d 7b04 ldr.w r7, [sp], #4 - 80006a8: 4770 bx lr - 80006aa: bf00 nop - 80006ac: 40021000 .word 0x40021000 - -080006b0 : - * @arg @ref LL_RCC_PLLR_DIV_6 - * @arg @ref LL_RCC_PLLR_DIV_8 - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) -{ - 80006b0: b480 push {r7} - 80006b2: b085 sub sp, #20 - 80006b4: af00 add r7, sp, #0 - 80006b6: 60f8 str r0, [r7, #12] - 80006b8: 60b9 str r1, [r7, #8] - 80006ba: 607a str r2, [r7, #4] - 80006bc: 603b str r3, [r7, #0] - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR, - 80006be: 4b0a ldr r3, [pc, #40] ; (80006e8 ) - 80006c0: 68da ldr r2, [r3, #12] - 80006c2: 4b0a ldr r3, [pc, #40] ; (80006ec ) - 80006c4: 4013 ands r3, r2 - 80006c6: 68f9 ldr r1, [r7, #12] - 80006c8: 68ba ldr r2, [r7, #8] - 80006ca: 4311 orrs r1, r2 - 80006cc: 687a ldr r2, [r7, #4] - 80006ce: 0212 lsls r2, r2, #8 - 80006d0: 4311 orrs r1, r2 - 80006d2: 683a ldr r2, [r7, #0] - 80006d4: 430a orrs r2, r1 - 80006d6: 4904 ldr r1, [pc, #16] ; (80006e8 ) - 80006d8: 4313 orrs r3, r2 - 80006da: 60cb str r3, [r1, #12] - Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLR); -} - 80006dc: bf00 nop - 80006de: 3714 adds r7, #20 - 80006e0: 46bd mov sp, r7 - 80006e2: f85d 7b04 ldr.w r7, [sp], #4 - 80006e6: 4770 bx lr - 80006e8: 40021000 .word 0x40021000 - 80006ec: f9ff808c .word 0xf9ff808c - -080006f0 : - * @brief Enable PLL output mapped on SYSCLK domain - * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_EnableDomain_SYS - * @retval None - */ -__STATIC_INLINE void LL_RCC_PLL_EnableDomain_SYS(void) -{ - 80006f0: b480 push {r7} - 80006f2: af00 add r7, sp, #0 - SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); - 80006f4: 4b05 ldr r3, [pc, #20] ; (800070c ) - 80006f6: 68db ldr r3, [r3, #12] - 80006f8: 4a04 ldr r2, [pc, #16] ; (800070c ) - 80006fa: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 80006fe: 60d3 str r3, [r2, #12] -} - 8000700: bf00 nop - 8000702: 46bd mov sp, r7 - 8000704: f85d 7b04 ldr.w r7, [sp], #4 - 8000708: 4770 bx lr - 800070a: bf00 nop - 800070c: 40021000 .word 0x40021000 - -08000710 : - * - * (*) value not defined in all devices. - * @retval None -*/ -__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) -{ - 8000710: b480 push {r7} - 8000712: b085 sub sp, #20 - 8000714: af00 add r7, sp, #0 - 8000716: 6078 str r0, [r7, #4] - __IO uint32_t tmpreg; - SET_BIT(RCC->APB1ENR1, Periphs); - 8000718: 4b08 ldr r3, [pc, #32] ; (800073c ) - 800071a: 6d9a ldr r2, [r3, #88] ; 0x58 - 800071c: 4907 ldr r1, [pc, #28] ; (800073c ) - 800071e: 687b ldr r3, [r7, #4] - 8000720: 4313 orrs r3, r2 - 8000722: 658b str r3, [r1, #88] ; 0x58 - /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); - 8000724: 4b05 ldr r3, [pc, #20] ; (800073c ) - 8000726: 6d9a ldr r2, [r3, #88] ; 0x58 - 8000728: 687b ldr r3, [r7, #4] - 800072a: 4013 ands r3, r2 - 800072c: 60fb str r3, [r7, #12] - (void)tmpreg; - 800072e: 68fb ldr r3, [r7, #12] -} - 8000730: bf00 nop - 8000732: 3714 adds r7, #20 - 8000734: 46bd mov sp, r7 - 8000736: f85d 7b04 ldr.w r7, [sp], #4 - 800073a: 4770 bx lr - 800073c: 40021000 .word 0x40021000 - -08000740 : - * - * (*) value not defined in all devices. - * @retval None - */ -__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) -{ - 8000740: b480 push {r7} - 8000742: b083 sub sp, #12 - 8000744: af00 add r7, sp, #0 - 8000746: 6078 str r0, [r7, #4] - MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); - 8000748: 4b06 ldr r3, [pc, #24] ; (8000764 ) - 800074a: 681b ldr r3, [r3, #0] - 800074c: f023 0207 bic.w r2, r3, #7 - 8000750: 4904 ldr r1, [pc, #16] ; (8000764 ) - 8000752: 687b ldr r3, [r7, #4] - 8000754: 4313 orrs r3, r2 - 8000756: 600b str r3, [r1, #0] -} - 8000758: bf00 nop - 800075a: 370c adds r7, #12 - 800075c: 46bd mov sp, r7 - 800075e: f85d 7b04 ldr.w r7, [sp], #4 - 8000762: 4770 bx lr - 8000764: 40022000 .word 0x40022000 - -08000768 : - * @arg @ref LL_FLASH_LATENCY_15 (*) - * - * (*) value not defined in all devices. - */ -__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) -{ - 8000768: b480 push {r7} - 800076a: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); - 800076c: 4b04 ldr r3, [pc, #16] ; (8000780 ) - 800076e: 681b ldr r3, [r3, #0] - 8000770: f003 0307 and.w r3, r3, #7 -} - 8000774: 4618 mov r0, r3 - 8000776: 46bd mov sp, r7 - 8000778: f85d 7b04 ldr.w r7, [sp], #4 - 800077c: 4770 bx lr - 800077e: bf00 nop - 8000780: 40022000 .word 0x40022000 - -08000784 : - * @brief Enable SysTick exception request - * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT - * @retval None - */ -__STATIC_INLINE void LL_SYSTICK_EnableIT(void) -{ - 8000784: b480 push {r7} - 8000786: af00 add r7, sp, #0 - SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); - 8000788: 4b05 ldr r3, [pc, #20] ; (80007a0 ) - 800078a: 681b ldr r3, [r3, #0] - 800078c: 4a04 ldr r2, [pc, #16] ; (80007a0 ) - 800078e: f043 0302 orr.w r3, r3, #2 - 8000792: 6013 str r3, [r2, #0] -} - 8000794: bf00 nop - 8000796: 46bd mov sp, r7 - 8000798: f85d 7b04 ldr.w r7, [sp], #4 - 800079c: 4770 bx lr - 800079e: bf00 nop - 80007a0: e000e010 .word 0xe000e010 - -080007a4 : - * @brief Processor uses sleep as its low power mode - * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep - * @retval None - */ -__STATIC_INLINE void LL_LPM_EnableSleep(void) -{ - 80007a4: b480 push {r7} - 80007a6: af00 add r7, sp, #0 - /* Clear SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - 80007a8: 4b05 ldr r3, [pc, #20] ; (80007c0 ) - 80007aa: 691b ldr r3, [r3, #16] - 80007ac: 4a04 ldr r2, [pc, #16] ; (80007c0 ) - 80007ae: f023 0304 bic.w r3, r3, #4 - 80007b2: 6113 str r3, [r2, #16] -} - 80007b4: bf00 nop - 80007b6: 46bd mov sp, r7 - 80007b8: f85d 7b04 ldr.w r7, [sp], #4 - 80007bc: 4770 bx lr - 80007be: bf00 nop - 80007c0: e000ed00 .word 0xe000ed00 - -080007c4 : - * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 - * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 - * @retval None - */ -__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) -{ - 80007c4: b480 push {r7} - 80007c6: b083 sub sp, #12 - 80007c8: af00 add r7, sp, #0 - 80007ca: 6078 str r0, [r7, #4] - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); - 80007cc: 4b06 ldr r3, [pc, #24] ; (80007e8 ) - 80007ce: 681b ldr r3, [r3, #0] - 80007d0: f423 62c0 bic.w r2, r3, #1536 ; 0x600 - 80007d4: 4904 ldr r1, [pc, #16] ; (80007e8 ) - 80007d6: 687b ldr r3, [r7, #4] - 80007d8: 4313 orrs r3, r2 - 80007da: 600b str r3, [r1, #0] -} - 80007dc: bf00 nop - 80007de: 370c adds r7, #12 - 80007e0: 46bd mov sp, r7 - 80007e2: f85d 7b04 ldr.w r7, [sp], #4 - 80007e6: 4770 bx lr - 80007e8: 40007000 .word 0x40007000 - -080007ec : - * @brief Enable access to the backup domain - * @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess - * @retval None - */ -__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) -{ - 80007ec: b480 push {r7} - 80007ee: af00 add r7, sp, #0 - SET_BIT(PWR->CR1, PWR_CR1_DBP); - 80007f0: 4b05 ldr r3, [pc, #20] ; (8000808 ) - 80007f2: 681b ldr r3, [r3, #0] - 80007f4: 4a04 ldr r2, [pc, #16] ; (8000808 ) - 80007f6: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80007fa: 6013 str r3, [r2, #0] -} - 80007fc: bf00 nop - 80007fe: 46bd mov sp, r7 - 8000800: f85d 7b04 ldr.w r7, [sp], #4 - 8000804: 4770 bx lr - 8000806: bf00 nop - 8000808: 40007000 .word 0x40007000 - -0800080c : - * @brief Disable access to the backup domain - * @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess - * @retval None - */ -__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) -{ - 800080c: b480 push {r7} - 800080e: af00 add r7, sp, #0 - CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); - 8000810: 4b05 ldr r3, [pc, #20] ; (8000828 ) - 8000812: 681b ldr r3, [r3, #0] - 8000814: 4a04 ldr r2, [pc, #16] ; (8000828 ) - 8000816: f423 7380 bic.w r3, r3, #256 ; 0x100 - 800081a: 6013 str r3, [r2, #0] -} - 800081c: bf00 nop - 800081e: 46bd mov sp, r7 - 8000820: f85d 7b04 ldr.w r7, [sp], #4 - 8000824: 4770 bx lr - 8000826: bf00 nop - 8000828: 40007000 .word 0x40007000 - -0800082c : -volatile uint32_t msTicks = 0; -volatile uint8_t expe = 0; -volatile uint8_t blue_mode = 0; - -void SysTick_Handler() -{ - 800082c: b580 push {r7, lr} - 800082e: af00 add r7, sp, #0 - if ( BLUE_BUTTON() ){ - 8000830: f7ff fdc8 bl 80003c4 - 8000834: 4603 mov r3, r0 - 8000836: 2b00 cmp r3, #0 - 8000838: d002 beq.n 8000840 - blue_mode = 1 ; - 800083a: 4b18 ldr r3, [pc, #96] ; (800089c ) - 800083c: 2201 movs r2, #1 - 800083e: 701a strb r2, [r3, #0] - } - - msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ - 8000840: 4b17 ldr r3, [pc, #92] ; (80008a0 ) - 8000842: 681b ldr r3, [r3, #0] - 8000844: 3301 adds r3, #1 - 8000846: 4a16 ldr r2, [pc, #88] ; (80008a0 ) - 8000848: 6013 str r3, [r2, #0] - if (msTicks == 5 * expe){ - 800084a: 4b16 ldr r3, [pc, #88] ; (80008a4 ) - 800084c: 781b ldrb r3, [r3, #0] - 800084e: b2db uxtb r3, r3 - 8000850: 461a mov r2, r3 - 8000852: 4613 mov r3, r2 - 8000854: 009b lsls r3, r3, #2 - 8000856: 4413 add r3, r2 - 8000858: 461a mov r2, r3 - 800085a: 4b11 ldr r3, [pc, #68] ; (80008a0 ) - 800085c: 681b ldr r3, [r3, #0] - 800085e: 429a cmp r2, r3 - 8000860: d103 bne.n 800086a - LED_GREEN(0); - 8000862: 2000 movs r0, #0 - 8000864: f7ff fd98 bl 8000398 - 8000868: e009 b.n 800087e - }else if(msTicks >= 200){ - 800086a: 4b0d ldr r3, [pc, #52] ; (80008a0 ) - 800086c: 681b ldr r3, [r3, #0] - 800086e: 2bc7 cmp r3, #199 ; 0xc7 - 8000870: d905 bls.n 800087e - msTicks = 0; - 8000872: 4b0b ldr r3, [pc, #44] ; (80008a0 ) - 8000874: 2200 movs r2, #0 - 8000876: 601a str r2, [r3, #0] - LED_GREEN(1); - 8000878: 2001 movs r0, #1 - 800087a: f7ff fd8d bl 8000398 - } - if(expe == 2 || expe == 4){ - 800087e: 4b09 ldr r3, [pc, #36] ; (80008a4 ) - 8000880: 781b ldrb r3, [r3, #0] - 8000882: b2db uxtb r3, r3 - 8000884: 2b02 cmp r3, #2 - 8000886: d004 beq.n 8000892 - 8000888: 4b06 ldr r3, [pc, #24] ; (80008a4 ) - 800088a: 781b ldrb r3, [r3, #0] - 800088c: b2db uxtb r3, r3 - 800088e: 2b04 cmp r3, #4 - 8000890: d101 bne.n 8000896 - CLK_TOGGLE(); - 8000892: f7ff fd75 bl 8000380 - } -} - 8000896: bf00 nop - 8000898: bd80 pop {r7, pc} - 800089a: bf00 nop - 800089c: 2000002d .word 0x2000002d - 80008a0: 20000028 .word 0x20000028 - 80008a4: 2000002c .word 0x2000002c - -080008a8
: - - - - -int main(void) -{ - 80008a8: b580 push {r7, lr} - 80008aa: af00 add r7, sp, #0 - - - // config GPIO - GPIO_init(); - 80008ac: f7ff fd44 bl 8000338 - -// if (RCC->BDCR & RCC_BDCR_LSEON) { - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - 80008b0: f04f 5080 mov.w r0, #268435456 ; 0x10000000 - 80008b4: f7ff ff2c bl 8000710 - LL_PWR_EnableBkUpAccess(); - 80008b8: f7ff ff98 bl 80007ec - - //expe = register RTC - expe = RTC->BKP0R; - 80008bc: 4b35 ldr r3, [pc, #212] ; (8000994 ) - 80008be: 6d1b ldr r3, [r3, #80] ; 0x50 - 80008c0: b2da uxtb r2, r3 - 80008c2: 4b35 ldr r3, [pc, #212] ; (8000998 ) - 80008c4: 701a strb r2, [r3, #0] - if (expe == 0) { - 80008c6: 4b34 ldr r3, [pc, #208] ; (8000998 ) - 80008c8: 781b ldrb r3, [r3, #0] - 80008ca: b2db uxtb r3, r3 - 80008cc: 2b00 cmp r3, #0 - 80008ce: d10f bne.n 80008f0 - SystemClock_Config_24M_LSE(); - 80008d0: f000 f8ce bl 8000a70 - expe = 1; - 80008d4: 4b30 ldr r3, [pc, #192] ; (8000998 ) - 80008d6: 2201 movs r2, #1 - 80008d8: 701a strb r2, [r3, #0] - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - 80008da: f04f 5080 mov.w r0, #268435456 ; 0x10000000 - 80008de: f7ff ff17 bl 8000710 - LL_PWR_EnableBkUpAccess(); - 80008e2: f7ff ff83 bl 80007ec - RTC->BKP0R = expe; - 80008e6: 4b2c ldr r3, [pc, #176] ; (8000998 ) - 80008e8: 781b ldrb r3, [r3, #0] - 80008ea: b2da uxtb r2, r3 - 80008ec: 4b29 ldr r3, [pc, #164] ; (8000994 ) - 80008ee: 651a str r2, [r3, #80] ; 0x50 - } - - if (BLUE_BUTTON()){ - 80008f0: f7ff fd68 bl 80003c4 - 80008f4: 4603 mov r3, r0 - 80008f6: 2b00 cmp r3, #0 - 80008f8: d013 beq.n 8000922 - - expe ++; - 80008fa: 4b27 ldr r3, [pc, #156] ; (8000998 ) - 80008fc: 781b ldrb r3, [r3, #0] - 80008fe: b2db uxtb r3, r3 - 8000900: 3301 adds r3, #1 - 8000902: b2da uxtb r2, r3 - 8000904: 4b24 ldr r3, [pc, #144] ; (8000998 ) - 8000906: 701a strb r2, [r3, #0] - - if (expe > 4) expe = 1; - 8000908: 4b23 ldr r3, [pc, #140] ; (8000998 ) - 800090a: 781b ldrb r3, [r3, #0] - 800090c: b2db uxtb r3, r3 - 800090e: 2b04 cmp r3, #4 - 8000910: d902 bls.n 8000918 - 8000912: 4b21 ldr r3, [pc, #132] ; (8000998 ) - 8000914: 2201 movs r2, #1 - 8000916: 701a strb r2, [r3, #0] - RTC->BKP0R = expe; - 8000918: 4b1f ldr r3, [pc, #124] ; (8000998 ) - 800091a: 781b ldrb r3, [r3, #0] - 800091c: b2da uxtb r2, r3 - 800091e: 4b1d ldr r3, [pc, #116] ; (8000994 ) - 8000920: 651a str r2, [r3, #80] ; 0x50 - } -// }else{ - -// } - LL_PWR_DisableBkUpAccess(); - 8000922: f7ff ff73 bl 800080c - switch(expe){ - 8000926: 4b1c ldr r3, [pc, #112] ; (8000998 ) - 8000928: 781b ldrb r3, [r3, #0] - 800092a: b2db uxtb r3, r3 - 800092c: 2b01 cmp r3, #1 - 800092e: d002 beq.n 8000936 - 8000930: 2b02 cmp r3, #2 - 8000932: d003 beq.n 800093c - 8000934: e005 b.n 8000942 - case 1: - /* Configure the system clock */ - SystemClock_Config_80M(); - 8000936: f000 f901 bl 8000b3c - break; - 800093a: e005 b.n 8000948 - case 2: - /* Configure the system clock */ - SystemClock_Config_24M_LSE(); - 800093c: f000 f898 bl 8000a70 - break; - 8000940: e002 b.n 8000948 - default: //case 3 to 8 - SystemClock_Config_24M_LSE_FL3_VS2(); - 8000942: f000 f82f bl 80009a4 - break; - 8000946: bf00 nop - } - - - // init systick timer (tick period at 1 ms) - LL_Init1msTick( SystemCoreClock ); - 8000948: 4b14 ldr r3, [pc, #80] ; (800099c ) - 800094a: 681b ldr r3, [r3, #0] - 800094c: 4618 mov r0, r3 - 800094e: f000 fad5 bl 8000efc - LL_SYSTICK_EnableIT(); - 8000952: f7ff ff17 bl 8000784 - - //Setup Sleep mode - LL_LPM_EnableSleep(); - 8000956: f7ff ff25 bl 80007a4 - //LL_LPM_EnableSleepOnExit(); - - while (1) { - if (blue_mode){ - 800095a: 4b11 ldr r3, [pc, #68] ; (80009a0 ) - 800095c: 781b ldrb r3, [r3, #0] - 800095e: b2db uxtb r3, r3 - 8000960: 2b00 cmp r3, #0 - 8000962: d0fa beq.n 800095a - switch(expe){ - 8000964: 4b0c ldr r3, [pc, #48] ; (8000998 ) - 8000966: 781b ldrb r3, [r3, #0] - 8000968: b2db uxtb r3, r3 - 800096a: 3b01 subs r3, #1 - 800096c: 2b03 cmp r3, #3 - 800096e: d8f4 bhi.n 800095a - 8000970: a201 add r2, pc, #4 ; (adr r2, 8000978 ) - 8000972: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000976: bf00 nop - 8000978: 08000989 .word 0x08000989 - 800097c: 0800098d .word 0x0800098d - 8000980: 08000989 .word 0x08000989 - 8000984: 0800098d .word 0x0800098d - case 1: - case 3: - __WFI(); - 8000988: bf30 wfi - break; - 800098a: e002 b.n 8000992 - - case 2: - case 4: - LL_RCC_MSI_EnablePLLMode(); - 800098c: f7ff fd8a bl 80004a4 - break; - 8000990: bf00 nop - if (blue_mode){ - 8000992: e7e2 b.n 800095a - 8000994: 40002800 .word 0x40002800 - 8000998: 2000002c .word 0x2000002c - 800099c: 20000000 .word 0x20000000 - 80009a0: 2000002d .word 0x2000002d - -080009a4 : - - } - } -} - -void SystemClock_Config_24M_LSE_FL3_VS2(void){ - 80009a4: b580 push {r7, lr} - 80009a6: af00 add r7, sp, #0 - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - 80009a8: f04f 5080 mov.w r0, #268435456 ; 0x10000000 - 80009ac: f7ff feb0 bl 8000710 - LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); - 80009b0: 2003 movs r0, #3 - 80009b2: f7ff fec5 bl 8000740 - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) - 80009b6: bf00 nop - 80009b8: f7ff fed6 bl 8000768 - 80009bc: 4603 mov r3, r0 - 80009be: 2b03 cmp r3, #3 - 80009c0: d1fa bne.n 80009b8 - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); - 80009c2: f44f 6080 mov.w r0, #1024 ; 0x400 - 80009c6: f7ff fefd bl 80007c4 - LL_RCC_MSI_Enable(); - 80009ca: f7ff fd49 bl 8000460 - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - 80009ce: bf00 nop - 80009d0: f7ff fd56 bl 8000480 - 80009d4: 4603 mov r3, r0 - 80009d6: 2b01 cmp r3, #1 - 80009d8: d1fa bne.n 80009d0 - { - - } - - LL_PWR_EnableBkUpAccess(); - 80009da: f7ff ff07 bl 80007ec -// LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - 80009de: f7ff fe31 bl 8000644 - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - 80009e2: 2000 movs r0, #0 - 80009e4: f7ff fd12 bl 800040c - - LL_RCC_MSI_EnableRangeSelection(); - 80009e8: f7ff fd6c bl 80004c4 - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - 80009ec: 2060 movs r0, #96 ; 0x60 - 80009ee: f7ff fd79 bl 80004e4 - LL_RCC_MSI_SetCalibTrimming(0); - 80009f2: 2000 movs r0, #0 - 80009f4: f7ff fd8a bl 800050c - // LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - 80009f8: f7ff fcf6 bl 80003e8 - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - 80009fc: bf00 nop - 80009fe: f7ff fd1b bl 8000438 - 8000a02: 4603 mov r3, r0 - 8000a04: 2b01 cmp r3, #1 - 8000a06: d1fa bne.n 80009fe - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - 8000a08: f44f 7080 mov.w r0, #256 ; 0x100 - 8000a0c: f7ff fdf2 bl 80005f4 - LL_RCC_EnableRTC(); - 8000a10: f7ff fe06 bl 8000620 - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - 8000a14: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 8000a18: 2218 movs r2, #24 - 8000a1a: 2100 movs r1, #0 - 8000a1c: 2001 movs r0, #1 - 8000a1e: f7ff fe47 bl 80006b0 - LL_RCC_PLL_EnableDomain_SYS(); - 8000a22: f7ff fe65 bl 80006f0 - LL_RCC_PLL_Enable(); - 8000a26: f7ff fe1f bl 8000668 - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - 8000a2a: bf00 nop - 8000a2c: f7ff fe2c bl 8000688 - 8000a30: 4603 mov r3, r0 - 8000a32: 2b01 cmp r3, #1 - 8000a34: d1fa bne.n 8000a2c - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 8000a36: 2003 movs r0, #3 - 8000a38: f7ff fd7e bl 8000538 - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 8000a3c: bf00 nop - 8000a3e: f7ff fd8f bl 8000560 - 8000a42: 4603 mov r3, r0 - 8000a44: 2b0c cmp r3, #12 - 8000a46: d1fa bne.n 8000a3e - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 8000a48: 2000 movs r0, #0 - 8000a4a: f7ff fd97 bl 800057c - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 8000a4e: 2000 movs r0, #0 - 8000a50: f7ff fda8 bl 80005a4 - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 8000a54: 2000 movs r0, #0 - 8000a56: f7ff fdb9 bl 80005cc - LL_SetSystemCoreClock(24000000); - 8000a5a: 4804 ldr r0, [pc, #16] ; (8000a6c ) - 8000a5c: f000 fa5a bl 8000f14 - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - 8000a60: 2000 movs r0, #0 - 8000a62: f000 f93f bl 8000ce4 - { - // Error_Handler(); - } -} - 8000a66: bf00 nop - 8000a68: bd80 pop {r7, pc} - 8000a6a: bf00 nop - 8000a6c: 016e3600 .word 0x016e3600 - -08000a70 : - * @brief System Clock Configuration - * @retval None - * 24Mhz + RTC + LSE - */ -void SystemClock_Config_24M_LSE(void) -{ - 8000a70: b580 push {r7, lr} - 8000a72: af00 add r7, sp, #0 - LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); - 8000a74: f04f 5080 mov.w r0, #268435456 ; 0x10000000 - 8000a78: f7ff fe4a bl 8000710 - LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); - 8000a7c: 2001 movs r0, #1 - 8000a7e: f7ff fe5f bl 8000740 - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) - 8000a82: bf00 nop - 8000a84: f7ff fe70 bl 8000768 - 8000a88: 4603 mov r3, r0 - 8000a8a: 2b01 cmp r3, #1 - 8000a8c: d1fa bne.n 8000a84 - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - 8000a8e: f44f 7000 mov.w r0, #512 ; 0x200 - 8000a92: f7ff fe97 bl 80007c4 - LL_RCC_MSI_Enable(); - 8000a96: f7ff fce3 bl 8000460 - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - 8000a9a: bf00 nop - 8000a9c: f7ff fcf0 bl 8000480 - 8000aa0: 4603 mov r3, r0 - 8000aa2: 2b01 cmp r3, #1 - 8000aa4: d1fa bne.n 8000a9c - { - - } - - LL_PWR_EnableBkUpAccess(); - 8000aa6: f7ff fea1 bl 80007ec -// LL_RCC_ForceBackupDomainReset(); - LL_RCC_ReleaseBackupDomainReset(); - 8000aaa: f7ff fdcb bl 8000644 - LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); - 8000aae: 2000 movs r0, #0 - 8000ab0: f7ff fcac bl 800040c - - LL_RCC_MSI_EnableRangeSelection(); - 8000ab4: f7ff fd06 bl 80004c4 - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - 8000ab8: 2060 movs r0, #96 ; 0x60 - 8000aba: f7ff fd13 bl 80004e4 - LL_RCC_MSI_SetCalibTrimming(0); - 8000abe: 2000 movs r0, #0 - 8000ac0: f7ff fd24 bl 800050c - // LL_RCC_MSI_EnablePLLMode(); - - LL_RCC_LSE_Enable(); - 8000ac4: f7ff fc90 bl 80003e8 - - /* Wait till LSE is ready */ - while(LL_RCC_LSE_IsReady() != 1) - 8000ac8: bf00 nop - 8000aca: f7ff fcb5 bl 8000438 - 8000ace: 4603 mov r3, r0 - 8000ad0: 2b01 cmp r3, #1 - 8000ad2: d1fa bne.n 8000aca - { - - } - LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); - 8000ad4: f44f 7080 mov.w r0, #256 ; 0x100 - 8000ad8: f7ff fd8c bl 80005f4 - LL_RCC_EnableRTC(); - 8000adc: f7ff fda0 bl 8000620 - - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); - 8000ae0: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 8000ae4: 2218 movs r2, #24 - 8000ae6: 2100 movs r1, #0 - 8000ae8: 2001 movs r0, #1 - 8000aea: f7ff fde1 bl 80006b0 - LL_RCC_PLL_EnableDomain_SYS(); - 8000aee: f7ff fdff bl 80006f0 - LL_RCC_PLL_Enable(); - 8000af2: f7ff fdb9 bl 8000668 - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - 8000af6: bf00 nop - 8000af8: f7ff fdc6 bl 8000688 - 8000afc: 4603 mov r3, r0 - 8000afe: 2b01 cmp r3, #1 - 8000b00: d1fa bne.n 8000af8 - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 8000b02: 2003 movs r0, #3 - 8000b04: f7ff fd18 bl 8000538 - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 8000b08: bf00 nop - 8000b0a: f7ff fd29 bl 8000560 - 8000b0e: 4603 mov r3, r0 - 8000b10: 2b0c cmp r3, #12 - 8000b12: d1fa bne.n 8000b0a - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 8000b14: 2000 movs r0, #0 - 8000b16: f7ff fd31 bl 800057c - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 8000b1a: 2000 movs r0, #0 - 8000b1c: f7ff fd42 bl 80005a4 - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 8000b20: 2000 movs r0, #0 - 8000b22: f7ff fd53 bl 80005cc - LL_SetSystemCoreClock(24000000); - 8000b26: 4804 ldr r0, [pc, #16] ; (8000b38 ) - 8000b28: f000 f9f4 bl 8000f14 - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - 8000b2c: 2000 movs r0, #0 - 8000b2e: f000 f8d9 bl 8000ce4 - { - // Error_Handler(); - } -} - 8000b32: bf00 nop - 8000b34: bd80 pop {r7, pc} - 8000b36: bf00 nop - 8000b38: 016e3600 .word 0x016e3600 - -08000b3c : - - -void SystemClock_Config_80M(void) -{ - 8000b3c: b580 push {r7, lr} - 8000b3e: af00 add r7, sp, #0 - LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - 8000b40: 2004 movs r0, #4 - 8000b42: f7ff fdfd bl 8000740 - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) - 8000b46: bf00 nop - 8000b48: f7ff fe0e bl 8000768 - 8000b4c: 4603 mov r3, r0 - 8000b4e: 2b04 cmp r3, #4 - 8000b50: d1fa bne.n 8000b48 - { - } - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - 8000b52: f44f 7000 mov.w r0, #512 ; 0x200 - 8000b56: f7ff fe35 bl 80007c4 - LL_RCC_MSI_Enable(); - 8000b5a: f7ff fc81 bl 8000460 - - /* Wait till MSI is ready */ - while(LL_RCC_MSI_IsReady() != 1) - 8000b5e: bf00 nop - 8000b60: f7ff fc8e bl 8000480 - 8000b64: 4603 mov r3, r0 - 8000b66: 2b01 cmp r3, #1 - 8000b68: d1fa bne.n 8000b60 - { - - } - LL_RCC_MSI_EnableRangeSelection(); - 8000b6a: f7ff fcab bl 80004c4 - LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); - 8000b6e: 2060 movs r0, #96 ; 0x60 - 8000b70: f7ff fcb8 bl 80004e4 - LL_RCC_MSI_SetCalibTrimming(0); - 8000b74: 2000 movs r0, #0 - 8000b76: f7ff fcc9 bl 800050c - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - 8000b7a: 2300 movs r3, #0 - 8000b7c: 2228 movs r2, #40 ; 0x28 - 8000b7e: 2100 movs r1, #0 - 8000b80: 2001 movs r0, #1 - 8000b82: f7ff fd95 bl 80006b0 - LL_RCC_PLL_EnableDomain_SYS(); - 8000b86: f7ff fdb3 bl 80006f0 - LL_RCC_PLL_Enable(); - 8000b8a: f7ff fd6d bl 8000668 - - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - 8000b8e: bf00 nop - 8000b90: f7ff fd7a bl 8000688 - 8000b94: 4603 mov r3, r0 - 8000b96: 2b01 cmp r3, #1 - 8000b98: d1fa bne.n 8000b90 - { - - } - LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 8000b9a: 2003 movs r0, #3 - 8000b9c: f7ff fccc bl 8000538 - - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 8000ba0: bf00 nop - 8000ba2: f7ff fcdd bl 8000560 - 8000ba6: 4603 mov r3, r0 - 8000ba8: 2b0c cmp r3, #12 - 8000baa: d1fa bne.n 8000ba2 - { - - } - LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 8000bac: 2000 movs r0, #0 - 8000bae: f7ff fce5 bl 800057c - LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 8000bb2: 2000 movs r0, #0 - 8000bb4: f7ff fcf6 bl 80005a4 - LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 8000bb8: 2000 movs r0, #0 - 8000bba: f7ff fd07 bl 80005cc - LL_SetSystemCoreClock(80000000); - 8000bbe: 4804 ldr r0, [pc, #16] ; (8000bd0 ) - 8000bc0: f000 f9a8 bl 8000f14 - - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - 8000bc4: 2000 movs r0, #0 - 8000bc6: f000 f88d bl 8000ce4 - { - // Error_Handler(); - } -} - 8000bca: bf00 nop - 8000bcc: bd80 pop {r7, pc} - 8000bce: bf00 nop - 8000bd0: 04c4b400 .word 0x04c4b400 - -08000bd4 : -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ - 8000bd4: b480 push {r7} - 8000bd6: af00 add r7, sp, #0 - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - 8000bd8: bf00 nop - 8000bda: 46bd mov sp, r7 - 8000bdc: f85d 7b04 ldr.w r7, [sp], #4 - 8000be0: 4770 bx lr - -08000be2 : - -/** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ - 8000be2: b480 push {r7} - 8000be4: af00 add r7, sp, #0 - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - 8000be6: e7fe b.n 8000be6 - -08000be8 : - -/** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ - 8000be8: b480 push {r7} - 8000bea: af00 add r7, sp, #0 - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - 8000bec: e7fe b.n 8000bec - -08000bee : - -/** - * @brief This function handles Prefetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ - 8000bee: b480 push {r7} - 8000bf0: af00 add r7, sp, #0 - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - 8000bf2: e7fe b.n 8000bf2 - -08000bf4 : - -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - 8000bf4: b480 push {r7} - 8000bf6: af00 add r7, sp, #0 - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - 8000bf8: e7fe b.n 8000bf8 - -08000bfa : - -/** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ - 8000bfa: b480 push {r7} - 8000bfc: af00 add r7, sp, #0 - - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ - - /* USER CODE END SVCall_IRQn 1 */ -} - 8000bfe: bf00 nop - 8000c00: 46bd mov sp, r7 - 8000c02: f85d 7b04 ldr.w r7, [sp], #4 - 8000c06: 4770 bx lr - -08000c08 : - -/** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ - 8000c08: b480 push {r7} - 8000c0a: af00 add r7, sp, #0 - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - 8000c0c: bf00 nop - 8000c0e: 46bd mov sp, r7 - 8000c10: f85d 7b04 ldr.w r7, [sp], #4 - 8000c14: 4770 bx lr - -08000c16 : - -/** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ - 8000c16: b480 push {r7} - 8000c18: af00 add r7, sp, #0 - - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ - - /* USER CODE END PendSV_IRQn 1 */ -} - 8000c1a: bf00 nop - 8000c1c: 46bd mov sp, r7 - 8000c1e: f85d 7b04 ldr.w r7, [sp], #4 - 8000c22: 4770 bx lr - -08000c24 : - * @param None - * @retval None - */ - -void SystemInit(void) -{ - 8000c24: b480 push {r7} - 8000c26: af00 add r7, sp, #0 - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8000c28: 4b17 ldr r3, [pc, #92] ; (8000c88 ) - 8000c2a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8000c2e: 4a16 ldr r2, [pc, #88] ; (8000c88 ) - 8000c30: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8000c34: f8c2 3088 str.w r3, [r2, #136] ; 0x88 - #endif - - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set MSION bit */ - RCC->CR |= RCC_CR_MSION; - 8000c38: 4b14 ldr r3, [pc, #80] ; (8000c8c ) - 8000c3a: 681b ldr r3, [r3, #0] - 8000c3c: 4a13 ldr r2, [pc, #76] ; (8000c8c ) - 8000c3e: f043 0301 orr.w r3, r3, #1 - 8000c42: 6013 str r3, [r2, #0] - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000U; - 8000c44: 4b11 ldr r3, [pc, #68] ; (8000c8c ) - 8000c46: 2200 movs r2, #0 - 8000c48: 609a str r2, [r3, #8] - - /* Reset HSEON, CSSON , HSION, and PLLON bits */ - RCC->CR &= 0xEAF6FFFFU; - 8000c4a: 4b10 ldr r3, [pc, #64] ; (8000c8c ) - 8000c4c: 681b ldr r3, [r3, #0] - 8000c4e: 4a0f ldr r2, [pc, #60] ; (8000c8c ) - 8000c50: f023 53a8 bic.w r3, r3, #352321536 ; 0x15000000 - 8000c54: f423 2310 bic.w r3, r3, #589824 ; 0x90000 - 8000c58: 6013 str r3, [r2, #0] - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = 0x00001000U; - 8000c5a: 4b0c ldr r3, [pc, #48] ; (8000c8c ) - 8000c5c: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8000c60: 60da str r2, [r3, #12] - - /* Reset HSEBYP bit */ - RCC->CR &= 0xFFFBFFFFU; - 8000c62: 4b0a ldr r3, [pc, #40] ; (8000c8c ) - 8000c64: 681b ldr r3, [r3, #0] - 8000c66: 4a09 ldr r2, [pc, #36] ; (8000c8c ) - 8000c68: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8000c6c: 6013 str r3, [r2, #0] - - /* Disable all interrupts */ - RCC->CIER = 0x00000000U; - 8000c6e: 4b07 ldr r3, [pc, #28] ; (8000c8c ) - 8000c70: 2200 movs r2, #0 - 8000c72: 619a str r2, [r3, #24] - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 8000c74: 4b04 ldr r3, [pc, #16] ; (8000c88 ) - 8000c76: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 8000c7a: 609a str r2, [r3, #8] -#endif -} - 8000c7c: bf00 nop - 8000c7e: 46bd mov sp, r7 - 8000c80: f85d 7b04 ldr.w r7, [sp], #4 - 8000c84: 4770 bx lr - 8000c86: bf00 nop - 8000c88: e000ed00 .word 0xe000ed00 - 8000c8c: 40021000 .word 0x40021000 - -08000c90 : - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* Set stack pointer */ - 8000c90: f8df d034 ldr.w sp, [pc, #52] ; 8000cc8 - -/* Call the clock system initialization function.*/ - bl SystemInit - 8000c94: f7ff ffc6 bl 8000c24 - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - 8000c98: 2100 movs r1, #0 - b LoopCopyDataInit - 8000c9a: e003 b.n 8000ca4 - -08000c9c : - -CopyDataInit: - ldr r3, =_sidata - 8000c9c: 4b0b ldr r3, [pc, #44] ; (8000ccc ) - ldr r3, [r3, r1] - 8000c9e: 585b ldr r3, [r3, r1] - str r3, [r0, r1] - 8000ca0: 5043 str r3, [r0, r1] - adds r1, r1, #4 - 8000ca2: 3104 adds r1, #4 - -08000ca4 : - -LoopCopyDataInit: - ldr r0, =_sdata - 8000ca4: 480a ldr r0, [pc, #40] ; (8000cd0 ) - ldr r3, =_edata - 8000ca6: 4b0b ldr r3, [pc, #44] ; (8000cd4 ) - adds r2, r0, r1 - 8000ca8: 1842 adds r2, r0, r1 - cmp r2, r3 - 8000caa: 429a cmp r2, r3 - bcc CopyDataInit - 8000cac: d3f6 bcc.n 8000c9c - ldr r2, =_sbss - 8000cae: 4a0a ldr r2, [pc, #40] ; (8000cd8 ) - b LoopFillZerobss - 8000cb0: e002 b.n 8000cb8 - -08000cb2 : -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - 8000cb2: 2300 movs r3, #0 - str r3, [r2], #4 - 8000cb4: f842 3b04 str.w r3, [r2], #4 - -08000cb8 : - -LoopFillZerobss: - ldr r3, = _ebss - 8000cb8: 4b08 ldr r3, [pc, #32] ; (8000cdc ) - cmp r2, r3 - 8000cba: 429a cmp r2, r3 - bcc FillZerobss - 8000cbc: d3f9 bcc.n 8000cb2 - -/* Call static constructors */ - bl __libc_init_array - 8000cbe: f000 f939 bl 8000f34 <__libc_init_array> -/* Call the application's entry point.*/ - bl main - 8000cc2: f7ff fdf1 bl 80008a8
- -08000cc6 : - -LoopForever: - b LoopForever - 8000cc6: e7fe b.n 8000cc6 - ldr sp, =_estack /* Set stack pointer */ - 8000cc8: 20018000 .word 0x20018000 - ldr r3, =_sidata - 8000ccc: 08000f9c .word 0x08000f9c - ldr r0, =_sdata - 8000cd0: 20000000 .word 0x20000000 - ldr r3, =_edata - 8000cd4: 2000000c .word 0x2000000c - ldr r2, =_sbss - 8000cd8: 2000000c .word 0x2000000c - ldr r3, = _ebss - 8000cdc: 20000030 .word 0x20000030 - -08000ce0 : - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - 8000ce0: e7fe b.n 8000ce0 - ... - -08000ce4 : - * implementation in user file. - * @param TickPriority Tick interrupt priority. - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - 8000ce4: b580 push {r7, lr} - 8000ce6: b084 sub sp, #16 - 8000ce8: af00 add r7, sp, #0 - 8000cea: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 8000cec: 2300 movs r3, #0 - 8000cee: 73fb strb r3, [r7, #15] - - /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/ - if ((uint32_t)uwTickFreq != 0U) - 8000cf0: 4b17 ldr r3, [pc, #92] ; (8000d50 ) - 8000cf2: 781b ldrb r3, [r3, #0] - 8000cf4: 2b00 cmp r3, #0 - 8000cf6: d023 beq.n 8000d40 + 80003ea: b083 sub sp, #12 + 80003ec: af00 add r7, sp, #0 + 80003ee: 4603 mov r3, r0 + 80003f0: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 80003f2: f997 3007 ldrsb.w r3, [r7, #7] + 80003f6: 2b00 cmp r3, #0 + 80003f8: db0b blt.n 8000412 <__NVIC_EnableIRQ+0x2a> { - /*Configure the SysTick to have interrupt in 1ms time basis*/ - if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)uwTickFreq)) == 0U) - 8000cf8: 4b16 ldr r3, [pc, #88] ; (8000d54 ) - 8000cfa: 681a ldr r2, [r3, #0] - 8000cfc: 4b14 ldr r3, [pc, #80] ; (8000d50 ) - 8000cfe: 781b ldrb r3, [r3, #0] - 8000d00: 4619 mov r1, r3 - 8000d02: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8000d06: fbb3 f3f1 udiv r3, r3, r1 - 8000d0a: fbb2 f3f3 udiv r3, r2, r3 - 8000d0e: 4618 mov r0, r3 - 8000d10: f000 f8ce bl 8000eb0 - 8000d14: 4603 mov r3, r0 - 8000d16: 2b00 cmp r3, #0 - 8000d18: d10f bne.n 8000d3a - { - /* Configure the SysTick IRQ priority */ - if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8000d1a: 687b ldr r3, [r7, #4] - 8000d1c: 2b0f cmp r3, #15 - 8000d1e: d809 bhi.n 8000d34 - { - HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000d20: 2200 movs r2, #0 - 8000d22: 6879 ldr r1, [r7, #4] - 8000d24: f04f 30ff mov.w r0, #4294967295 - 8000d28: f000 f8a6 bl 8000e78 - uwTickPrio = TickPriority; - 8000d2c: 4a0a ldr r2, [pc, #40] ; (8000d58 ) - 8000d2e: 687b ldr r3, [r7, #4] - 8000d30: 6013 str r3, [r2, #0] - 8000d32: e007 b.n 8000d44 - } - else - { - status = HAL_ERROR; - 8000d34: 2301 movs r3, #1 - 8000d36: 73fb strb r3, [r7, #15] - 8000d38: e004 b.n 8000d44 - } - } - else - { - status = HAL_ERROR; - 8000d3a: 2301 movs r3, #1 - 8000d3c: 73fb strb r3, [r7, #15] - 8000d3e: e001 b.n 8000d44 - } + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 80003fa: 79fb ldrb r3, [r7, #7] + 80003fc: f003 021f and.w r2, r3, #31 + 8000400: 4907 ldr r1, [pc, #28] ; (8000420 <__NVIC_EnableIRQ+0x38>) + 8000402: f997 3007 ldrsb.w r3, [r7, #7] + 8000406: 095b lsrs r3, r3, #5 + 8000408: 2001 movs r0, #1 + 800040a: fa00 f202 lsl.w r2, r0, r2 + 800040e: f841 2023 str.w r2, [r1, r3, lsl #2] + __COMPILER_BARRIER(); } - else - { - status = HAL_ERROR; - 8000d40: 2301 movs r3, #1 - 8000d42: 73fb strb r3, [r7, #15] - } - - /* Return function status */ - return status; - 8000d44: 7bfb ldrb r3, [r7, #15] } - 8000d46: 4618 mov r0, r3 - 8000d48: 3710 adds r7, #16 - 8000d4a: 46bd mov sp, r7 - 8000d4c: bd80 pop {r7, pc} - 8000d4e: bf00 nop - 8000d50: 20000008 .word 0x20000008 - 8000d54: 20000000 .word 0x20000000 - 8000d58: 20000004 .word 0x20000004 + 8000412: bf00 nop + 8000414: 370c adds r7, #12 + 8000416: 46bd mov sp, r7 + 8000418: f85d 7b04 ldr.w r7, [sp], #4 + 800041c: 4770 bx lr + 800041e: bf00 nop + 8000420: e000e100 .word 0xe000e100 -08000d5c <__NVIC_GetPriorityGrouping>: - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - 8000d5c: b480 push {r7} - 8000d5e: af00 add r7, sp, #0 - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8000d60: 4b04 ldr r3, [pc, #16] ; (8000d74 <__NVIC_GetPriorityGrouping+0x18>) - 8000d62: 68db ldr r3, [r3, #12] - 8000d64: 0a1b lsrs r3, r3, #8 - 8000d66: f003 0307 and.w r3, r3, #7 -} - 8000d6a: 4618 mov r0, r3 - 8000d6c: 46bd mov sp, r7 - 8000d6e: f85d 7b04 ldr.w r7, [sp], #4 - 8000d72: 4770 bx lr - 8000d74: e000ed00 .word 0xe000ed00 - -08000d78 <__NVIC_SetPriority>: +08000424 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8000d78: b480 push {r7} - 8000d7a: b083 sub sp, #12 - 8000d7c: af00 add r7, sp, #0 - 8000d7e: 4603 mov r3, r0 - 8000d80: 6039 str r1, [r7, #0] - 8000d82: 71fb strb r3, [r7, #7] + 8000424: b480 push {r7} + 8000426: b083 sub sp, #12 + 8000428: af00 add r7, sp, #0 + 800042a: 4603 mov r3, r0 + 800042c: 6039 str r1, [r7, #0] + 800042e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8000d84: f997 3007 ldrsb.w r3, [r7, #7] - 8000d88: 2b00 cmp r3, #0 - 8000d8a: db0a blt.n 8000da2 <__NVIC_SetPriority+0x2a> + 8000430: f997 3007 ldrsb.w r3, [r7, #7] + 8000434: 2b00 cmp r3, #0 + 8000436: db0a blt.n 800044e <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8000d8c: 683b ldr r3, [r7, #0] - 8000d8e: b2da uxtb r2, r3 - 8000d90: 490c ldr r1, [pc, #48] ; (8000dc4 <__NVIC_SetPriority+0x4c>) - 8000d92: f997 3007 ldrsb.w r3, [r7, #7] - 8000d96: 0112 lsls r2, r2, #4 - 8000d98: b2d2 uxtb r2, r2 - 8000d9a: 440b add r3, r1 - 8000d9c: f883 2300 strb.w r2, [r3, #768] ; 0x300 + 8000438: 683b ldr r3, [r7, #0] + 800043a: b2da uxtb r2, r3 + 800043c: 490c ldr r1, [pc, #48] ; (8000470 <__NVIC_SetPriority+0x4c>) + 800043e: f997 3007 ldrsb.w r3, [r7, #7] + 8000442: 0112 lsls r2, r2, #4 + 8000444: b2d2 uxtb r2, r2 + 8000446: 440b add r3, r1 + 8000448: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8000da0: e00a b.n 8000db8 <__NVIC_SetPriority+0x40> + 800044c: e00a b.n 8000464 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8000da2: 683b ldr r3, [r7, #0] - 8000da4: b2da uxtb r2, r3 - 8000da6: 4908 ldr r1, [pc, #32] ; (8000dc8 <__NVIC_SetPriority+0x50>) - 8000da8: 79fb ldrb r3, [r7, #7] - 8000daa: f003 030f and.w r3, r3, #15 - 8000dae: 3b04 subs r3, #4 - 8000db0: 0112 lsls r2, r2, #4 - 8000db2: b2d2 uxtb r2, r2 - 8000db4: 440b add r3, r1 - 8000db6: 761a strb r2, [r3, #24] + 800044e: 683b ldr r3, [r7, #0] + 8000450: b2da uxtb r2, r3 + 8000452: 4908 ldr r1, [pc, #32] ; (8000474 <__NVIC_SetPriority+0x50>) + 8000454: 79fb ldrb r3, [r7, #7] + 8000456: f003 030f and.w r3, r3, #15 + 800045a: 3b04 subs r3, #4 + 800045c: 0112 lsls r2, r2, #4 + 800045e: b2d2 uxtb r2, r2 + 8000460: 440b add r3, r1 + 8000462: 761a strb r2, [r3, #24] } - 8000db8: bf00 nop - 8000dba: 370c adds r7, #12 - 8000dbc: 46bd mov sp, r7 - 8000dbe: f85d 7b04 ldr.w r7, [sp], #4 - 8000dc2: 4770 bx lr - 8000dc4: e000e100 .word 0xe000e100 - 8000dc8: e000ed00 .word 0xe000ed00 + 8000464: bf00 nop + 8000466: 370c adds r7, #12 + 8000468: 46bd mov sp, r7 + 800046a: f85d 7b04 ldr.w r7, [sp], #4 + 800046e: 4770 bx lr + 8000470: e000e100 .word 0xe000e100 + 8000474: e000ed00 .word 0xe000ed00 -08000dcc : +08000478 : + * @brief Enable Low Speed External (LSE) crystal. + * @rmtoll BDCR LSEON LL_RCC_LSE_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_Enable(void) +{ + 8000478: b480 push {r7} + 800047a: af00 add r7, sp, #0 + SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); + 800047c: 4b06 ldr r3, [pc, #24] ; (8000498 ) + 800047e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8000482: 4a05 ldr r2, [pc, #20] ; (8000498 ) + 8000484: f043 0301 orr.w r3, r3, #1 + 8000488: f8c2 3090 str.w r3, [r2, #144] ; 0x90 +} + 800048c: bf00 nop + 800048e: 46bd mov sp, r7 + 8000490: f85d 7b04 ldr.w r7, [sp], #4 + 8000494: 4770 bx lr + 8000496: bf00 nop + 8000498: 40021000 .word 0x40021000 + +0800049c : + * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH + * @arg @ref LL_RCC_LSEDRIVE_HIGH + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive) +{ + 800049c: b480 push {r7} + 800049e: b083 sub sp, #12 + 80004a0: af00 add r7, sp, #0 + 80004a2: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); + 80004a4: 4b07 ldr r3, [pc, #28] ; (80004c4 ) + 80004a6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80004aa: f023 0218 bic.w r2, r3, #24 + 80004ae: 4905 ldr r1, [pc, #20] ; (80004c4 ) + 80004b0: 687b ldr r3, [r7, #4] + 80004b2: 4313 orrs r3, r2 + 80004b4: f8c1 3090 str.w r3, [r1, #144] ; 0x90 +} + 80004b8: bf00 nop + 80004ba: 370c adds r7, #12 + 80004bc: 46bd mov sp, r7 + 80004be: f85d 7b04 ldr.w r7, [sp], #4 + 80004c2: 4770 bx lr + 80004c4: 40021000 .word 0x40021000 + +080004c8 : + * @brief Check if LSE oscillator Ready + * @rmtoll BDCR LSERDY LL_RCC_LSE_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void) +{ + 80004c8: b480 push {r7} + 80004ca: af00 add r7, sp, #0 + return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RCC_BDCR_LSERDY) ? 1UL : 0UL); + 80004cc: 4b07 ldr r3, [pc, #28] ; (80004ec ) + 80004ce: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80004d2: f003 0302 and.w r3, r3, #2 + 80004d6: 2b02 cmp r3, #2 + 80004d8: d101 bne.n 80004de + 80004da: 2301 movs r3, #1 + 80004dc: e000 b.n 80004e0 + 80004de: 2300 movs r3, #0 +} + 80004e0: 4618 mov r0, r3 + 80004e2: 46bd mov sp, r7 + 80004e4: f85d 7b04 ldr.w r7, [sp], #4 + 80004e8: 4770 bx lr + 80004ea: bf00 nop + 80004ec: 40021000 .word 0x40021000 + +080004f0 : + * @brief Enable MSI oscillator + * @rmtoll CR MSION LL_RCC_MSI_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_MSI_Enable(void) +{ + 80004f0: b480 push {r7} + 80004f2: af00 add r7, sp, #0 + SET_BIT(RCC->CR, RCC_CR_MSION); + 80004f4: 4b05 ldr r3, [pc, #20] ; (800050c ) + 80004f6: 681b ldr r3, [r3, #0] + 80004f8: 4a04 ldr r2, [pc, #16] ; (800050c ) + 80004fa: f043 0301 orr.w r3, r3, #1 + 80004fe: 6013 str r3, [r2, #0] +} + 8000500: bf00 nop + 8000502: 46bd mov sp, r7 + 8000504: f85d 7b04 ldr.w r7, [sp], #4 + 8000508: 4770 bx lr + 800050a: bf00 nop + 800050c: 40021000 .word 0x40021000 + +08000510 : + * @brief Check if MSI oscillator Ready + * @rmtoll CR MSIRDY LL_RCC_MSI_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void) +{ + 8000510: b480 push {r7} + 8000512: af00 add r7, sp, #0 + return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL); + 8000514: 4b06 ldr r3, [pc, #24] ; (8000530 ) + 8000516: 681b ldr r3, [r3, #0] + 8000518: f003 0302 and.w r3, r3, #2 + 800051c: 2b02 cmp r3, #2 + 800051e: d101 bne.n 8000524 + 8000520: 2301 movs r3, #1 + 8000522: e000 b.n 8000526 + 8000524: 2300 movs r3, #0 +} + 8000526: 4618 mov r0, r3 + 8000528: 46bd mov sp, r7 + 800052a: f85d 7b04 ldr.w r7, [sp], #4 + 800052e: 4770 bx lr + 8000530: 40021000 .word 0x40021000 + +08000534 : + * ready + * @rmtoll CR MSIPLLEN LL_RCC_MSI_EnablePLLMode + * @retval None + */ +__STATIC_INLINE void LL_RCC_MSI_EnablePLLMode(void) +{ + 8000534: b480 push {r7} + 8000536: af00 add r7, sp, #0 + SET_BIT(RCC->CR, RCC_CR_MSIPLLEN); + 8000538: 4b05 ldr r3, [pc, #20] ; (8000550 ) + 800053a: 681b ldr r3, [r3, #0] + 800053c: 4a04 ldr r2, [pc, #16] ; (8000550 ) + 800053e: f043 0304 orr.w r3, r3, #4 + 8000542: 6013 str r3, [r2, #0] +} + 8000544: bf00 nop + 8000546: 46bd mov sp, r7 + 8000548: f85d 7b04 ldr.w r7, [sp], #4 + 800054c: 4770 bx lr + 800054e: bf00 nop + 8000550: 40021000 .word 0x40021000 + +08000554 : + * MSISRANGE + * @rmtoll CR MSIRGSEL LL_RCC_MSI_EnableRangeSelection + * @retval None + */ +__STATIC_INLINE void LL_RCC_MSI_EnableRangeSelection(void) +{ + 8000554: b480 push {r7} + 8000556: af00 add r7, sp, #0 + SET_BIT(RCC->CR, RCC_CR_MSIRGSEL); + 8000558: 4b05 ldr r3, [pc, #20] ; (8000570 ) + 800055a: 681b ldr r3, [r3, #0] + 800055c: 4a04 ldr r2, [pc, #16] ; (8000570 ) + 800055e: f043 0308 orr.w r3, r3, #8 + 8000562: 6013 str r3, [r2, #0] +} + 8000564: bf00 nop + 8000566: 46bd mov sp, r7 + 8000568: f85d 7b04 ldr.w r7, [sp], #4 + 800056c: 4770 bx lr + 800056e: bf00 nop + 8000570: 40021000 .word 0x40021000 + +08000574 : + * @arg @ref LL_RCC_MSIRANGE_10 + * @arg @ref LL_RCC_MSIRANGE_11 + * @retval None + */ +__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range) +{ + 8000574: b480 push {r7} + 8000576: b083 sub sp, #12 + 8000578: af00 add r7, sp, #0 + 800057a: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, Range); + 800057c: 4b06 ldr r3, [pc, #24] ; (8000598 ) + 800057e: 681b ldr r3, [r3, #0] + 8000580: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 8000584: 4904 ldr r1, [pc, #16] ; (8000598 ) + 8000586: 687b ldr r3, [r7, #4] + 8000588: 4313 orrs r3, r2 + 800058a: 600b str r3, [r1, #0] +} + 800058c: bf00 nop + 800058e: 370c adds r7, #12 + 8000590: 46bd mov sp, r7 + 8000592: f85d 7b04 ldr.w r7, [sp], #4 + 8000596: 4770 bx lr + 8000598: 40021000 .word 0x40021000 + +0800059c : + * @rmtoll ICSCR MSITRIM LL_RCC_MSI_SetCalibTrimming + * @param Value Between Min_Data = 0 and Max_Data = 255 + * @retval None + */ +__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value) +{ + 800059c: b480 push {r7} + 800059e: b083 sub sp, #12 + 80005a0: af00 add r7, sp, #0 + 80005a2: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_ICSCR_MSITRIM_Pos); + 80005a4: 4b07 ldr r3, [pc, #28] ; (80005c4 ) + 80005a6: 685b ldr r3, [r3, #4] + 80005a8: f423 427f bic.w r2, r3, #65280 ; 0xff00 + 80005ac: 687b ldr r3, [r7, #4] + 80005ae: 021b lsls r3, r3, #8 + 80005b0: 4904 ldr r1, [pc, #16] ; (80005c4 ) + 80005b2: 4313 orrs r3, r2 + 80005b4: 604b str r3, [r1, #4] +} + 80005b6: bf00 nop + 80005b8: 370c adds r7, #12 + 80005ba: 46bd mov sp, r7 + 80005bc: f85d 7b04 ldr.w r7, [sp], #4 + 80005c0: 4770 bx lr + 80005c2: bf00 nop + 80005c4: 40021000 .word 0x40021000 + +080005c8 : + * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE + * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source) +{ + 80005c8: b480 push {r7} + 80005ca: b083 sub sp, #12 + 80005cc: af00 add r7, sp, #0 + 80005ce: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); + 80005d0: 4b06 ldr r3, [pc, #24] ; (80005ec ) + 80005d2: 689b ldr r3, [r3, #8] + 80005d4: f023 0203 bic.w r2, r3, #3 + 80005d8: 4904 ldr r1, [pc, #16] ; (80005ec ) + 80005da: 687b ldr r3, [r7, #4] + 80005dc: 4313 orrs r3, r2 + 80005de: 608b str r3, [r1, #8] +} + 80005e0: bf00 nop + 80005e2: 370c adds r7, #12 + 80005e4: 46bd mov sp, r7 + 80005e6: f85d 7b04 ldr.w r7, [sp], #4 + 80005ea: 4770 bx lr + 80005ec: 40021000 .word 0x40021000 + +080005f0 : + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL + */ +__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void) +{ + 80005f0: b480 push {r7} + 80005f2: af00 add r7, sp, #0 + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); + 80005f4: 4b04 ldr r3, [pc, #16] ; (8000608 ) + 80005f6: 689b ldr r3, [r3, #8] + 80005f8: f003 030c and.w r3, r3, #12 +} + 80005fc: 4618 mov r0, r3 + 80005fe: 46bd mov sp, r7 + 8000600: f85d 7b04 ldr.w r7, [sp], #4 + 8000604: 4770 bx lr + 8000606: bf00 nop + 8000608: 40021000 .word 0x40021000 + +0800060c : + * @arg @ref LL_RCC_SYSCLK_DIV_256 + * @arg @ref LL_RCC_SYSCLK_DIV_512 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler) +{ + 800060c: b480 push {r7} + 800060e: b083 sub sp, #12 + 8000610: af00 add r7, sp, #0 + 8000612: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); + 8000614: 4b06 ldr r3, [pc, #24] ; (8000630 ) + 8000616: 689b ldr r3, [r3, #8] + 8000618: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 800061c: 4904 ldr r1, [pc, #16] ; (8000630 ) + 800061e: 687b ldr r3, [r7, #4] + 8000620: 4313 orrs r3, r2 + 8000622: 608b str r3, [r1, #8] +} + 8000624: bf00 nop + 8000626: 370c adds r7, #12 + 8000628: 46bd mov sp, r7 + 800062a: f85d 7b04 ldr.w r7, [sp], #4 + 800062e: 4770 bx lr + 8000630: 40021000 .word 0x40021000 + +08000634 : + * @arg @ref LL_RCC_APB1_DIV_8 + * @arg @ref LL_RCC_APB1_DIV_16 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler) +{ + 8000634: b480 push {r7} + 8000636: b083 sub sp, #12 + 8000638: af00 add r7, sp, #0 + 800063a: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); + 800063c: 4b06 ldr r3, [pc, #24] ; (8000658 ) + 800063e: 689b ldr r3, [r3, #8] + 8000640: f423 62e0 bic.w r2, r3, #1792 ; 0x700 + 8000644: 4904 ldr r1, [pc, #16] ; (8000658 ) + 8000646: 687b ldr r3, [r7, #4] + 8000648: 4313 orrs r3, r2 + 800064a: 608b str r3, [r1, #8] +} + 800064c: bf00 nop + 800064e: 370c adds r7, #12 + 8000650: 46bd mov sp, r7 + 8000652: f85d 7b04 ldr.w r7, [sp], #4 + 8000656: 4770 bx lr + 8000658: 40021000 .word 0x40021000 + +0800065c : + * @arg @ref LL_RCC_APB2_DIV_8 + * @arg @ref LL_RCC_APB2_DIV_16 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) +{ + 800065c: b480 push {r7} + 800065e: b083 sub sp, #12 + 8000660: af00 add r7, sp, #0 + 8000662: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); + 8000664: 4b06 ldr r3, [pc, #24] ; (8000680 ) + 8000666: 689b ldr r3, [r3, #8] + 8000668: f423 5260 bic.w r2, r3, #14336 ; 0x3800 + 800066c: 4904 ldr r1, [pc, #16] ; (8000680 ) + 800066e: 687b ldr r3, [r7, #4] + 8000670: 4313 orrs r3, r2 + 8000672: 608b str r3, [r1, #8] +} + 8000674: bf00 nop + 8000676: 370c adds r7, #12 + 8000678: 46bd mov sp, r7 + 800067a: f85d 7b04 ldr.w r7, [sp], #4 + 800067e: 4770 bx lr + 8000680: 40021000 .word 0x40021000 + +08000684 : + * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI + * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV32 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source) +{ + 8000684: b480 push {r7} + 8000686: b083 sub sp, #12 + 8000688: af00 add r7, sp, #0 + 800068a: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); + 800068c: 4b07 ldr r3, [pc, #28] ; (80006ac ) + 800068e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8000692: f423 7240 bic.w r2, r3, #768 ; 0x300 + 8000696: 4905 ldr r1, [pc, #20] ; (80006ac ) + 8000698: 687b ldr r3, [r7, #4] + 800069a: 4313 orrs r3, r2 + 800069c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 +} + 80006a0: bf00 nop + 80006a2: 370c adds r7, #12 + 80006a4: 46bd mov sp, r7 + 80006a6: f85d 7b04 ldr.w r7, [sp], #4 + 80006aa: 4770 bx lr + 80006ac: 40021000 .word 0x40021000 + +080006b0 : + * @brief Enable RTC + * @rmtoll BDCR RTCEN LL_RCC_EnableRTC + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableRTC(void) +{ + 80006b0: b480 push {r7} + 80006b2: af00 add r7, sp, #0 + SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN); + 80006b4: 4b06 ldr r3, [pc, #24] ; (80006d0 ) + 80006b6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80006ba: 4a05 ldr r2, [pc, #20] ; (80006d0 ) + 80006bc: f443 4300 orr.w r3, r3, #32768 ; 0x8000 + 80006c0: f8c2 3090 str.w r3, [r2, #144] ; 0x90 +} + 80006c4: bf00 nop + 80006c6: 46bd mov sp, r7 + 80006c8: f85d 7b04 ldr.w r7, [sp], #4 + 80006cc: 4770 bx lr + 80006ce: bf00 nop + 80006d0: 40021000 .word 0x40021000 + +080006d4 : + * @brief Release the Backup domain reset + * @rmtoll BDCR BDRST LL_RCC_ReleaseBackupDomainReset + * @retval None + */ +__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void) +{ + 80006d4: b480 push {r7} + 80006d6: af00 add r7, sp, #0 + CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST); + 80006d8: 4b06 ldr r3, [pc, #24] ; (80006f4 ) + 80006da: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80006de: 4a05 ldr r2, [pc, #20] ; (80006f4 ) + 80006e0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 80006e4: f8c2 3090 str.w r3, [r2, #144] ; 0x90 +} + 80006e8: bf00 nop + 80006ea: 46bd mov sp, r7 + 80006ec: f85d 7b04 ldr.w r7, [sp], #4 + 80006f0: 4770 bx lr + 80006f2: bf00 nop + 80006f4: 40021000 .word 0x40021000 + +080006f8 : + * @brief Enable PLL + * @rmtoll CR PLLON LL_RCC_PLL_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_Enable(void) +{ + 80006f8: b480 push {r7} + 80006fa: af00 add r7, sp, #0 + SET_BIT(RCC->CR, RCC_CR_PLLON); + 80006fc: 4b05 ldr r3, [pc, #20] ; (8000714 ) + 80006fe: 681b ldr r3, [r3, #0] + 8000700: 4a04 ldr r2, [pc, #16] ; (8000714 ) + 8000702: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 8000706: 6013 str r3, [r2, #0] +} + 8000708: bf00 nop + 800070a: 46bd mov sp, r7 + 800070c: f85d 7b04 ldr.w r7, [sp], #4 + 8000710: 4770 bx lr + 8000712: bf00 nop + 8000714: 40021000 .word 0x40021000 + +08000718 : + * @brief Check if PLL Ready + * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void) +{ + 8000718: b480 push {r7} + 800071a: af00 add r7, sp, #0 + return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL); + 800071c: 4b07 ldr r3, [pc, #28] ; (800073c ) + 800071e: 681b ldr r3, [r3, #0] + 8000720: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8000724: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8000728: d101 bne.n 800072e + 800072a: 2301 movs r3, #1 + 800072c: e000 b.n 8000730 + 800072e: 2300 movs r3, #0 +} + 8000730: 4618 mov r0, r3 + 8000732: 46bd mov sp, r7 + 8000734: f85d 7b04 ldr.w r7, [sp], #4 + 8000738: 4770 bx lr + 800073a: bf00 nop + 800073c: 40021000 .word 0x40021000 + +08000740 : + * @arg @ref LL_RCC_PLLR_DIV_6 + * @arg @ref LL_RCC_PLLR_DIV_8 + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) +{ + 8000740: b480 push {r7} + 8000742: b085 sub sp, #20 + 8000744: af00 add r7, sp, #0 + 8000746: 60f8 str r0, [r7, #12] + 8000748: 60b9 str r1, [r7, #8] + 800074a: 607a str r2, [r7, #4] + 800074c: 603b str r3, [r7, #0] + MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR, + 800074e: 4b0a ldr r3, [pc, #40] ; (8000778 ) + 8000750: 68da ldr r2, [r3, #12] + 8000752: 4b0a ldr r3, [pc, #40] ; (800077c ) + 8000754: 4013 ands r3, r2 + 8000756: 68f9 ldr r1, [r7, #12] + 8000758: 68ba ldr r2, [r7, #8] + 800075a: 4311 orrs r1, r2 + 800075c: 687a ldr r2, [r7, #4] + 800075e: 0212 lsls r2, r2, #8 + 8000760: 4311 orrs r1, r2 + 8000762: 683a ldr r2, [r7, #0] + 8000764: 430a orrs r2, r1 + 8000766: 4904 ldr r1, [pc, #16] ; (8000778 ) + 8000768: 4313 orrs r3, r2 + 800076a: 60cb str r3, [r1, #12] + Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLR); +} + 800076c: bf00 nop + 800076e: 3714 adds r7, #20 + 8000770: 46bd mov sp, r7 + 8000772: f85d 7b04 ldr.w r7, [sp], #4 + 8000776: 4770 bx lr + 8000778: 40021000 .word 0x40021000 + 800077c: f9ff808c .word 0xf9ff808c + +08000780 : + * @brief Enable PLL output mapped on SYSCLK domain + * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_EnableDomain_SYS + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_EnableDomain_SYS(void) +{ + 8000780: b480 push {r7} + 8000782: af00 add r7, sp, #0 + SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); + 8000784: 4b05 ldr r3, [pc, #20] ; (800079c ) + 8000786: 68db ldr r3, [r3, #12] + 8000788: 4a04 ldr r2, [pc, #16] ; (800079c ) + 800078a: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 800078e: 60d3 str r3, [r2, #12] +} + 8000790: bf00 nop + 8000792: 46bd mov sp, r7 + 8000794: f85d 7b04 ldr.w r7, [sp], #4 + 8000798: 4770 bx lr + 800079a: bf00 nop + 800079c: 40021000 .word 0x40021000 + +080007a0 : + * + * (*) value not defined in all devices. + * @retval None +*/ +__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) +{ + 80007a0: b480 push {r7} + 80007a2: b085 sub sp, #20 + 80007a4: af00 add r7, sp, #0 + 80007a6: 6078 str r0, [r7, #4] + __IO uint32_t tmpreg; + SET_BIT(RCC->APB1ENR1, Periphs); + 80007a8: 4b08 ldr r3, [pc, #32] ; (80007cc ) + 80007aa: 6d9a ldr r2, [r3, #88] ; 0x58 + 80007ac: 4907 ldr r1, [pc, #28] ; (80007cc ) + 80007ae: 687b ldr r3, [r7, #4] + 80007b0: 4313 orrs r3, r2 + 80007b2: 658b str r3, [r1, #88] ; 0x58 + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); + 80007b4: 4b05 ldr r3, [pc, #20] ; (80007cc ) + 80007b6: 6d9a ldr r2, [r3, #88] ; 0x58 + 80007b8: 687b ldr r3, [r7, #4] + 80007ba: 4013 ands r3, r2 + 80007bc: 60fb str r3, [r7, #12] + (void)tmpreg; + 80007be: 68fb ldr r3, [r7, #12] +} + 80007c0: bf00 nop + 80007c2: 3714 adds r7, #20 + 80007c4: 46bd mov sp, r7 + 80007c6: f85d 7b04 ldr.w r7, [sp], #4 + 80007ca: 4770 bx lr + 80007cc: 40021000 .word 0x40021000 + +080007d0 : + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) +{ + 80007d0: b480 push {r7} + 80007d2: b083 sub sp, #12 + 80007d4: af00 add r7, sp, #0 + 80007d6: 6078 str r0, [r7, #4] + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); + 80007d8: 4b06 ldr r3, [pc, #24] ; (80007f4 ) + 80007da: 681b ldr r3, [r3, #0] + 80007dc: f023 0207 bic.w r2, r3, #7 + 80007e0: 4904 ldr r1, [pc, #16] ; (80007f4 ) + 80007e2: 687b ldr r3, [r7, #4] + 80007e4: 4313 orrs r3, r2 + 80007e6: 600b str r3, [r1, #0] +} + 80007e8: bf00 nop + 80007ea: 370c adds r7, #12 + 80007ec: 46bd mov sp, r7 + 80007ee: f85d 7b04 ldr.w r7, [sp], #4 + 80007f2: 4770 bx lr + 80007f4: 40022000 .word 0x40022000 + +080007f8 : + * @arg @ref LL_FLASH_LATENCY_15 (*) + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) +{ + 80007f8: b480 push {r7} + 80007fa: af00 add r7, sp, #0 + return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); + 80007fc: 4b04 ldr r3, [pc, #16] ; (8000810 ) + 80007fe: 681b ldr r3, [r3, #0] + 8000800: f003 0307 and.w r3, r3, #7 +} + 8000804: 4618 mov r0, r3 + 8000806: 46bd mov sp, r7 + 8000808: f85d 7b04 ldr.w r7, [sp], #4 + 800080c: 4770 bx lr + 800080e: bf00 nop + 8000810: 40022000 .word 0x40022000 + +08000814 : + * @arg @ref LL_EXTI_LINE_ALL_0_31 + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) +{ + 8000814: b480 push {r7} + 8000816: b083 sub sp, #12 + 8000818: af00 add r7, sp, #0 + 800081a: 6078 str r0, [r7, #4] + SET_BIT(EXTI->IMR1, ExtiLine); + 800081c: 4b05 ldr r3, [pc, #20] ; (8000834 ) + 800081e: 681a ldr r2, [r3, #0] + 8000820: 4904 ldr r1, [pc, #16] ; (8000834 ) + 8000822: 687b ldr r3, [r7, #4] + 8000824: 4313 orrs r3, r2 + 8000826: 600b str r3, [r1, #0] +} + 8000828: bf00 nop + 800082a: 370c adds r7, #12 + 800082c: 46bd mov sp, r7 + 800082e: f85d 7b04 ldr.w r7, [sp], #4 + 8000832: 4770 bx lr + 8000834: 40010400 .word 0x40010400 + +08000838 : + * @arg @ref LL_EXTI_LINE_31 + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) +{ + 8000838: b480 push {r7} + 800083a: b083 sub sp, #12 + 800083c: af00 add r7, sp, #0 + 800083e: 6078 str r0, [r7, #4] + SET_BIT(EXTI->RTSR1, ExtiLine); + 8000840: 4b05 ldr r3, [pc, #20] ; (8000858 ) + 8000842: 689a ldr r2, [r3, #8] + 8000844: 4904 ldr r1, [pc, #16] ; (8000858 ) + 8000846: 687b ldr r3, [r7, #4] + 8000848: 4313 orrs r3, r2 + 800084a: 608b str r3, [r1, #8] + +} + 800084c: bf00 nop + 800084e: 370c adds r7, #12 + 8000850: 46bd mov sp, r7 + 8000852: f85d 7b04 ldr.w r7, [sp], #4 + 8000856: 4770 bx lr + 8000858: 40010400 .word 0x40010400 + +0800085c : + * @arg @ref LL_EXTI_LINE_31 + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) +{ + 800085c: b480 push {r7} + 800085e: b083 sub sp, #12 + 8000860: af00 add r7, sp, #0 + 8000862: 6078 str r0, [r7, #4] + WRITE_REG(EXTI->PR1, ExtiLine); + 8000864: 4a04 ldr r2, [pc, #16] ; (8000878 ) + 8000866: 687b ldr r3, [r7, #4] + 8000868: 6153 str r3, [r2, #20] +} + 800086a: bf00 nop + 800086c: 370c adds r7, #12 + 800086e: 46bd mov sp, r7 + 8000870: f85d 7b04 ldr.w r7, [sp], #4 + 8000874: 4770 bx lr + 8000876: bf00 nop + 8000878: 40010400 .word 0x40010400 + +0800087c : + * @brief Enable SysTick exception request + * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT + * @retval None + */ +__STATIC_INLINE void LL_SYSTICK_EnableIT(void) +{ + 800087c: b480 push {r7} + 800087e: af00 add r7, sp, #0 + SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); + 8000880: 4b05 ldr r3, [pc, #20] ; (8000898 ) + 8000882: 681b ldr r3, [r3, #0] + 8000884: 4a04 ldr r2, [pc, #16] ; (8000898 ) + 8000886: f043 0302 orr.w r3, r3, #2 + 800088a: 6013 str r3, [r2, #0] +} + 800088c: bf00 nop + 800088e: 46bd mov sp, r7 + 8000890: f85d 7b04 ldr.w r7, [sp], #4 + 8000894: 4770 bx lr + 8000896: bf00 nop + 8000898: e000e010 .word 0xe000e010 + +0800089c : + * @brief Processor uses sleep as its low power mode + * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableSleep(void) +{ + 800089c: b480 push {r7} + 800089e: af00 add r7, sp, #0 + /* Clear SLEEPDEEP bit of Cortex System Control Register */ + CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); + 80008a0: 4b05 ldr r3, [pc, #20] ; (80008b8 ) + 80008a2: 691b ldr r3, [r3, #16] + 80008a4: 4a04 ldr r2, [pc, #16] ; (80008b8 ) + 80008a6: f023 0304 bic.w r3, r3, #4 + 80008aa: 6113 str r3, [r2, #16] +} + 80008ac: bf00 nop + 80008ae: 46bd mov sp, r7 + 80008b0: f85d 7b04 ldr.w r7, [sp], #4 + 80008b4: 4770 bx lr + 80008b6: bf00 nop + 80008b8: e000ed00 .word 0xe000ed00 + +080008bc : + * @brief Processor uses deep sleep as its low power mode + * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableDeepSleep(void) +{ + 80008bc: b480 push {r7} + 80008be: af00 add r7, sp, #0 + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); + 80008c0: 4b05 ldr r3, [pc, #20] ; (80008d8 ) + 80008c2: 691b ldr r3, [r3, #16] + 80008c4: 4a04 ldr r2, [pc, #16] ; (80008d8 ) + 80008c6: f043 0304 orr.w r3, r3, #4 + 80008ca: 6113 str r3, [r2, #16] +} + 80008cc: bf00 nop + 80008ce: 46bd mov sp, r7 + 80008d0: f85d 7b04 ldr.w r7, [sp], #4 + 80008d4: 4770 bx lr + 80008d6: bf00 nop + 80008d8: e000ed00 .word 0xe000ed00 + +080008dc : + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) +{ + 80008dc: b480 push {r7} + 80008de: b083 sub sp, #12 + 80008e0: af00 add r7, sp, #0 + 80008e2: 6078 str r0, [r7, #4] + MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); + 80008e4: 4b06 ldr r3, [pc, #24] ; (8000900 ) + 80008e6: 681b ldr r3, [r3, #0] + 80008e8: f423 62c0 bic.w r2, r3, #1536 ; 0x600 + 80008ec: 4904 ldr r1, [pc, #16] ; (8000900 ) + 80008ee: 687b ldr r3, [r7, #4] + 80008f0: 4313 orrs r3, r2 + 80008f2: 600b str r3, [r1, #0] +} + 80008f4: bf00 nop + 80008f6: 370c adds r7, #12 + 80008f8: 46bd mov sp, r7 + 80008fa: f85d 7b04 ldr.w r7, [sp], #4 + 80008fe: 4770 bx lr + 8000900: 40007000 .word 0x40007000 + +08000904 : + * @brief Enable access to the backup domain + * @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) +{ + 8000904: b480 push {r7} + 8000906: af00 add r7, sp, #0 + SET_BIT(PWR->CR1, PWR_CR1_DBP); + 8000908: 4b05 ldr r3, [pc, #20] ; (8000920 ) + 800090a: 681b ldr r3, [r3, #0] + 800090c: 4a04 ldr r2, [pc, #16] ; (8000920 ) + 800090e: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8000912: 6013 str r3, [r2, #0] +} + 8000914: bf00 nop + 8000916: 46bd mov sp, r7 + 8000918: f85d 7b04 ldr.w r7, [sp], #4 + 800091c: 4770 bx lr + 800091e: bf00 nop + 8000920: 40007000 .word 0x40007000 + +08000924 : + * @brief Disable access to the backup domain + * @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) +{ + 8000924: b480 push {r7} + 8000926: af00 add r7, sp, #0 + CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); + 8000928: 4b05 ldr r3, [pc, #20] ; (8000940 ) + 800092a: 681b ldr r3, [r3, #0] + 800092c: 4a04 ldr r2, [pc, #16] ; (8000940 ) + 800092e: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8000932: 6013 str r3, [r2, #0] +} + 8000934: bf00 nop + 8000936: 46bd mov sp, r7 + 8000938: f85d 7b04 ldr.w r7, [sp], #4 + 800093c: 4770 bx lr + 800093e: bf00 nop + 8000940: 40007000 .word 0x40007000 + +08000944 : + * @arg @ref LL_PWR_MODE_STANDBY + * @arg @ref LL_PWR_MODE_SHUTDOWN + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t LowPowerMode) +{ + 8000944: b480 push {r7} + 8000946: b083 sub sp, #12 + 8000948: af00 add r7, sp, #0 + 800094a: 6078 str r0, [r7, #4] + MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode); + 800094c: 4b06 ldr r3, [pc, #24] ; (8000968 ) + 800094e: 681b ldr r3, [r3, #0] + 8000950: f023 0207 bic.w r2, r3, #7 + 8000954: 4904 ldr r1, [pc, #16] ; (8000968 ) + 8000956: 687b ldr r3, [r7, #4] + 8000958: 4313 orrs r3, r2 + 800095a: 600b str r3, [r1, #0] +} + 800095c: bf00 nop + 800095e: 370c adds r7, #12 + 8000960: 46bd mov sp, r7 + 8000962: f85d 7b04 ldr.w r7, [sp], #4 + 8000966: 4770 bx lr + 8000968: 40007000 .word 0x40007000 + +0800096c : + * @brief Enable Internal Wake-up line + * @rmtoll CR3 EIWF LL_PWR_EnableInternWU + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableInternWU(void) +{ + 800096c: b480 push {r7} + 800096e: af00 add r7, sp, #0 + SET_BIT(PWR->CR3, PWR_CR3_EIWF); + 8000970: 4b05 ldr r3, [pc, #20] ; (8000988 ) + 8000972: 689b ldr r3, [r3, #8] + 8000974: 4a04 ldr r2, [pc, #16] ; (8000988 ) + 8000976: f443 4300 orr.w r3, r3, #32768 ; 0x8000 + 800097a: 6093 str r3, [r2, #8] +} + 800097c: bf00 nop + 800097e: 46bd mov sp, r7 + 8000980: f85d 7b04 ldr.w r7, [sp], #4 + 8000984: 4770 bx lr + 8000986: bf00 nop + 8000988: 40007000 .word 0x40007000 + +0800098c : + * @rmtoll WPR KEY LL_RTC_EnableWriteProtection + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx) + { + 800098c: b480 push {r7} + 800098e: b083 sub sp, #12 + 8000990: af00 add r7, sp, #0 + 8000992: 6078 str r0, [r7, #4] + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_DISABLE); + 8000994: 687b ldr r3, [r7, #4] + 8000996: 22ff movs r2, #255 ; 0xff + 8000998: 625a str r2, [r3, #36] ; 0x24 + } + 800099a: bf00 nop + 800099c: 370c adds r7, #12 + 800099e: 46bd mov sp, r7 + 80009a0: f85d 7b04 ldr.w r7, [sp], #4 + 80009a4: 4770 bx lr + +080009a6 : + * @rmtoll WPR KEY LL_RTC_DisableWriteProtection + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx) + { + 80009a6: b480 push {r7} + 80009a8: b083 sub sp, #12 + 80009aa: af00 add r7, sp, #0 + 80009ac: 6078 str r0, [r7, #4] + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_1); + 80009ae: 687b ldr r3, [r7, #4] + 80009b0: 22ca movs r2, #202 ; 0xca + 80009b2: 625a str r2, [r3, #36] ; 0x24 + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_2); + 80009b4: 687b ldr r3, [r7, #4] + 80009b6: 2253 movs r2, #83 ; 0x53 + 80009b8: 625a str r2, [r3, #36] ; 0x24 + } + 80009ba: bf00 nop + 80009bc: 370c adds r7, #12 + 80009be: 46bd mov sp, r7 + 80009c0: f85d 7b04 ldr.w r7, [sp], #4 + 80009c4: 4770 bx lr + +080009c6 : + * @rmtoll CR WUTE LL_RTC_WAKEUP_Enable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_Enable(RTC_TypeDef *RTCx) + { + 80009c6: b480 push {r7} + 80009c8: b083 sub sp, #12 + 80009ca: af00 add r7, sp, #0 + 80009cc: 6078 str r0, [r7, #4] + SET_BIT(RTCx->CR, RTC_CR_WUTE); + 80009ce: 687b ldr r3, [r7, #4] + 80009d0: 689b ldr r3, [r3, #8] + 80009d2: f443 6280 orr.w r2, r3, #1024 ; 0x400 + 80009d6: 687b ldr r3, [r7, #4] + 80009d8: 609a str r2, [r3, #8] + } + 80009da: bf00 nop + 80009dc: 370c adds r7, #12 + 80009de: 46bd mov sp, r7 + 80009e0: f85d 7b04 ldr.w r7, [sp], #4 + 80009e4: 4770 bx lr + +080009e6 : + * @rmtoll CR WUTE LL_RTC_WAKEUP_Disable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_Disable(RTC_TypeDef *RTCx) + { + 80009e6: b480 push {r7} + 80009e8: b083 sub sp, #12 + 80009ea: af00 add r7, sp, #0 + 80009ec: 6078 str r0, [r7, #4] + CLEAR_BIT(RTCx->CR, RTC_CR_WUTE); + 80009ee: 687b ldr r3, [r7, #4] + 80009f0: 689b ldr r3, [r3, #8] + 80009f2: f423 6280 bic.w r2, r3, #1024 ; 0x400 + 80009f6: 687b ldr r3, [r7, #4] + 80009f8: 609a str r2, [r3, #8] + } + 80009fa: bf00 nop + 80009fc: 370c adds r7, #12 + 80009fe: 46bd mov sp, r7 + 8000a00: f85d 7b04 ldr.w r7, [sp], #4 + 8000a04: 4770 bx lr + +08000a06 : + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_SetClock(RTC_TypeDef *RTCx, uint32_t WakeupClock) + { + 8000a06: b480 push {r7} + 8000a08: b083 sub sp, #12 + 8000a0a: af00 add r7, sp, #0 + 8000a0c: 6078 str r0, [r7, #4] + 8000a0e: 6039 str r1, [r7, #0] + MODIFY_REG(RTCx->CR, RTC_CR_WUCKSEL, WakeupClock); + 8000a10: 687b ldr r3, [r7, #4] + 8000a12: 689b ldr r3, [r3, #8] + 8000a14: f023 0207 bic.w r2, r3, #7 + 8000a18: 683b ldr r3, [r7, #0] + 8000a1a: 431a orrs r2, r3 + 8000a1c: 687b ldr r3, [r7, #4] + 8000a1e: 609a str r2, [r3, #8] + } + 8000a20: bf00 nop + 8000a22: 370c adds r7, #12 + 8000a24: 46bd mov sp, r7 + 8000a26: f85d 7b04 ldr.w r7, [sp], #4 + 8000a2a: 4770 bx lr + +08000a2c : + * @param RTCx RTC Instance + * @param Value Value between Min_Data=0x00 and Max_Data=0xFFFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_SetAutoReload(RTC_TypeDef *RTCx, uint32_t Value) + { + 8000a2c: b480 push {r7} + 8000a2e: b083 sub sp, #12 + 8000a30: af00 add r7, sp, #0 + 8000a32: 6078 str r0, [r7, #4] + 8000a34: 6039 str r1, [r7, #0] + MODIFY_REG(RTCx->WUTR, RTC_WUTR_WUT, Value); + 8000a36: 687b ldr r3, [r7, #4] + 8000a38: 695b ldr r3, [r3, #20] + 8000a3a: 0c1b lsrs r3, r3, #16 + 8000a3c: 041b lsls r3, r3, #16 + 8000a3e: 683a ldr r2, [r7, #0] + 8000a40: 431a orrs r2, r3 + 8000a42: 687b ldr r3, [r7, #4] + 8000a44: 615a str r2, [r3, #20] + } + 8000a46: bf00 nop + 8000a48: 370c adds r7, #12 + 8000a4a: 46bd mov sp, r7 + 8000a4c: f85d 7b04 ldr.w r7, [sp], #4 + 8000a50: 4770 bx lr + +08000a52 : + * @rmtoll ISR WUTF LL_RTC_ClearFlag_WUT + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_WUT(RTC_TypeDef *RTCx) + { + 8000a52: b480 push {r7} + 8000a54: b083 sub sp, #12 + 8000a56: af00 add r7, sp, #0 + 8000a58: 6078 str r0, [r7, #4] + WRITE_REG(RTCx->ISR, (~((RTC_ISR_WUTF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + 8000a5a: 687b ldr r3, [r7, #4] + 8000a5c: 68db ldr r3, [r3, #12] + 8000a5e: b2db uxtb r3, r3 + 8000a60: f463 6290 orn r2, r3, #1152 ; 0x480 + 8000a64: 687b ldr r3, [r7, #4] + 8000a66: 60da str r2, [r3, #12] + } + 8000a68: bf00 nop + 8000a6a: 370c adds r7, #12 + 8000a6c: 46bd mov sp, r7 + 8000a6e: f85d 7b04 ldr.w r7, [sp], #4 + 8000a72: 4770 bx lr + +08000a74 : + * @rmtoll ISR WUTWF LL_RTC_IsActiveFlag_WUTW + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx) + { + 8000a74: b480 push {r7} + 8000a76: b083 sub sp, #12 + 8000a78: af00 add r7, sp, #0 + 8000a7a: 6078 str r0, [r7, #4] + return (READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF)); + 8000a7c: 687b ldr r3, [r7, #4] + 8000a7e: 68db ldr r3, [r3, #12] + 8000a80: f003 0304 and.w r3, r3, #4 + 8000a84: 2b04 cmp r3, #4 + 8000a86: bf0c ite eq + 8000a88: 2301 moveq r3, #1 + 8000a8a: 2300 movne r3, #0 + 8000a8c: b2db uxtb r3, r3 + } + 8000a8e: 4618 mov r0, r3 + 8000a90: 370c adds r7, #12 + 8000a92: 46bd mov sp, r7 + 8000a94: f85d 7b04 ldr.w r7, [sp], #4 + 8000a98: 4770 bx lr + +08000a9a : + * @rmtoll CR WUTIE LL_RTC_EnableIT_WUT + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_WUT(RTC_TypeDef *RTCx) + { + 8000a9a: b480 push {r7} + 8000a9c: b083 sub sp, #12 + 8000a9e: af00 add r7, sp, #0 + 8000aa0: 6078 str r0, [r7, #4] + SET_BIT(RTCx->CR, RTC_CR_WUTIE); + 8000aa2: 687b ldr r3, [r7, #4] + 8000aa4: 689b ldr r3, [r3, #8] + 8000aa6: f443 4280 orr.w r2, r3, #16384 ; 0x4000 + 8000aaa: 687b ldr r3, [r7, #4] + 8000aac: 609a str r2, [r3, #8] + } + 8000aae: bf00 nop + 8000ab0: 370c adds r7, #12 + 8000ab2: 46bd mov sp, r7 + 8000ab4: f85d 7b04 ldr.w r7, [sp], #4 + 8000ab8: 4770 bx lr + ... + +08000abc : +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + 8000abc: b580 push {r7, lr} + 8000abe: af00 add r7, sp, #0 + if ( BLUE_BUTTON() ){ + 8000ac0: f7ff fc80 bl 80003c4 + 8000ac4: 4603 mov r3, r0 + 8000ac6: 2b00 cmp r3, #0 + 8000ac8: d002 beq.n 8000ad0 + blue_mode = 1 ; + 8000aca: 4b18 ldr r3, [pc, #96] ; (8000b2c ) + 8000acc: 2201 movs r2, #1 + 8000ace: 701a strb r2, [r3, #0] + } + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + 8000ad0: 4b17 ldr r3, [pc, #92] ; (8000b30 ) + 8000ad2: 681b ldr r3, [r3, #0] + 8000ad4: 3301 adds r3, #1 + 8000ad6: 4a16 ldr r2, [pc, #88] ; (8000b30 ) + 8000ad8: 6013 str r3, [r2, #0] + if (msTicks == 5 * expe){ + 8000ada: 4b16 ldr r3, [pc, #88] ; (8000b34 ) + 8000adc: 781b ldrb r3, [r3, #0] + 8000ade: b2db uxtb r3, r3 + 8000ae0: 461a mov r2, r3 + 8000ae2: 4613 mov r3, r2 + 8000ae4: 009b lsls r3, r3, #2 + 8000ae6: 4413 add r3, r2 + 8000ae8: 461a mov r2, r3 + 8000aea: 4b11 ldr r3, [pc, #68] ; (8000b30 ) + 8000aec: 681b ldr r3, [r3, #0] + 8000aee: 429a cmp r2, r3 + 8000af0: d103 bne.n 8000afa + LED_GREEN(0); + 8000af2: 2000 movs r0, #0 + 8000af4: f7ff fc50 bl 8000398 + 8000af8: e009 b.n 8000b0e + }else if(msTicks >= 200){ + 8000afa: 4b0d ldr r3, [pc, #52] ; (8000b30 ) + 8000afc: 681b ldr r3, [r3, #0] + 8000afe: 2bc7 cmp r3, #199 ; 0xc7 + 8000b00: d905 bls.n 8000b0e + msTicks = 0; + 8000b02: 4b0b ldr r3, [pc, #44] ; (8000b30 ) + 8000b04: 2200 movs r2, #0 + 8000b06: 601a str r2, [r3, #0] + LED_GREEN(1); + 8000b08: 2001 movs r0, #1 + 8000b0a: f7ff fc45 bl 8000398 + } + if(expe == 2 || expe == 4){ + 8000b0e: 4b09 ldr r3, [pc, #36] ; (8000b34 ) + 8000b10: 781b ldrb r3, [r3, #0] + 8000b12: b2db uxtb r3, r3 + 8000b14: 2b02 cmp r3, #2 + 8000b16: d004 beq.n 8000b22 + 8000b18: 4b06 ldr r3, [pc, #24] ; (8000b34 ) + 8000b1a: 781b ldrb r3, [r3, #0] + 8000b1c: b2db uxtb r3, r3 + 8000b1e: 2b04 cmp r3, #4 + 8000b20: d101 bne.n 8000b26 + CLK_TOGGLE(); + 8000b22: f7ff fc2d bl 8000380 + } +} + 8000b26: bf00 nop + 8000b28: bd80 pop {r7, pc} + 8000b2a: bf00 nop + 8000b2c: 2000002d .word 0x2000002d + 8000b30: 20000028 .word 0x20000028 + 8000b34: 2000002c .word 0x2000002c + +08000b38
: + + + + +int main(void) +{ + 8000b38: b580 push {r7, lr} + 8000b3a: af00 add r7, sp, #0 + + + // config GPIO + GPIO_init(); + 8000b3c: f7ff fbfc bl 8000338 + +// if (RCC->BDCR & RCC_BDCR_LSEON) { + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + 8000b40: f04f 5080 mov.w r0, #268435456 ; 0x10000000 + 8000b44: f7ff fe2c bl 80007a0 + LL_PWR_EnableBkUpAccess(); + 8000b48: f7ff fedc bl 8000904 + + //expe = register RTC + expe = RTC->BKP0R; + 8000b4c: 4b62 ldr r3, [pc, #392] ; (8000cd8 ) + 8000b4e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8000b50: b2da uxtb r2, r3 + 8000b52: 4b62 ldr r3, [pc, #392] ; (8000cdc ) + 8000b54: 701a strb r2, [r3, #0] + if (expe == 0) { + 8000b56: 4b61 ldr r3, [pc, #388] ; (8000cdc ) + 8000b58: 781b ldrb r3, [r3, #0] + 8000b5a: b2db uxtb r3, r3 + 8000b5c: 2b00 cmp r3, #0 + 8000b5e: d10f bne.n 8000b80 + SystemClock_Config_24M_LSE(); + 8000b60: f000 f928 bl 8000db4 + expe = 1; + 8000b64: 4b5d ldr r3, [pc, #372] ; (8000cdc ) + 8000b66: 2201 movs r2, #1 + 8000b68: 701a strb r2, [r3, #0] + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + 8000b6a: f04f 5080 mov.w r0, #268435456 ; 0x10000000 + 8000b6e: f7ff fe17 bl 80007a0 + LL_PWR_EnableBkUpAccess(); + 8000b72: f7ff fec7 bl 8000904 + RTC->BKP0R = expe; + 8000b76: 4b59 ldr r3, [pc, #356] ; (8000cdc ) + 8000b78: 781b ldrb r3, [r3, #0] + 8000b7a: b2da uxtb r2, r3 + 8000b7c: 4b56 ldr r3, [pc, #344] ; (8000cd8 ) + 8000b7e: 651a str r2, [r3, #80] ; 0x50 + } + + if (BLUE_BUTTON()){ + 8000b80: f7ff fc20 bl 80003c4 + 8000b84: 4603 mov r3, r0 + 8000b86: 2b00 cmp r3, #0 + 8000b88: d016 beq.n 8000bb8 + + expe ++; + 8000b8a: 4b54 ldr r3, [pc, #336] ; (8000cdc ) + 8000b8c: 781b ldrb r3, [r3, #0] + 8000b8e: b2db uxtb r3, r3 + 8000b90: 3301 adds r3, #1 + 8000b92: b2da uxtb r2, r3 + 8000b94: 4b51 ldr r3, [pc, #324] ; (8000cdc ) + 8000b96: 701a strb r2, [r3, #0] + blue_mode = 0; + 8000b98: 4b51 ldr r3, [pc, #324] ; (8000ce0 ) + 8000b9a: 2200 movs r2, #0 + 8000b9c: 701a strb r2, [r3, #0] + if (expe > 8) expe = 1; + 8000b9e: 4b4f ldr r3, [pc, #316] ; (8000cdc ) + 8000ba0: 781b ldrb r3, [r3, #0] + 8000ba2: b2db uxtb r3, r3 + 8000ba4: 2b08 cmp r3, #8 + 8000ba6: d902 bls.n 8000bae + 8000ba8: 4b4c ldr r3, [pc, #304] ; (8000cdc ) + 8000baa: 2201 movs r2, #1 + 8000bac: 701a strb r2, [r3, #0] + RTC->BKP0R = expe; + 8000bae: 4b4b ldr r3, [pc, #300] ; (8000cdc ) + 8000bb0: 781b ldrb r3, [r3, #0] + 8000bb2: b2da uxtb r2, r3 + 8000bb4: 4b48 ldr r3, [pc, #288] ; (8000cd8 ) + 8000bb6: 651a str r2, [r3, #80] ; 0x50 + } +// }else{ + +// } + LL_PWR_DisableBkUpAccess(); + 8000bb8: f7ff feb4 bl 8000924 + switch(expe){ + 8000bbc: 4b47 ldr r3, [pc, #284] ; (8000cdc ) + 8000bbe: 781b ldrb r3, [r3, #0] + 8000bc0: b2db uxtb r3, r3 + 8000bc2: 3b01 subs r3, #1 + 8000bc4: 2b07 cmp r3, #7 + 8000bc6: d83a bhi.n 8000c3e + 8000bc8: a201 add r2, pc, #4 ; (adr r2, 8000bd0 ) + 8000bca: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8000bce: bf00 nop + 8000bd0: 08000bf1 .word 0x08000bf1 + 8000bd4: 08000bfb .word 0x08000bfb + 8000bd8: 08000c01 .word 0x08000c01 + 8000bdc: 08000c0b .word 0x08000c0b + 8000be0: 08000c0f .word 0x08000c0f + 8000be4: 08000c1b .word 0x08000c1b + 8000be8: 08000c27 .word 0x08000c27 + 8000bec: 08000c33 .word 0x08000c33 + case 1: + + /* Configure the system clock */ + SystemClock_Config_80M(); + 8000bf0: f000 f946 bl 8000e80 + //Setup Sleep mode + LL_LPM_EnableSleep(); + 8000bf4: f7ff fe52 bl 800089c + break; + 8000bf8: e021 b.n 8000c3e + case 2: + /* Configure the system clock */ + SystemClock_Config_24M_LSE(); + 8000bfa: f000 f8db bl 8000db4 + break; + 8000bfe: e01e b.n 8000c3e + case 3: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c00: f000 f872 bl 8000ce8 + LL_LPM_EnableSleep(); + 8000c04: f7ff fe4a bl 800089c + break; + 8000c08: e019 b.n 8000c3e + case 4: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c0a: f000 f86d bl 8000ce8 + case 5: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c0e: f000 f86b bl 8000ce8 + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0); + 8000c12: 2000 movs r0, #0 + 8000c14: f7ff fe96 bl 8000944 + break; + 8000c18: e011 b.n 8000c3e + case 6: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c1a: f000 f865 bl 8000ce8 + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1); + 8000c1e: 2001 movs r0, #1 + 8000c20: f7ff fe90 bl 8000944 + break; + 8000c24: e00b b.n 8000c3e + case 7: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c26: f000 f85f bl 8000ce8 + LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2); + 8000c2a: 2002 movs r0, #2 + 8000c2c: f7ff fe8a bl 8000944 + break; + 8000c30: e005 b.n 8000c3e + case 8: + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c32: f000 f859 bl 8000ce8 + LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN); + 8000c36: 2004 movs r0, #4 + 8000c38: f7ff fe84 bl 8000944 + break; + 8000c3c: bf00 nop + } + + + // init systick timer (tick period at 1 ms) + LL_Init1msTick( SystemCoreClock ); + 8000c3e: 4b29 ldr r3, [pc, #164] ; (8000ce4 ) + 8000c40: 681b ldr r3, [r3, #0] + 8000c42: 4618 mov r0, r3 + 8000c44: f000 fb58 bl 80012f8 + LL_SYSTICK_EnableIT(); + 8000c48: f7ff fe18 bl 800087c + + + //LL_LPM_EnableSleepOnExit(); + + while (1) { + if (blue_mode){ + 8000c4c: 4b24 ldr r3, [pc, #144] ; (8000ce0 ) + 8000c4e: 781b ldrb r3, [r3, #0] + 8000c50: b2db uxtb r3, r3 + 8000c52: 2b00 cmp r3, #0 + 8000c54: d036 beq.n 8000cc4 + switch(expe){ + 8000c56: 4b21 ldr r3, [pc, #132] ; (8000cdc ) + 8000c58: 781b ldrb r3, [r3, #0] + 8000c5a: b2db uxtb r3, r3 + 8000c5c: 3b01 subs r3, #1 + 8000c5e: 2b07 cmp r3, #7 + 8000c60: d8f4 bhi.n 8000c4c + 8000c62: a201 add r2, pc, #4 ; (adr r2, 8000c68 ) + 8000c64: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8000c68: 08000cb9 .word 0x08000cb9 + 8000c6c: 08000cbd .word 0x08000cbd + 8000c70: 08000cb9 .word 0x08000cb9 + 8000c74: 08000cbd .word 0x08000cbd + 8000c78: 08000c89 .word 0x08000c89 + 8000c7c: 08000c89 .word 0x08000c89 + 8000c80: 08000c89 .word 0x08000c89 + 8000c84: 08000caf .word 0x08000caf + case 5: + case 6: + case 7: + LL_LPM_EnableDeepSleep(); + 8000c88: f7ff fe18 bl 80008bc + RTC_wakeup_init_from_stop(20); + 8000c8c: 2014 movs r0, #20 + 8000c8e: f000 f97c bl 8000f8a + __WFI(); + 8000c92: bf30 wfi + blue_mode = 0; + 8000c94: 4b12 ldr r3, [pc, #72] ; (8000ce0 ) + 8000c96: 2200 movs r2, #0 + 8000c98: 701a strb r2, [r3, #0] + + SystemClock_Config_24M_LSE_FL3_VS2(); + 8000c9a: f000 f825 bl 8000ce8 + LL_Init1msTick( SystemCoreClock ); + 8000c9e: 4b11 ldr r3, [pc, #68] ; (8000ce4 ) + 8000ca0: 681b ldr r3, [r3, #0] + 8000ca2: 4618 mov r0, r3 + 8000ca4: f000 fb28 bl 80012f8 + LL_SYSTICK_EnableIT(); + 8000ca8: f7ff fde8 bl 800087c + break; + 8000cac: e012 b.n 8000cd4 + case 8: + LL_LPM_EnableDeepSleep(); + 8000cae: f7ff fe05 bl 80008bc + RTC_wakeup_init_from_standby_or_shutdown(10); + 8000cb2: 200a movs r0, #10 + 8000cb4: f000 f95c bl 8000f70 + case 1: + case 3: + __WFI(); + 8000cb8: bf30 wfi + break; + 8000cba: e00b b.n 8000cd4 + case 2: + case 4: + LL_RCC_MSI_EnablePLLMode(); + 8000cbc: f7ff fc3a bl 8000534 + break; + 8000cc0: bf00 nop + 8000cc2: e007 b.n 8000cd4 + } + }else{ + if (expe > 4) { + 8000cc4: 4b05 ldr r3, [pc, #20] ; (8000cdc ) + 8000cc6: 781b ldrb r3, [r3, #0] + 8000cc8: b2db uxtb r3, r3 + 8000cca: 2b04 cmp r3, #4 + 8000ccc: d9be bls.n 8000c4c + LL_LPM_EnableSleep(); + 8000cce: f7ff fde5 bl 800089c + __WFI(); + 8000cd2: bf30 wfi + if (blue_mode){ + 8000cd4: e7ba b.n 8000c4c + 8000cd6: bf00 nop + 8000cd8: 40002800 .word 0x40002800 + 8000cdc: 2000002c .word 0x2000002c + 8000ce0: 2000002d .word 0x2000002d + 8000ce4: 20000000 .word 0x20000000 + +08000ce8 : + } + } + } +} + +void SystemClock_Config_24M_LSE_FL3_VS2(void){ + 8000ce8: b580 push {r7, lr} + 8000cea: af00 add r7, sp, #0 + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + 8000cec: f04f 5080 mov.w r0, #268435456 ; 0x10000000 + 8000cf0: f7ff fd56 bl 80007a0 + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + 8000cf4: 2003 movs r0, #3 + 8000cf6: f7ff fd6b bl 80007d0 + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) + 8000cfa: bf00 nop + 8000cfc: f7ff fd7c bl 80007f8 + 8000d00: 4603 mov r3, r0 + 8000d02: 2b03 cmp r3, #3 + 8000d04: d1fa bne.n 8000cfc + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2); + 8000d06: f44f 6080 mov.w r0, #1024 ; 0x400 + 8000d0a: f7ff fde7 bl 80008dc + LL_RCC_MSI_Enable(); + 8000d0e: f7ff fbef bl 80004f0 + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + 8000d12: bf00 nop + 8000d14: f7ff fbfc bl 8000510 + 8000d18: 4603 mov r3, r0 + 8000d1a: 2b01 cmp r3, #1 + 8000d1c: d1fa bne.n 8000d14 + { + + } + + LL_PWR_EnableBkUpAccess(); + 8000d1e: f7ff fdf1 bl 8000904 +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + 8000d22: f7ff fcd7 bl 80006d4 + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + 8000d26: 2000 movs r0, #0 + 8000d28: f7ff fbb8 bl 800049c + + LL_RCC_MSI_EnableRangeSelection(); + 8000d2c: f7ff fc12 bl 8000554 + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + 8000d30: 2060 movs r0, #96 ; 0x60 + 8000d32: f7ff fc1f bl 8000574 + LL_RCC_MSI_SetCalibTrimming(0); + 8000d36: 2000 movs r0, #0 + 8000d38: f7ff fc30 bl 800059c + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + 8000d3c: f7ff fb9c bl 8000478 + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + 8000d40: bf00 nop + 8000d42: f7ff fbc1 bl 80004c8 + 8000d46: 4603 mov r3, r0 + 8000d48: 2b01 cmp r3, #1 + 8000d4a: d1fa bne.n 8000d42 + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + 8000d4c: f44f 7080 mov.w r0, #256 ; 0x100 + 8000d50: f7ff fc98 bl 8000684 + LL_RCC_EnableRTC(); + 8000d54: f7ff fcac bl 80006b0 + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + 8000d58: f04f 7300 mov.w r3, #33554432 ; 0x2000000 + 8000d5c: 2218 movs r2, #24 + 8000d5e: 2100 movs r1, #0 + 8000d60: 2001 movs r0, #1 + 8000d62: f7ff fced bl 8000740 + LL_RCC_PLL_EnableDomain_SYS(); + 8000d66: f7ff fd0b bl 8000780 + LL_RCC_PLL_Enable(); + 8000d6a: f7ff fcc5 bl 80006f8 + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + 8000d6e: bf00 nop + 8000d70: f7ff fcd2 bl 8000718 + 8000d74: 4603 mov r3, r0 + 8000d76: 2b01 cmp r3, #1 + 8000d78: d1fa bne.n 8000d70 + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + 8000d7a: 2003 movs r0, #3 + 8000d7c: f7ff fc24 bl 80005c8 + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + 8000d80: bf00 nop + 8000d82: f7ff fc35 bl 80005f0 + 8000d86: 4603 mov r3, r0 + 8000d88: 2b0c cmp r3, #12 + 8000d8a: d1fa bne.n 8000d82 + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + 8000d8c: 2000 movs r0, #0 + 8000d8e: f7ff fc3d bl 800060c + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + 8000d92: 2000 movs r0, #0 + 8000d94: f7ff fc4e bl 8000634 + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + 8000d98: 2000 movs r0, #0 + 8000d9a: f7ff fc5f bl 800065c + LL_SetSystemCoreClock(24000000); + 8000d9e: 4804 ldr r0, [pc, #16] ; (8000db0 ) + 8000da0: f000 fab6 bl 8001310 + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + 8000da4: 2000 movs r0, #0 + 8000da6: f000 f99b bl 80010e0 + { + // Error_Handler(); + } +} + 8000daa: bf00 nop + 8000dac: bd80 pop {r7, pc} + 8000dae: bf00 nop + 8000db0: 016e3600 .word 0x016e3600 + +08000db4 : + * @brief System Clock Configuration + * @retval None + * 24Mhz + RTC + LSE + */ +void SystemClock_Config_24M_LSE(void) +{ + 8000db4: b580 push {r7, lr} + 8000db6: af00 add r7, sp, #0 + LL_APB1_GRP1_EnableClock( LL_APB1_GRP1_PERIPH_PWR ); + 8000db8: f04f 5080 mov.w r0, #268435456 ; 0x10000000 + 8000dbc: f7ff fcf0 bl 80007a0 + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + 8000dc0: 2001 movs r0, #1 + 8000dc2: f7ff fd05 bl 80007d0 + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1) + 8000dc6: bf00 nop + 8000dc8: f7ff fd16 bl 80007f8 + 8000dcc: 4603 mov r3, r0 + 8000dce: 2b01 cmp r3, #1 + 8000dd0: d1fa bne.n 8000dc8 + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + 8000dd2: f44f 7000 mov.w r0, #512 ; 0x200 + 8000dd6: f7ff fd81 bl 80008dc + LL_RCC_MSI_Enable(); + 8000dda: f7ff fb89 bl 80004f0 + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + 8000dde: bf00 nop + 8000de0: f7ff fb96 bl 8000510 + 8000de4: 4603 mov r3, r0 + 8000de6: 2b01 cmp r3, #1 + 8000de8: d1fa bne.n 8000de0 + { + + } + + LL_PWR_EnableBkUpAccess(); + 8000dea: f7ff fd8b bl 8000904 +// LL_RCC_ForceBackupDomainReset(); + LL_RCC_ReleaseBackupDomainReset(); + 8000dee: f7ff fc71 bl 80006d4 + LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW); + 8000df2: 2000 movs r0, #0 + 8000df4: f7ff fb52 bl 800049c + + LL_RCC_MSI_EnableRangeSelection(); + 8000df8: f7ff fbac bl 8000554 + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + 8000dfc: 2060 movs r0, #96 ; 0x60 + 8000dfe: f7ff fbb9 bl 8000574 + LL_RCC_MSI_SetCalibTrimming(0); + 8000e02: 2000 movs r0, #0 + 8000e04: f7ff fbca bl 800059c + // LL_RCC_MSI_EnablePLLMode(); + + LL_RCC_LSE_Enable(); + 8000e08: f7ff fb36 bl 8000478 + + /* Wait till LSE is ready */ + while(LL_RCC_LSE_IsReady() != 1) + 8000e0c: bf00 nop + 8000e0e: f7ff fb5b bl 80004c8 + 8000e12: 4603 mov r3, r0 + 8000e14: 2b01 cmp r3, #1 + 8000e16: d1fa bne.n 8000e0e + { + + } + LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); + 8000e18: f44f 7080 mov.w r0, #256 ; 0x100 + 8000e1c: f7ff fc32 bl 8000684 + LL_RCC_EnableRTC(); + 8000e20: f7ff fc46 bl 80006b0 + + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4); + 8000e24: f04f 7300 mov.w r3, #33554432 ; 0x2000000 + 8000e28: 2218 movs r2, #24 + 8000e2a: 2100 movs r1, #0 + 8000e2c: 2001 movs r0, #1 + 8000e2e: f7ff fc87 bl 8000740 + LL_RCC_PLL_EnableDomain_SYS(); + 8000e32: f7ff fca5 bl 8000780 + LL_RCC_PLL_Enable(); + 8000e36: f7ff fc5f bl 80006f8 + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + 8000e3a: bf00 nop + 8000e3c: f7ff fc6c bl 8000718 + 8000e40: 4603 mov r3, r0 + 8000e42: 2b01 cmp r3, #1 + 8000e44: d1fa bne.n 8000e3c + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + 8000e46: 2003 movs r0, #3 + 8000e48: f7ff fbbe bl 80005c8 + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + 8000e4c: bf00 nop + 8000e4e: f7ff fbcf bl 80005f0 + 8000e52: 4603 mov r3, r0 + 8000e54: 2b0c cmp r3, #12 + 8000e56: d1fa bne.n 8000e4e + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + 8000e58: 2000 movs r0, #0 + 8000e5a: f7ff fbd7 bl 800060c + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + 8000e5e: 2000 movs r0, #0 + 8000e60: f7ff fbe8 bl 8000634 + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + 8000e64: 2000 movs r0, #0 + 8000e66: f7ff fbf9 bl 800065c + LL_SetSystemCoreClock(24000000); + 8000e6a: 4804 ldr r0, [pc, #16] ; (8000e7c ) + 8000e6c: f000 fa50 bl 8001310 + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + 8000e70: 2000 movs r0, #0 + 8000e72: f000 f935 bl 80010e0 + { + // Error_Handler(); + } +} + 8000e76: bf00 nop + 8000e78: bd80 pop {r7, pc} + 8000e7a: bf00 nop + 8000e7c: 016e3600 .word 0x016e3600 + +08000e80 : + + +void SystemClock_Config_80M(void) +{ + 8000e80: b580 push {r7, lr} + 8000e82: af00 add r7, sp, #0 + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + 8000e84: 2004 movs r0, #4 + 8000e86: f7ff fca3 bl 80007d0 + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_4) + 8000e8a: bf00 nop + 8000e8c: f7ff fcb4 bl 80007f8 + 8000e90: 4603 mov r3, r0 + 8000e92: 2b04 cmp r3, #4 + 8000e94: d1fa bne.n 8000e8c + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + 8000e96: f44f 7000 mov.w r0, #512 ; 0x200 + 8000e9a: f7ff fd1f bl 80008dc + LL_RCC_MSI_Enable(); + 8000e9e: f7ff fb27 bl 80004f0 + + /* Wait till MSI is ready */ + while(LL_RCC_MSI_IsReady() != 1) + 8000ea2: bf00 nop + 8000ea4: f7ff fb34 bl 8000510 + 8000ea8: 4603 mov r3, r0 + 8000eaa: 2b01 cmp r3, #1 + 8000eac: d1fa bne.n 8000ea4 + { + + } + LL_RCC_MSI_EnableRangeSelection(); + 8000eae: f7ff fb51 bl 8000554 + LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6); + 8000eb2: 2060 movs r0, #96 ; 0x60 + 8000eb4: f7ff fb5e bl 8000574 + LL_RCC_MSI_SetCalibTrimming(0); + 8000eb8: 2000 movs r0, #0 + 8000eba: f7ff fb6f bl 800059c + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); + 8000ebe: 2300 movs r3, #0 + 8000ec0: 2228 movs r2, #40 ; 0x28 + 8000ec2: 2100 movs r1, #0 + 8000ec4: 2001 movs r0, #1 + 8000ec6: f7ff fc3b bl 8000740 + LL_RCC_PLL_EnableDomain_SYS(); + 8000eca: f7ff fc59 bl 8000780 + LL_RCC_PLL_Enable(); + 8000ece: f7ff fc13 bl 80006f8 + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + 8000ed2: bf00 nop + 8000ed4: f7ff fc20 bl 8000718 + 8000ed8: 4603 mov r3, r0 + 8000eda: 2b01 cmp r3, #1 + 8000edc: d1fa bne.n 8000ed4 + { + + } + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + 8000ede: 2003 movs r0, #3 + 8000ee0: f7ff fb72 bl 80005c8 + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + 8000ee4: bf00 nop + 8000ee6: f7ff fb83 bl 80005f0 + 8000eea: 4603 mov r3, r0 + 8000eec: 2b0c cmp r3, #12 + 8000eee: d1fa bne.n 8000ee6 + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + 8000ef0: 2000 movs r0, #0 + 8000ef2: f7ff fb8b bl 800060c + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + 8000ef6: 2000 movs r0, #0 + 8000ef8: f7ff fb9c bl 8000634 + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + 8000efc: 2000 movs r0, #0 + 8000efe: f7ff fbad bl 800065c + LL_SetSystemCoreClock(80000000); + 8000f02: 4804 ldr r0, [pc, #16] ; (8000f14 ) + 8000f04: f000 fa04 bl 8001310 + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + 8000f08: 2000 movs r0, #0 + 8000f0a: f000 f8e9 bl 80010e0 + { + // Error_Handler(); + } +} + 8000f0e: bf00 nop + 8000f10: bd80 pop {r7, pc} + 8000f12: bf00 nop + 8000f14: 04c4b400 .word 0x04c4b400 + +08000f18 : + +// partie commune a toutes les utilisations du wakeup timer +static void RTC_wakeup_init( int delay ) +{ + 8000f18: b580 push {r7, lr} + 8000f1a: b082 sub sp, #8 + 8000f1c: af00 add r7, sp, #0 + 8000f1e: 6078 str r0, [r7, #4] +LL_RTC_DisableWriteProtection( RTC ); + 8000f20: 4812 ldr r0, [pc, #72] ; (8000f6c ) + 8000f22: f7ff fd40 bl 80009a6 +LL_RTC_WAKEUP_Disable( RTC ); + 8000f26: 4811 ldr r0, [pc, #68] ; (8000f6c ) + 8000f28: f7ff fd5d bl 80009e6 +while ( !LL_RTC_IsActiveFlag_WUTW( RTC ) ) + 8000f2c: bf00 nop + 8000f2e: 480f ldr r0, [pc, #60] ; (8000f6c ) + 8000f30: f7ff fda0 bl 8000a74 + 8000f34: 4603 mov r3, r0 + 8000f36: 2b00 cmp r3, #0 + 8000f38: d0f9 beq.n 8000f2e + { } +// connecter le timer a l'horloge 1Hz de la RTC +LL_RTC_WAKEUP_SetClock( RTC, LL_RTC_WAKEUPCLOCK_CKSPRE ); + 8000f3a: 2104 movs r1, #4 + 8000f3c: 480b ldr r0, [pc, #44] ; (8000f6c ) + 8000f3e: f7ff fd62 bl 8000a06 +// fixer la duree de temporisation +LL_RTC_WAKEUP_SetAutoReload( RTC, delay ); // 16 bits + 8000f42: 687b ldr r3, [r7, #4] + 8000f44: 4619 mov r1, r3 + 8000f46: 4809 ldr r0, [pc, #36] ; (8000f6c ) + 8000f48: f7ff fd70 bl 8000a2c +LL_RTC_ClearFlag_WUT(RTC); + 8000f4c: 4807 ldr r0, [pc, #28] ; (8000f6c ) + 8000f4e: f7ff fd80 bl 8000a52 +LL_RTC_EnableIT_WUT(RTC); + 8000f52: 4806 ldr r0, [pc, #24] ; (8000f6c ) + 8000f54: f7ff fda1 bl 8000a9a +LL_RTC_WAKEUP_Enable(RTC); + 8000f58: 4804 ldr r0, [pc, #16] ; (8000f6c ) + 8000f5a: f7ff fd34 bl 80009c6 +LL_RTC_EnableWriteProtection(RTC); + 8000f5e: 4803 ldr r0, [pc, #12] ; (8000f6c ) + 8000f60: f7ff fd14 bl 800098c +} + 8000f64: bf00 nop + 8000f66: 3708 adds r7, #8 + 8000f68: 46bd mov sp, r7 + 8000f6a: bd80 pop {r7, pc} + 8000f6c: 40002800 .word 0x40002800 + +08000f70 : + +// Dans le cas des modes STANDBY et SHUTDOWN, le MPU sera reveille par reset +// causé par 1 wakeup line (interne ou externe) (le NVIC n'est plus alimenté) +void RTC_wakeup_init_from_standby_or_shutdown( int delay ) +{ + 8000f70: b580 push {r7, lr} + 8000f72: b082 sub sp, #8 + 8000f74: af00 add r7, sp, #0 + 8000f76: 6078 str r0, [r7, #4] +RTC_wakeup_init( delay ); + 8000f78: 6878 ldr r0, [r7, #4] + 8000f7a: f7ff ffcd bl 8000f18 +// enable the Internal Wake-up line +LL_PWR_EnableInternWU(); // ceci ne concerne que Standby et Shutdown, pas STOPx + 8000f7e: f7ff fcf5 bl 800096c +} + 8000f82: bf00 nop + 8000f84: 3708 adds r7, #8 + 8000f86: 46bd mov sp, r7 + 8000f88: bd80 pop {r7, pc} + +08000f8a : +// Dans le cas des modes STOPx, le MPU sera reveille par interruption +// le module EXTI et une partie du NVIC sont encore alimentes +// le contenu de la RAM et des registres étant préservé, le MPU +// reprend l'execution après l'instruction WFI +void RTC_wakeup_init_from_stop( int delay ) +{ + 8000f8a: b580 push {r7, lr} + 8000f8c: b082 sub sp, #8 + 8000f8e: af00 add r7, sp, #0 + 8000f90: 6078 str r0, [r7, #4] +RTC_wakeup_init( delay ); + 8000f92: 6878 ldr r0, [r7, #4] + 8000f94: f7ff ffc0 bl 8000f18 +// valider l'interrupt par la ligne 20 du module EXTI, qui est réservée au wakeup timer +LL_EXTI_EnableIT_0_31( LL_EXTI_LINE_20 ); + 8000f98: f44f 1080 mov.w r0, #1048576 ; 0x100000 + 8000f9c: f7ff fc3a bl 8000814 +LL_EXTI_EnableRisingTrig_0_31( LL_EXTI_LINE_20 ); + 8000fa0: f44f 1080 mov.w r0, #1048576 ; 0x100000 + 8000fa4: f7ff fc48 bl 8000838 +// valider l'interrupt chez NVIC +NVIC_SetPriority( RTC_WKUP_IRQn, 1 ); + 8000fa8: 2101 movs r1, #1 + 8000faa: 2003 movs r0, #3 + 8000fac: f7ff fa3a bl 8000424 <__NVIC_SetPriority> +NVIC_EnableIRQ( RTC_WKUP_IRQn ); + 8000fb0: 2003 movs r0, #3 + 8000fb2: f7ff fa19 bl 80003e8 <__NVIC_EnableIRQ> +} + 8000fb6: bf00 nop + 8000fb8: 3708 adds r7, #8 + 8000fba: 46bd mov sp, r7 + 8000fbc: bd80 pop {r7, pc} + +08000fbe : + +// wakeup timer interrupt Handler (inutile mais doit etre defini) +void RTC_WKUP_IRQHandler() +{ + 8000fbe: b580 push {r7, lr} + 8000fc0: af00 add r7, sp, #0 +LL_EXTI_ClearFlag_0_31( LL_EXTI_LINE_20 ); + 8000fc2: f44f 1080 mov.w r0, #1048576 ; 0x100000 + 8000fc6: f7ff fc49 bl 800085c +} + 8000fca: bf00 nop + 8000fcc: bd80 pop {r7, pc} + +08000fce : +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + 8000fce: b480 push {r7} + 8000fd0: af00 add r7, sp, #0 + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + 8000fd2: bf00 nop + 8000fd4: 46bd mov sp, r7 + 8000fd6: f85d 7b04 ldr.w r7, [sp], #4 + 8000fda: 4770 bx lr + +08000fdc : + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + 8000fdc: b480 push {r7} + 8000fde: af00 add r7, sp, #0 + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + 8000fe0: e7fe b.n 8000fe0 + +08000fe2 : + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + 8000fe2: b480 push {r7} + 8000fe4: af00 add r7, sp, #0 + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + 8000fe6: e7fe b.n 8000fe6 + +08000fe8 : + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + 8000fe8: b480 push {r7} + 8000fea: af00 add r7, sp, #0 + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + 8000fec: e7fe b.n 8000fec + +08000fee : + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + 8000fee: b480 push {r7} + 8000ff0: af00 add r7, sp, #0 + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + 8000ff2: e7fe b.n 8000ff2 + +08000ff4 : + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + 8000ff4: b480 push {r7} + 8000ff6: af00 add r7, sp, #0 + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + 8000ff8: bf00 nop + 8000ffa: 46bd mov sp, r7 + 8000ffc: f85d 7b04 ldr.w r7, [sp], #4 + 8001000: 4770 bx lr + +08001002 : + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + 8001002: b480 push {r7} + 8001004: af00 add r7, sp, #0 + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + 8001006: bf00 nop + 8001008: 46bd mov sp, r7 + 800100a: f85d 7b04 ldr.w r7, [sp], #4 + 800100e: 4770 bx lr + +08001010 : + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + 8001010: b480 push {r7} + 8001012: af00 add r7, sp, #0 + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + 8001014: bf00 nop + 8001016: 46bd mov sp, r7 + 8001018: f85d 7b04 ldr.w r7, [sp], #4 + 800101c: 4770 bx lr + ... + +08001020 : + * @param None + * @retval None + */ + +void SystemInit(void) +{ + 8001020: b480 push {r7} + 8001022: af00 add r7, sp, #0 + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + 8001024: 4b17 ldr r3, [pc, #92] ; (8001084 ) + 8001026: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 800102a: 4a16 ldr r2, [pc, #88] ; (8001084 ) + 800102c: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8001030: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + 8001034: 4b14 ldr r3, [pc, #80] ; (8001088 ) + 8001036: 681b ldr r3, [r3, #0] + 8001038: 4a13 ldr r2, [pc, #76] ; (8001088 ) + 800103a: f043 0301 orr.w r3, r3, #1 + 800103e: 6013 str r3, [r2, #0] + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + 8001040: 4b11 ldr r3, [pc, #68] ; (8001088 ) + 8001042: 2200 movs r2, #0 + 8001044: 609a str r2, [r3, #8] + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + 8001046: 4b10 ldr r3, [pc, #64] ; (8001088 ) + 8001048: 681b ldr r3, [r3, #0] + 800104a: 4a0f ldr r2, [pc, #60] ; (8001088 ) + 800104c: f023 53a8 bic.w r3, r3, #352321536 ; 0x15000000 + 8001050: f423 2310 bic.w r3, r3, #589824 ; 0x90000 + 8001054: 6013 str r3, [r2, #0] + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + 8001056: 4b0c ldr r3, [pc, #48] ; (8001088 ) + 8001058: f44f 5280 mov.w r2, #4096 ; 0x1000 + 800105c: 60da str r2, [r3, #12] + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + 800105e: 4b0a ldr r3, [pc, #40] ; (8001088 ) + 8001060: 681b ldr r3, [r3, #0] + 8001062: 4a09 ldr r2, [pc, #36] ; (8001088 ) + 8001064: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8001068: 6013 str r3, [r2, #0] + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + 800106a: 4b07 ldr r3, [pc, #28] ; (8001088 ) + 800106c: 2200 movs r2, #0 + 800106e: 619a str r2, [r3, #24] + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + 8001070: 4b04 ldr r3, [pc, #16] ; (8001084 ) + 8001072: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 8001076: 609a str r2, [r3, #8] +#endif +} + 8001078: bf00 nop + 800107a: 46bd mov sp, r7 + 800107c: f85d 7b04 ldr.w r7, [sp], #4 + 8001080: 4770 bx lr + 8001082: bf00 nop + 8001084: e000ed00 .word 0xe000ed00 + 8001088: 40021000 .word 0x40021000 + +0800108c : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Set stack pointer */ + 800108c: f8df d034 ldr.w sp, [pc, #52] ; 80010c4 + +/* Call the clock system initialization function.*/ + bl SystemInit + 8001090: f7ff ffc6 bl 8001020 + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + 8001094: 2100 movs r1, #0 + b LoopCopyDataInit + 8001096: e003 b.n 80010a0 + +08001098 : + +CopyDataInit: + ldr r3, =_sidata + 8001098: 4b0b ldr r3, [pc, #44] ; (80010c8 ) + ldr r3, [r3, r1] + 800109a: 585b ldr r3, [r3, r1] + str r3, [r0, r1] + 800109c: 5043 str r3, [r0, r1] + adds r1, r1, #4 + 800109e: 3104 adds r1, #4 + +080010a0 : + +LoopCopyDataInit: + ldr r0, =_sdata + 80010a0: 480a ldr r0, [pc, #40] ; (80010cc ) + ldr r3, =_edata + 80010a2: 4b0b ldr r3, [pc, #44] ; (80010d0 ) + adds r2, r0, r1 + 80010a4: 1842 adds r2, r0, r1 + cmp r2, r3 + 80010a6: 429a cmp r2, r3 + bcc CopyDataInit + 80010a8: d3f6 bcc.n 8001098 + ldr r2, =_sbss + 80010aa: 4a0a ldr r2, [pc, #40] ; (80010d4 ) + b LoopFillZerobss + 80010ac: e002 b.n 80010b4 + +080010ae : +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + 80010ae: 2300 movs r3, #0 + str r3, [r2], #4 + 80010b0: f842 3b04 str.w r3, [r2], #4 + +080010b4 : + +LoopFillZerobss: + ldr r3, = _ebss + 80010b4: 4b08 ldr r3, [pc, #32] ; (80010d8 ) + cmp r2, r3 + 80010b6: 429a cmp r2, r3 + bcc FillZerobss + 80010b8: d3f9 bcc.n 80010ae + +/* Call static constructors */ + bl __libc_init_array + 80010ba: f000 f939 bl 8001330 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 80010be: f7ff fd3b bl 8000b38
+ +080010c2 : + +LoopForever: + b LoopForever + 80010c2: e7fe b.n 80010c2 + ldr sp, =_estack /* Set stack pointer */ + 80010c4: 20018000 .word 0x20018000 + ldr r3, =_sidata + 80010c8: 08001398 .word 0x08001398 + ldr r0, =_sdata + 80010cc: 20000000 .word 0x20000000 + ldr r3, =_edata + 80010d0: 2000000c .word 0x2000000c + ldr r2, =_sbss + 80010d4: 2000000c .word 0x2000000c + ldr r3, = _ebss + 80010d8: 20000030 .word 0x20000030 + +080010dc : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 80010dc: e7fe b.n 80010dc + ... + +080010e0 : + * implementation in user file. + * @param TickPriority Tick interrupt priority. + * @retval HAL status + */ +__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) +{ + 80010e0: b580 push {r7, lr} + 80010e2: b084 sub sp, #16 + 80010e4: af00 add r7, sp, #0 + 80010e6: 6078 str r0, [r7, #4] + HAL_StatusTypeDef status = HAL_OK; + 80010e8: 2300 movs r3, #0 + 80010ea: 73fb strb r3, [r7, #15] + + /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/ + if ((uint32_t)uwTickFreq != 0U) + 80010ec: 4b17 ldr r3, [pc, #92] ; (800114c ) + 80010ee: 781b ldrb r3, [r3, #0] + 80010f0: 2b00 cmp r3, #0 + 80010f2: d023 beq.n 800113c + { + /*Configure the SysTick to have interrupt in 1ms time basis*/ + if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)uwTickFreq)) == 0U) + 80010f4: 4b16 ldr r3, [pc, #88] ; (8001150 ) + 80010f6: 681a ldr r2, [r3, #0] + 80010f8: 4b14 ldr r3, [pc, #80] ; (800114c ) + 80010fa: 781b ldrb r3, [r3, #0] + 80010fc: 4619 mov r1, r3 + 80010fe: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8001102: fbb3 f3f1 udiv r3, r3, r1 + 8001106: fbb2 f3f3 udiv r3, r2, r3 + 800110a: 4618 mov r0, r3 + 800110c: f000 f8ce bl 80012ac + 8001110: 4603 mov r3, r0 + 8001112: 2b00 cmp r3, #0 + 8001114: d10f bne.n 8001136 + { + /* Configure the SysTick IRQ priority */ + if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 8001116: 687b ldr r3, [r7, #4] + 8001118: 2b0f cmp r3, #15 + 800111a: d809 bhi.n 8001130 + { + HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 800111c: 2200 movs r2, #0 + 800111e: 6879 ldr r1, [r7, #4] + 8001120: f04f 30ff mov.w r0, #4294967295 + 8001124: f000 f8a6 bl 8001274 + uwTickPrio = TickPriority; + 8001128: 4a0a ldr r2, [pc, #40] ; (8001154 ) + 800112a: 687b ldr r3, [r7, #4] + 800112c: 6013 str r3, [r2, #0] + 800112e: e007 b.n 8001140 + } + else + { + status = HAL_ERROR; + 8001130: 2301 movs r3, #1 + 8001132: 73fb strb r3, [r7, #15] + 8001134: e004 b.n 8001140 + } + } + else + { + status = HAL_ERROR; + 8001136: 2301 movs r3, #1 + 8001138: 73fb strb r3, [r7, #15] + 800113a: e001 b.n 8001140 + } + } + else + { + status = HAL_ERROR; + 800113c: 2301 movs r3, #1 + 800113e: 73fb strb r3, [r7, #15] + } + + /* Return function status */ + return status; + 8001140: 7bfb ldrb r3, [r7, #15] +} + 8001142: 4618 mov r0, r3 + 8001144: 3710 adds r7, #16 + 8001146: 46bd mov sp, r7 + 8001148: bd80 pop {r7, pc} + 800114a: bf00 nop + 800114c: 20000008 .word 0x20000008 + 8001150: 20000000 .word 0x20000000 + 8001154: 20000004 .word 0x20000004 + +08001158 <__NVIC_GetPriorityGrouping>: +{ + 8001158: b480 push {r7} + 800115a: af00 add r7, sp, #0 + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); + 800115c: 4b04 ldr r3, [pc, #16] ; (8001170 <__NVIC_GetPriorityGrouping+0x18>) + 800115e: 68db ldr r3, [r3, #12] + 8001160: 0a1b lsrs r3, r3, #8 + 8001162: f003 0307 and.w r3, r3, #7 +} + 8001166: 4618 mov r0, r3 + 8001168: 46bd mov sp, r7 + 800116a: f85d 7b04 ldr.w r7, [sp], #4 + 800116e: 4770 bx lr + 8001170: e000ed00 .word 0xe000ed00 + +08001174 <__NVIC_SetPriority>: +{ + 8001174: b480 push {r7} + 8001176: b083 sub sp, #12 + 8001178: af00 add r7, sp, #0 + 800117a: 4603 mov r3, r0 + 800117c: 6039 str r1, [r7, #0] + 800117e: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 8001180: f997 3007 ldrsb.w r3, [r7, #7] + 8001184: 2b00 cmp r3, #0 + 8001186: db0a blt.n 800119e <__NVIC_SetPriority+0x2a> + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 8001188: 683b ldr r3, [r7, #0] + 800118a: b2da uxtb r2, r3 + 800118c: 490c ldr r1, [pc, #48] ; (80011c0 <__NVIC_SetPriority+0x4c>) + 800118e: f997 3007 ldrsb.w r3, [r7, #7] + 8001192: 0112 lsls r2, r2, #4 + 8001194: b2d2 uxtb r2, r2 + 8001196: 440b add r3, r1 + 8001198: f883 2300 strb.w r2, [r3, #768] ; 0x300 +} + 800119c: e00a b.n 80011b4 <__NVIC_SetPriority+0x40> + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 800119e: 683b ldr r3, [r7, #0] + 80011a0: b2da uxtb r2, r3 + 80011a2: 4908 ldr r1, [pc, #32] ; (80011c4 <__NVIC_SetPriority+0x50>) + 80011a4: 79fb ldrb r3, [r7, #7] + 80011a6: f003 030f and.w r3, r3, #15 + 80011aa: 3b04 subs r3, #4 + 80011ac: 0112 lsls r2, r2, #4 + 80011ae: b2d2 uxtb r2, r2 + 80011b0: 440b add r3, r1 + 80011b2: 761a strb r2, [r3, #24] +} + 80011b4: bf00 nop + 80011b6: 370c adds r7, #12 + 80011b8: 46bd mov sp, r7 + 80011ba: f85d 7b04 ldr.w r7, [sp], #4 + 80011be: 4770 bx lr + 80011c0: e000e100 .word 0xe000e100 + 80011c4: e000ed00 .word 0xe000ed00 + +080011c8 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000dcc: b480 push {r7} - 8000dce: b089 sub sp, #36 ; 0x24 - 8000dd0: af00 add r7, sp, #0 - 8000dd2: 60f8 str r0, [r7, #12] - 8000dd4: 60b9 str r1, [r7, #8] - 8000dd6: 607a str r2, [r7, #4] + 80011c8: b480 push {r7} + 80011ca: b089 sub sp, #36 ; 0x24 + 80011cc: af00 add r7, sp, #0 + 80011ce: 60f8 str r0, [r7, #12] + 80011d0: 60b9 str r1, [r7, #8] + 80011d2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8000dd8: 68fb ldr r3, [r7, #12] - 8000dda: f003 0307 and.w r3, r3, #7 - 8000dde: 61fb str r3, [r7, #28] + 80011d4: 68fb ldr r3, [r7, #12] + 80011d6: f003 0307 and.w r3, r3, #7 + 80011da: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8000de0: 69fb ldr r3, [r7, #28] - 8000de2: f1c3 0307 rsb r3, r3, #7 - 8000de6: 2b04 cmp r3, #4 - 8000de8: bf28 it cs - 8000dea: 2304 movcs r3, #4 - 8000dec: 61bb str r3, [r7, #24] + 80011dc: 69fb ldr r3, [r7, #28] + 80011de: f1c3 0307 rsb r3, r3, #7 + 80011e2: 2b04 cmp r3, #4 + 80011e4: bf28 it cs + 80011e6: 2304 movcs r3, #4 + 80011e8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8000dee: 69fb ldr r3, [r7, #28] - 8000df0: 3304 adds r3, #4 - 8000df2: 2b06 cmp r3, #6 - 8000df4: d902 bls.n 8000dfc - 8000df6: 69fb ldr r3, [r7, #28] - 8000df8: 3b03 subs r3, #3 - 8000dfa: e000 b.n 8000dfe - 8000dfc: 2300 movs r3, #0 - 8000dfe: 617b str r3, [r7, #20] + 80011ea: 69fb ldr r3, [r7, #28] + 80011ec: 3304 adds r3, #4 + 80011ee: 2b06 cmp r3, #6 + 80011f0: d902 bls.n 80011f8 + 80011f2: 69fb ldr r3, [r7, #28] + 80011f4: 3b03 subs r3, #3 + 80011f6: e000 b.n 80011fa + 80011f8: 2300 movs r3, #0 + 80011fa: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000e00: f04f 32ff mov.w r2, #4294967295 - 8000e04: 69bb ldr r3, [r7, #24] - 8000e06: fa02 f303 lsl.w r3, r2, r3 - 8000e0a: 43da mvns r2, r3 - 8000e0c: 68bb ldr r3, [r7, #8] - 8000e0e: 401a ands r2, r3 - 8000e10: 697b ldr r3, [r7, #20] - 8000e12: 409a lsls r2, r3 + 80011fc: f04f 32ff mov.w r2, #4294967295 + 8001200: 69bb ldr r3, [r7, #24] + 8001202: fa02 f303 lsl.w r3, r2, r3 + 8001206: 43da mvns r2, r3 + 8001208: 68bb ldr r3, [r7, #8] + 800120a: 401a ands r2, r3 + 800120c: 697b ldr r3, [r7, #20] + 800120e: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8000e14: f04f 31ff mov.w r1, #4294967295 - 8000e18: 697b ldr r3, [r7, #20] - 8000e1a: fa01 f303 lsl.w r3, r1, r3 - 8000e1e: 43d9 mvns r1, r3 - 8000e20: 687b ldr r3, [r7, #4] - 8000e22: 400b ands r3, r1 + 8001210: f04f 31ff mov.w r1, #4294967295 + 8001214: 697b ldr r3, [r7, #20] + 8001216: fa01 f303 lsl.w r3, r1, r3 + 800121a: 43d9 mvns r1, r3 + 800121c: 687b ldr r3, [r7, #4] + 800121e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000e24: 4313 orrs r3, r2 + 8001220: 4313 orrs r3, r2 ); } - 8000e26: 4618 mov r0, r3 - 8000e28: 3724 adds r7, #36 ; 0x24 - 8000e2a: 46bd mov sp, r7 - 8000e2c: f85d 7b04 ldr.w r7, [sp], #4 - 8000e30: 4770 bx lr + 8001222: 4618 mov r0, r3 + 8001224: 3724 adds r7, #36 ; 0x24 + 8001226: 46bd mov sp, r7 + 8001228: f85d 7b04 ldr.w r7, [sp], #4 + 800122c: 4770 bx lr ... -08000e34 : +08001230 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8000e34: b580 push {r7, lr} - 8000e36: b082 sub sp, #8 - 8000e38: af00 add r7, sp, #0 - 8000e3a: 6078 str r0, [r7, #4] + 8001230: b580 push {r7, lr} + 8001232: b082 sub sp, #8 + 8001234: af00 add r7, sp, #0 + 8001236: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000e3c: 687b ldr r3, [r7, #4] - 8000e3e: 3b01 subs r3, #1 - 8000e40: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8000e44: d301 bcc.n 8000e4a + 8001238: 687b ldr r3, [r7, #4] + 800123a: 3b01 subs r3, #1 + 800123c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8001240: d301 bcc.n 8001246 { return (1UL); /* Reload value impossible */ - 8000e46: 2301 movs r3, #1 - 8000e48: e00f b.n 8000e6a + 8001242: 2301 movs r3, #1 + 8001244: e00f b.n 8001266 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000e4a: 4a0a ldr r2, [pc, #40] ; (8000e74 ) - 8000e4c: 687b ldr r3, [r7, #4] - 8000e4e: 3b01 subs r3, #1 - 8000e50: 6053 str r3, [r2, #4] + 8001246: 4a0a ldr r2, [pc, #40] ; (8001270 ) + 8001248: 687b ldr r3, [r7, #4] + 800124a: 3b01 subs r3, #1 + 800124c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8000e52: 210f movs r1, #15 - 8000e54: f04f 30ff mov.w r0, #4294967295 - 8000e58: f7ff ff8e bl 8000d78 <__NVIC_SetPriority> + 800124e: 210f movs r1, #15 + 8001250: f04f 30ff mov.w r0, #4294967295 + 8001254: f7ff ff8e bl 8001174 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000e5c: 4b05 ldr r3, [pc, #20] ; (8000e74 ) - 8000e5e: 2200 movs r2, #0 - 8000e60: 609a str r2, [r3, #8] + 8001258: 4b05 ldr r3, [pc, #20] ; (8001270 ) + 800125a: 2200 movs r2, #0 + 800125c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000e62: 4b04 ldr r3, [pc, #16] ; (8000e74 ) - 8000e64: 2207 movs r2, #7 - 8000e66: 601a str r2, [r3, #0] + 800125e: 4b04 ldr r3, [pc, #16] ; (8001270 ) + 8001260: 2207 movs r2, #7 + 8001262: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000e68: 2300 movs r3, #0 + 8001264: 2300 movs r3, #0 } - 8000e6a: 4618 mov r0, r3 - 8000e6c: 3708 adds r7, #8 - 8000e6e: 46bd mov sp, r7 - 8000e70: bd80 pop {r7, pc} - 8000e72: bf00 nop - 8000e74: e000e010 .word 0xe000e010 + 8001266: 4618 mov r0, r3 + 8001268: 3708 adds r7, #8 + 800126a: 46bd mov sp, r7 + 800126c: bd80 pop {r7, pc} + 800126e: bf00 nop + 8001270: e000e010 .word 0xe000e010 -08000e78 : +08001274 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000e78: b580 push {r7, lr} - 8000e7a: b086 sub sp, #24 - 8000e7c: af00 add r7, sp, #0 - 8000e7e: 4603 mov r3, r0 - 8000e80: 60b9 str r1, [r7, #8] - 8000e82: 607a str r2, [r7, #4] - 8000e84: 73fb strb r3, [r7, #15] + 8001274: b580 push {r7, lr} + 8001276: b086 sub sp, #24 + 8001278: af00 add r7, sp, #0 + 800127a: 4603 mov r3, r0 + 800127c: 60b9 str r1, [r7, #8] + 800127e: 607a str r2, [r7, #4] + 8001280: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; - 8000e86: 2300 movs r3, #0 - 8000e88: 617b str r3, [r7, #20] + 8001282: 2300 movs r3, #0 + 8001284: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8000e8a: f7ff ff67 bl 8000d5c <__NVIC_GetPriorityGrouping> - 8000e8e: 6178 str r0, [r7, #20] + 8001286: f7ff ff67 bl 8001158 <__NVIC_GetPriorityGrouping> + 800128a: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8000e90: 687a ldr r2, [r7, #4] - 8000e92: 68b9 ldr r1, [r7, #8] - 8000e94: 6978 ldr r0, [r7, #20] - 8000e96: f7ff ff99 bl 8000dcc - 8000e9a: 4602 mov r2, r0 - 8000e9c: f997 300f ldrsb.w r3, [r7, #15] - 8000ea0: 4611 mov r1, r2 - 8000ea2: 4618 mov r0, r3 - 8000ea4: f7ff ff68 bl 8000d78 <__NVIC_SetPriority> + 800128c: 687a ldr r2, [r7, #4] + 800128e: 68b9 ldr r1, [r7, #8] + 8001290: 6978 ldr r0, [r7, #20] + 8001292: f7ff ff99 bl 80011c8 + 8001296: 4602 mov r2, r0 + 8001298: f997 300f ldrsb.w r3, [r7, #15] + 800129c: 4611 mov r1, r2 + 800129e: 4618 mov r0, r3 + 80012a0: f7ff ff68 bl 8001174 <__NVIC_SetPriority> } - 8000ea8: bf00 nop - 8000eaa: 3718 adds r7, #24 - 8000eac: 46bd mov sp, r7 - 8000eae: bd80 pop {r7, pc} + 80012a4: bf00 nop + 80012a6: 3718 adds r7, #24 + 80012a8: 46bd mov sp, r7 + 80012aa: bd80 pop {r7, pc} -08000eb0 : +080012ac : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8000eb0: b580 push {r7, lr} - 8000eb2: b082 sub sp, #8 - 8000eb4: af00 add r7, sp, #0 - 8000eb6: 6078 str r0, [r7, #4] + 80012ac: b580 push {r7, lr} + 80012ae: b082 sub sp, #8 + 80012b0: af00 add r7, sp, #0 + 80012b2: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8000eb8: 6878 ldr r0, [r7, #4] - 8000eba: f7ff ffbb bl 8000e34 - 8000ebe: 4603 mov r3, r0 + 80012b4: 6878 ldr r0, [r7, #4] + 80012b6: f7ff ffbb bl 8001230 + 80012ba: 4603 mov r3, r0 } - 8000ec0: 4618 mov r0, r3 - 8000ec2: 3708 adds r7, #8 - 8000ec4: 46bd mov sp, r7 - 8000ec6: bd80 pop {r7, pc} + 80012bc: 4618 mov r0, r3 + 80012be: 3708 adds r7, #8 + 80012c0: 46bd mov sp, r7 + 80012c2: bd80 pop {r7, pc} -08000ec8 : +080012c4 : * configuration by calling this function, for a delay use rather osDelay RTOS service. * @param Ticks Number of ticks * @retval None */ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) { - 8000ec8: b480 push {r7} - 8000eca: b083 sub sp, #12 - 8000ecc: af00 add r7, sp, #0 - 8000ece: 6078 str r0, [r7, #4] - 8000ed0: 6039 str r1, [r7, #0] + 80012c4: b480 push {r7} + 80012c6: b083 sub sp, #12 + 80012c8: af00 add r7, sp, #0 + 80012ca: 6078 str r0, [r7, #4] + 80012cc: 6039 str r1, [r7, #0] /* Configure the SysTick to have interrupt in 1ms time base */ SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ - 8000ed2: 687a ldr r2, [r7, #4] - 8000ed4: 683b ldr r3, [r7, #0] - 8000ed6: fbb2 f3f3 udiv r3, r2, r3 - 8000eda: 4a07 ldr r2, [pc, #28] ; (8000ef8 ) - 8000edc: 3b01 subs r3, #1 - 8000ede: 6053 str r3, [r2, #4] + 80012ce: 687a ldr r2, [r7, #4] + 80012d0: 683b ldr r3, [r7, #0] + 80012d2: fbb2 f3f3 udiv r3, r2, r3 + 80012d6: 4a07 ldr r2, [pc, #28] ; (80012f4 ) + 80012d8: 3b01 subs r3, #1 + 80012da: 6053 str r3, [r2, #4] SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000ee0: 4b05 ldr r3, [pc, #20] ; (8000ef8 ) - 8000ee2: 2200 movs r2, #0 - 8000ee4: 609a str r2, [r3, #8] + 80012dc: 4b05 ldr r3, [pc, #20] ; (80012f4 ) + 80012de: 2200 movs r2, #0 + 80012e0: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000ee6: 4b04 ldr r3, [pc, #16] ; (8000ef8 ) - 8000ee8: 2205 movs r2, #5 - 8000eea: 601a str r2, [r3, #0] + 80012e2: 4b04 ldr r3, [pc, #16] ; (80012f4 ) + 80012e4: 2205 movs r2, #5 + 80012e6: 601a str r2, [r3, #0] SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ } - 8000eec: bf00 nop - 8000eee: 370c adds r7, #12 - 8000ef0: 46bd mov sp, r7 - 8000ef2: f85d 7b04 ldr.w r7, [sp], #4 - 8000ef6: 4770 bx lr - 8000ef8: e000e010 .word 0xe000e010 + 80012e8: bf00 nop + 80012ea: 370c adds r7, #12 + 80012ec: 46bd mov sp, r7 + 80012ee: f85d 7b04 ldr.w r7, [sp], #4 + 80012f2: 4770 bx lr + 80012f4: e000e010 .word 0xe000e010 -08000efc : +080012f8 : * @param HCLKFrequency HCLK frequency in Hz * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq * @retval None */ void LL_Init1msTick(uint32_t HCLKFrequency) { - 8000efc: b580 push {r7, lr} - 8000efe: b082 sub sp, #8 - 8000f00: af00 add r7, sp, #0 - 8000f02: 6078 str r0, [r7, #4] + 80012f8: b580 push {r7, lr} + 80012fa: b082 sub sp, #8 + 80012fc: af00 add r7, sp, #0 + 80012fe: 6078 str r0, [r7, #4] /* Use frequency provided in argument */ LL_InitTick(HCLKFrequency, 100U); - 8000f04: 2164 movs r1, #100 ; 0x64 - 8000f06: 6878 ldr r0, [r7, #4] - 8000f08: f7ff ffde bl 8000ec8 + 8001300: 2164 movs r1, #100 ; 0x64 + 8001302: 6878 ldr r0, [r7, #4] + 8001304: f7ff ffde bl 80012c4 } - 8000f0c: bf00 nop - 8000f0e: 3708 adds r7, #8 - 8000f10: 46bd mov sp, r7 - 8000f12: bd80 pop {r7, pc} + 8001308: bf00 nop + 800130a: 3708 adds r7, #8 + 800130c: 46bd mov sp, r7 + 800130e: bd80 pop {r7, pc} -08000f14 : +08001310 : * @note Variable can be calculated also through SystemCoreClockUpdate function. * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) * @retval None */ void LL_SetSystemCoreClock(uint32_t HCLKFrequency) { - 8000f14: b480 push {r7} - 8000f16: b083 sub sp, #12 - 8000f18: af00 add r7, sp, #0 - 8000f1a: 6078 str r0, [r7, #4] + 8001310: b480 push {r7} + 8001312: b083 sub sp, #12 + 8001314: af00 add r7, sp, #0 + 8001316: 6078 str r0, [r7, #4] /* HCLK clock frequency */ SystemCoreClock = HCLKFrequency; - 8000f1c: 4a04 ldr r2, [pc, #16] ; (8000f30 ) - 8000f1e: 687b ldr r3, [r7, #4] - 8000f20: 6013 str r3, [r2, #0] + 8001318: 4a04 ldr r2, [pc, #16] ; (800132c ) + 800131a: 687b ldr r3, [r7, #4] + 800131c: 6013 str r3, [r2, #0] } - 8000f22: bf00 nop - 8000f24: 370c adds r7, #12 - 8000f26: 46bd mov sp, r7 - 8000f28: f85d 7b04 ldr.w r7, [sp], #4 - 8000f2c: 4770 bx lr - 8000f2e: bf00 nop - 8000f30: 20000000 .word 0x20000000 + 800131e: bf00 nop + 8001320: 370c adds r7, #12 + 8001322: 46bd mov sp, r7 + 8001324: f85d 7b04 ldr.w r7, [sp], #4 + 8001328: 4770 bx lr + 800132a: bf00 nop + 800132c: 20000000 .word 0x20000000 -08000f34 <__libc_init_array>: - 8000f34: b570 push {r4, r5, r6, lr} - 8000f36: 4e0d ldr r6, [pc, #52] ; (8000f6c <__libc_init_array+0x38>) - 8000f38: 4c0d ldr r4, [pc, #52] ; (8000f70 <__libc_init_array+0x3c>) - 8000f3a: 1ba4 subs r4, r4, r6 - 8000f3c: 10a4 asrs r4, r4, #2 - 8000f3e: 2500 movs r5, #0 - 8000f40: 42a5 cmp r5, r4 - 8000f42: d109 bne.n 8000f58 <__libc_init_array+0x24> - 8000f44: 4e0b ldr r6, [pc, #44] ; (8000f74 <__libc_init_array+0x40>) - 8000f46: 4c0c ldr r4, [pc, #48] ; (8000f78 <__libc_init_array+0x44>) - 8000f48: f000 f818 bl 8000f7c <_init> - 8000f4c: 1ba4 subs r4, r4, r6 - 8000f4e: 10a4 asrs r4, r4, #2 - 8000f50: 2500 movs r5, #0 - 8000f52: 42a5 cmp r5, r4 - 8000f54: d105 bne.n 8000f62 <__libc_init_array+0x2e> - 8000f56: bd70 pop {r4, r5, r6, pc} - 8000f58: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 8000f5c: 4798 blx r3 - 8000f5e: 3501 adds r5, #1 - 8000f60: e7ee b.n 8000f40 <__libc_init_array+0xc> - 8000f62: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 8000f66: 4798 blx r3 - 8000f68: 3501 adds r5, #1 - 8000f6a: e7f2 b.n 8000f52 <__libc_init_array+0x1e> - 8000f6c: 08000f94 .word 0x08000f94 - 8000f70: 08000f94 .word 0x08000f94 - 8000f74: 08000f94 .word 0x08000f94 - 8000f78: 08000f98 .word 0x08000f98 +08001330 <__libc_init_array>: + 8001330: b570 push {r4, r5, r6, lr} + 8001332: 4e0d ldr r6, [pc, #52] ; (8001368 <__libc_init_array+0x38>) + 8001334: 4c0d ldr r4, [pc, #52] ; (800136c <__libc_init_array+0x3c>) + 8001336: 1ba4 subs r4, r4, r6 + 8001338: 10a4 asrs r4, r4, #2 + 800133a: 2500 movs r5, #0 + 800133c: 42a5 cmp r5, r4 + 800133e: d109 bne.n 8001354 <__libc_init_array+0x24> + 8001340: 4e0b ldr r6, [pc, #44] ; (8001370 <__libc_init_array+0x40>) + 8001342: 4c0c ldr r4, [pc, #48] ; (8001374 <__libc_init_array+0x44>) + 8001344: f000 f818 bl 8001378 <_init> + 8001348: 1ba4 subs r4, r4, r6 + 800134a: 10a4 asrs r4, r4, #2 + 800134c: 2500 movs r5, #0 + 800134e: 42a5 cmp r5, r4 + 8001350: d105 bne.n 800135e <__libc_init_array+0x2e> + 8001352: bd70 pop {r4, r5, r6, pc} + 8001354: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8001358: 4798 blx r3 + 800135a: 3501 adds r5, #1 + 800135c: e7ee b.n 800133c <__libc_init_array+0xc> + 800135e: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8001362: 4798 blx r3 + 8001364: 3501 adds r5, #1 + 8001366: e7f2 b.n 800134e <__libc_init_array+0x1e> + 8001368: 08001390 .word 0x08001390 + 800136c: 08001390 .word 0x08001390 + 8001370: 08001390 .word 0x08001390 + 8001374: 08001394 .word 0x08001394 -08000f7c <_init>: - 8000f7c: b5f8 push {r3, r4, r5, r6, r7, lr} - 8000f7e: bf00 nop - 8000f80: bcf8 pop {r3, r4, r5, r6, r7} - 8000f82: bc08 pop {r3} - 8000f84: 469e mov lr, r3 - 8000f86: 4770 bx lr +08001378 <_init>: + 8001378: b5f8 push {r3, r4, r5, r6, r7, lr} + 800137a: bf00 nop + 800137c: bcf8 pop {r3, r4, r5, r6, r7} + 800137e: bc08 pop {r3} + 8001380: 469e mov lr, r3 + 8001382: 4770 bx lr -08000f88 <_fini>: - 8000f88: b5f8 push {r3, r4, r5, r6, r7, lr} - 8000f8a: bf00 nop - 8000f8c: bcf8 pop {r3, r4, r5, r6, r7} - 8000f8e: bc08 pop {r3} - 8000f90: 469e mov lr, r3 - 8000f92: 4770 bx lr +08001384 <_fini>: + 8001384: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001386: bf00 nop + 8001388: bcf8 pop {r3, r4, r5, r6, r7} + 800138a: bc08 pop {r3} + 800138c: 469e mov lr, r3 + 800138e: 4770 bx lr diff --git a/RealOne/Debug/RealOne.map b/RealOne/Debug/RealOne.map index a2f198b..f745f60 100644 --- a/RealOne/Debug/RealOne.map +++ b/RealOne/Debug/RealOne.map @@ -119,6 +119,7 @@ Discarded input sections .group 0x0000000000000000 0xc Core/Src/main.o .group 0x0000000000000000 0xc Core/Src/main.o .group 0x0000000000000000 0xc Core/Src/main.o + .group 0x0000000000000000 0xc Core/Src/main.o .text 0x0000000000000000 0x0 Core/Src/main.o .data 0x0000000000000000 0x0 Core/Src/main.o .bss 0x0000000000000000 0x0 Core/Src/main.o @@ -210,6 +211,7 @@ Discarded input sections .group 0x0000000000000000 0xc Core/Src/stm32l4xx_hal_msp.o .group 0x0000000000000000 0xc Core/Src/stm32l4xx_hal_msp.o .group 0x0000000000000000 0xc Core/Src/stm32l4xx_hal_msp.o + .group 0x0000000000000000 0xc Core/Src/stm32l4xx_hal_msp.o .text 0x0000000000000000 0x0 Core/Src/stm32l4xx_hal_msp.o .data 0x0000000000000000 0x0 Core/Src/stm32l4xx_hal_msp.o .bss 0x0000000000000000 0x0 Core/Src/stm32l4xx_hal_msp.o @@ -226,7 +228,7 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x30 Core/Src/stm32l4xx_hal_msp.o .debug_ranges 0x0000000000000000 0x20 Core/Src/stm32l4xx_hal_msp.o - .debug_macro 0x0000000000000000 0x233 Core/Src/stm32l4xx_hal_msp.o + .debug_macro 0x0000000000000000 0x23c Core/Src/stm32l4xx_hal_msp.o .debug_macro 0x0000000000000000 0xaae Core/Src/stm32l4xx_hal_msp.o .debug_macro 0x0000000000000000 0x17a Core/Src/stm32l4xx_hal_msp.o .debug_macro 0x0000000000000000 0x2e Core/Src/stm32l4xx_hal_msp.o @@ -274,8 +276,9 @@ Discarded input sections .debug_macro 0x0000000000000000 0x208 Core/Src/stm32l4xx_hal_msp.o .debug_macro 0x0000000000000000 0x2cb Core/Src/stm32l4xx_hal_msp.o .debug_macro 0x0000000000000000 0x16a Core/Src/stm32l4xx_hal_msp.o - .debug_line 0x0000000000000000 0x7e9 Core/Src/stm32l4xx_hal_msp.o - .debug_str 0x0000000000000000 0xed732 Core/Src/stm32l4xx_hal_msp.o + .debug_macro 0x0000000000000000 0x4e5 Core/Src/stm32l4xx_hal_msp.o + .debug_line 0x0000000000000000 0x7ff Core/Src/stm32l4xx_hal_msp.o + .debug_str 0x0000000000000000 0xef46e Core/Src/stm32l4xx_hal_msp.o .comment 0x0000000000000000 0x7c Core/Src/stm32l4xx_hal_msp.o .debug_frame 0x0000000000000000 0x88 Core/Src/stm32l4xx_hal_msp.o .ARM.attributes @@ -327,6 +330,7 @@ Discarded input sections .group 0x0000000000000000 0xc Core/Src/stm32l4xx_it.o .group 0x0000000000000000 0xc Core/Src/stm32l4xx_it.o .group 0x0000000000000000 0xc Core/Src/stm32l4xx_it.o + .group 0x0000000000000000 0xc Core/Src/stm32l4xx_it.o .text 0x0000000000000000 0x0 Core/Src/stm32l4xx_it.o .data 0x0000000000000000 0x0 Core/Src/stm32l4xx_it.o .bss 0x0000000000000000 0x0 Core/Src/stm32l4xx_it.o @@ -379,6 +383,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x208 Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0x2cb Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0x16a Core/Src/stm32l4xx_it.o + .debug_macro 0x0000000000000000 0x4e5 Core/Src/stm32l4xx_it.o .group 0x0000000000000000 0xc Core/Src/syscalls.o .group 0x0000000000000000 0xc Core/Src/syscalls.o .group 0x0000000000000000 0xc Core/Src/syscalls.o @@ -3186,6 +3191,183 @@ Discarded input sections .debug_frame 0x0000000000000000 0x2fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .ARM.attributes 0x0000000000000000 0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + 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Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text 0x0000000000000000 0x0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .data 0x0000000000000000 0x0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .bss 0x0000000000000000 0x0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_SetHourFormat + 0x0000000000000000 0x26 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_GetHourFormat + 0x0000000000000000 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_EnableInitMode + 0x0000000000000000 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_DisableInitMode + 0x0000000000000000 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_IsShadowRegBypassEnabled + 0x0000000000000000 0x26 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_SetAsynchPrescaler + 0x0000000000000000 0x28 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_SetSynchPrescaler + 0x0000000000000000 0x2a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_EnableWriteProtection + 0x0000000000000000 0x1a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_DisableWriteProtection + 0x0000000000000000 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_TIME_Config + 0x0000000000000000 0x4a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_DATE_Config + 0x0000000000000000 0x4c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_ALMA_SetMask + 0x0000000000000000 0x26 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_ALMA_EnableWeekday + 0x0000000000000000 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_ALMA_DisableWeekday + 0x0000000000000000 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_ALMA_SetDay + 0x0000000000000000 0x28 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .text.LL_RTC_ALMA_SetWeekDay + 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.debug_line 0x0000000000000000 0xafd Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .debug_str 0x0000000000000000 0xe70f7 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .comment 0x0000000000000000 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .debug_frame 0x0000000000000000 0x66c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o + .ARM.attributes + 0x0000000000000000 0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .group 0x0000000000000000 0xc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o @@ -3424,6 +3606,7 @@ LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o +LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o START GROUP LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a @@ -3456,7 +3639,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000008000000 g_pfnVectors 0x0000000008000188 . = ALIGN (0x4) -.text 0x0000000008000188 0xe0c +.text 0x0000000008000188 0x1208 0x0000000008000188 . = ALIGN (0x4) *(.text) .text 0x0000000008000188 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o @@ -3488,296 +3671,342 @@ LOAD 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(0x4) + 0x0000000008001390 . = ALIGN (0x4) -.ARM.extab 0x0000000008000f94 0x0 - 0x0000000008000f94 . = ALIGN (0x4) +.ARM.extab 0x0000000008001390 0x0 + 0x0000000008001390 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x0000000008000f94 . = ALIGN (0x4) + 0x0000000008001390 . = ALIGN (0x4) -.ARM 0x0000000008000f94 0x0 - 0x0000000008000f94 . = ALIGN (0x4) - 0x0000000008000f94 __exidx_start = . +.ARM 0x0000000008001390 0x0 + 0x0000000008001390 . = ALIGN (0x4) + 0x0000000008001390 __exidx_start = . *(.ARM.exidx*) - 0x0000000008000f94 __exidx_end = . - 0x0000000008000f94 . = ALIGN (0x4) + 0x0000000008001390 __exidx_end = . + 0x0000000008001390 . = ALIGN (0x4) -.preinit_array 0x0000000008000f94 0x0 - 0x0000000008000f94 . = ALIGN (0x4) - 0x0000000008000f94 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008001390 0x0 + 0x0000000008001390 . = ALIGN (0x4) + 0x0000000008001390 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0000000008000f94 PROVIDE (__preinit_array_end = .) - 0x0000000008000f94 . = ALIGN (0x4) + 0x0000000008001390 PROVIDE (__preinit_array_end = .) + 0x0000000008001390 . = ALIGN (0x4) -.init_array 0x0000000008000f94 0x4 - 0x0000000008000f94 . = ALIGN (0x4) - 0x0000000008000f94 PROVIDE (__init_array_start = .) +.init_array 0x0000000008001390 0x4 + 0x0000000008001390 . = ALIGN (0x4) + 0x0000000008001390 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0000000008000f94 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - 0x0000000008000f98 PROVIDE (__init_array_end = .) - 0x0000000008000f98 . = ALIGN (0x4) + .init_array 0x0000000008001390 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o + 0x0000000008001394 PROVIDE (__init_array_end = .) + 0x0000000008001394 . = ALIGN (0x4) -.fini_array 0x0000000008000f98 0x4 - 0x0000000008000f98 . = ALIGN (0x4) +.fini_array 0x0000000008001394 0x4 + 0x0000000008001394 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008000f98 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o + .fini_array 0x0000000008001394 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008000f9c . = ALIGN (0x4) - 0x0000000008000f9c _sidata = LOADADDR (.data) + 0x0000000008001398 . = ALIGN (0x4) + 0x0000000008001398 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0xc load address 0x0000000008000f9c +.data 0x0000000020000000 0xc load address 0x0000000008001398 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -3795,11 +4024,11 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte *fill* 0x0000000020000009 0x3 0x000000002000000c _edata = . -.igot.plt 0x000000002000000c 0x0 load address 0x0000000008000fa8 +.igot.plt 0x000000002000000c 0x0 load address 0x00000000080013a4 .igot.plt 0x000000002000000c 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o 0x000000002000000c . = ALIGN (0x4) -.bss 0x000000002000000c 0x24 load address 0x0000000008000fa8 +.bss 0x000000002000000c 0x24 load address 0x00000000080013a4 0x000000002000000c _sbss = . 0x000000002000000c __bss_start__ = _sbss *(.bss) @@ -3819,7 +4048,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000020000030 __bss_end__ = _ebss ._user_heap_stack - 0x0000000020000030 0x600 load address 0x0000000008000fa8 + 0x0000000020000030 0x600 load address 0x00000000080013a4 0x0000000020000030 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x0000000020000030 PROVIDE (_end = .) @@ -3863,55 +4092,55 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x000000000000023a 0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o OUTPUT(RealOne.elf elf32-littlearm) -.debug_info 0x0000000000000000 0x4be7 +.debug_info 0x0000000000000000 0x5321 .debug_info 0x0000000000000000 0x84a Core/Src/gpio.o - .debug_info 0x000000000000084a 0xfd5 Core/Src/main.o - .debug_info 0x000000000000181f 0x35e Core/Src/stm32l4xx_it.o - .debug_info 0x0000000000001b7d 0x727 Core/Src/system_stm32l4xx.o - .debug_info 0x00000000000022a4 0x22 Core/Startup/startup_stm32l476rgtx.o - .debug_info 0x00000000000022c6 0xc20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_info 0x0000000000002ee6 0xf6d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_info 0x0000000000003e53 0xd94 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_info 0x000000000000084a 0x170f Core/Src/main.o + .debug_info 0x0000000000001f59 0x35e Core/Src/stm32l4xx_it.o + .debug_info 0x00000000000022b7 0x727 Core/Src/system_stm32l4xx.o + .debug_info 0x00000000000029de 0x22 Core/Startup/startup_stm32l476rgtx.o + .debug_info 0x0000000000002a00 0xc20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_info 0x0000000000003620 0xf6d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_info 0x000000000000458d 0xd94 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_abbrev 0x0000000000000000 0xd51 +.debug_abbrev 0x0000000000000000 0xe11 .debug_abbrev 0x0000000000000000 0x233 Core/Src/gpio.o - .debug_abbrev 0x0000000000000233 0x1b6 Core/Src/main.o - .debug_abbrev 0x00000000000003e9 0xd9 Core/Src/stm32l4xx_it.o - .debug_abbrev 0x00000000000004c2 0x150 Core/Src/system_stm32l4xx.o - .debug_abbrev 0x0000000000000612 0x12 Core/Startup/startup_stm32l476rgtx.o - .debug_abbrev 0x0000000000000624 0x1fb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_abbrev 0x000000000000081f 0x2fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_abbrev 0x0000000000000b19 0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_abbrev 0x0000000000000233 0x276 Core/Src/main.o + .debug_abbrev 0x00000000000004a9 0xd9 Core/Src/stm32l4xx_it.o + .debug_abbrev 0x0000000000000582 0x150 Core/Src/system_stm32l4xx.o + .debug_abbrev 0x00000000000006d2 0x12 Core/Startup/startup_stm32l476rgtx.o + .debug_abbrev 0x00000000000006e4 0x1fb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_abbrev 0x00000000000008df 0x2fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_abbrev 0x0000000000000bd9 0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_aranges 0x0000000000000000 0x5c0 +.debug_aranges 0x0000000000000000 0x668 .debug_aranges 0x0000000000000000 0x70 Core/Src/gpio.o .debug_aranges - 0x0000000000000070 0x128 Core/Src/main.o + 0x0000000000000070 0x1d0 Core/Src/main.o .debug_aranges - 0x0000000000000198 0x58 Core/Src/stm32l4xx_it.o + 0x0000000000000240 0x58 Core/Src/stm32l4xx_it.o .debug_aranges - 0x00000000000001f0 0x28 Core/Src/system_stm32l4xx.o + 0x0000000000000298 0x28 Core/Src/system_stm32l4xx.o .debug_aranges - 0x0000000000000218 0x28 Core/Startup/startup_stm32l476rgtx.o + 0x00000000000002c0 0x28 Core/Startup/startup_stm32l476rgtx.o .debug_aranges - 0x0000000000000240 0x130 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + 0x00000000000002e8 0x130 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o .debug_aranges - 0x0000000000000370 0x118 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + 0x0000000000000418 0x118 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o .debug_aranges - 0x0000000000000488 0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + 0x0000000000000530 0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_ranges 0x0000000000000000 0x548 +.debug_ranges 0x0000000000000000 0x5f0 .debug_ranges 0x0000000000000000 0x60 Core/Src/gpio.o - .debug_ranges 0x0000000000000060 0x118 Core/Src/main.o - .debug_ranges 0x0000000000000178 0x48 Core/Src/stm32l4xx_it.o - .debug_ranges 0x00000000000001c0 0x18 Core/Src/system_stm32l4xx.o - .debug_ranges 0x00000000000001d8 0x20 Core/Startup/startup_stm32l476rgtx.o - .debug_ranges 0x00000000000001f8 0x120 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_ranges 0x0000000000000318 0x108 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_ranges 0x0000000000000420 0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_ranges 0x0000000000000060 0x1c0 Core/Src/main.o + .debug_ranges 0x0000000000000220 0x48 Core/Src/stm32l4xx_it.o + .debug_ranges 0x0000000000000268 0x18 Core/Src/system_stm32l4xx.o + .debug_ranges 0x0000000000000280 0x20 Core/Startup/startup_stm32l476rgtx.o + .debug_ranges 0x00000000000002a0 0x120 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_ranges 0x00000000000003c0 0x108 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_ranges 0x00000000000004c8 0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_macro 0x0000000000000000 0x26337 +.debug_macro 0x0000000000000000 0x2682e .debug_macro 0x0000000000000000 0x204 Core/Src/gpio.o .debug_macro 0x0000000000000204 0xaae Core/Src/gpio.o .debug_macro 0x0000000000000cb2 0x2e Core/Src/gpio.o @@ -3953,48 +4182,49 @@ OUTPUT(RealOne.elf elf32-littlearm) .debug_macro 0x0000000000023b40 0x331 Core/Src/gpio.o .debug_macro 0x0000000000023e71 0x1b9 Core/Src/gpio.o .debug_macro 0x000000000002402a 0x16a Core/Src/gpio.o - .debug_macro 0x0000000000024194 0x237 Core/Src/main.o - .debug_macro 0x00000000000243cb 0x708 Core/Src/main.o - .debug_macro 0x0000000000024ad3 0x1bf Core/Src/main.o - .debug_macro 0x0000000000024c92 0x2f5 Core/Src/main.o - .debug_macro 0x0000000000024f87 0x164 Core/Src/main.o - .debug_macro 0x00000000000250eb 0x1a7 Core/Src/main.o - .debug_macro 0x0000000000025292 0xa7 Core/Src/main.o - .debug_macro 0x0000000000025339 0x208 Core/Src/main.o - .debug_macro 0x0000000000025541 0x2cb Core/Src/main.o - .debug_macro 0x000000000002580c 0x23d Core/Src/stm32l4xx_it.o - .debug_macro 0x0000000000025a49 0x1d0 Core/Src/system_stm32l4xx.o - .debug_macro 0x0000000000025c19 0x218 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_macro 0x0000000000025e31 0x1ca Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_macro 0x0000000000025ffb 0x29b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_macro 0x0000000000026296 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_macro 0x0000000000024194 0x240 Core/Src/main.o + .debug_macro 0x00000000000243d4 0x708 Core/Src/main.o + .debug_macro 0x0000000000024adc 0x1bf Core/Src/main.o + .debug_macro 0x0000000000024c9b 0x2f5 Core/Src/main.o + .debug_macro 0x0000000000024f90 0x164 Core/Src/main.o + .debug_macro 0x00000000000250f4 0x1a7 Core/Src/main.o + .debug_macro 0x000000000002529b 0xa7 Core/Src/main.o + .debug_macro 0x0000000000025342 0x208 Core/Src/main.o + .debug_macro 0x000000000002554a 0x2cb Core/Src/main.o + .debug_macro 0x0000000000025815 0x4e5 Core/Src/main.o + .debug_macro 0x0000000000025cfa 0x246 Core/Src/stm32l4xx_it.o + .debug_macro 0x0000000000025f40 0x1d0 Core/Src/system_stm32l4xx.o + .debug_macro 0x0000000000026110 0x218 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_macro 0x0000000000026328 0x1ca Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_macro 0x00000000000264f2 0x29b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_macro 0x000000000002678d 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_line 0x0000000000000000 0x4155 +.debug_line 0x0000000000000000 0x4387 .debug_line 0x0000000000000000 0x7e6 Core/Src/gpio.o - .debug_line 0x00000000000007e6 0xb3b Core/Src/main.o - .debug_line 0x0000000000001321 0x855 Core/Src/stm32l4xx_it.o - .debug_line 0x0000000000001b76 0x6eb Core/Src/system_stm32l4xx.o - .debug_line 0x0000000000002261 0x87 Core/Startup/startup_stm32l476rgtx.o - .debug_line 0x00000000000022e8 0x961 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_line 0x0000000000002c49 0x9e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_line 0x0000000000003632 0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_line 0x00000000000007e6 0xd57 Core/Src/main.o + .debug_line 0x000000000000153d 0x86b Core/Src/stm32l4xx_it.o + .debug_line 0x0000000000001da8 0x6eb Core/Src/system_stm32l4xx.o + .debug_line 0x0000000000002493 0x87 Core/Startup/startup_stm32l476rgtx.o + .debug_line 0x000000000000251a 0x961 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_line 0x0000000000002e7b 0x9e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_line 0x0000000000003864 0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_str 0x0000000000000000 0xee8e8 - .debug_str 0x0000000000000000 0xe3d91 Core/Src/gpio.o +.debug_str 0x0000000000000000 0xf056b + .debug_str 0x0000000000000000 0xe3a96 Core/Src/gpio.o 0xe4dab (size before relaxing) - .debug_str 0x00000000000e3d91 0x8e99 Core/Src/main.o - 0xedae3 (size before relaxing) - .debug_str 0x00000000000ecc2a 0xad Core/Src/stm32l4xx_it.o - 0xed404 (size before relaxing) - .debug_str 0x00000000000eccd7 0x79 Core/Src/system_stm32l4xx.o + .debug_str 0x00000000000e3a96 0xb291 Core/Src/main.o + 0xeffa6 (size before relaxing) + .debug_str 0x00000000000eed27 0xad Core/Src/stm32l4xx_it.o + 0xef140 (size before relaxing) + .debug_str 0x00000000000eedd4 0x79 Core/Src/system_stm32l4xx.o 0xe3959 (size before relaxing) - .debug_str 0x00000000000ecd50 0x36 Core/Startup/startup_stm32l476rgtx.o + .debug_str 0x00000000000eee4d 0x36 Core/Startup/startup_stm32l476rgtx.o 0x62 (size before relaxing) - .debug_str 0x00000000000ecd86 0x9fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_str 0x00000000000eee83 0x5bb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o 0xe443d (size before relaxing) - .debug_str 0x00000000000ed780 0x3a6 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_str 0x00000000000ef43e 0x36b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o 0xe41ad (size before relaxing) - .debug_str 0x00000000000edb26 0xdc2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_str 0x00000000000ef7a9 0xdc2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o 0xea58d (size before relaxing) .comment 0x0000000000000000 0x7b @@ -4007,12 +4237,12 @@ OUTPUT(RealOne.elf elf32-littlearm) .comment 0x000000000000007b 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o .comment 0x000000000000007b 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_frame 0x0000000000000000 0x15dc +.debug_frame 0x0000000000000000 0x18fc .debug_frame 0x0000000000000000 0x1a0 Core/Src/gpio.o - .debug_frame 0x00000000000001a0 0x49c Core/Src/main.o - .debug_frame 0x000000000000063c 0xf0 Core/Src/stm32l4xx_it.o - .debug_frame 0x000000000000072c 0x58 Core/Src/system_stm32l4xx.o - .debug_frame 0x0000000000000784 0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o - .debug_frame 0x0000000000000c1c 0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o - .debug_frame 0x00000000000010b4 0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_frame 0x00000000000015b0 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) + .debug_frame 0x00000000000001a0 0x7bc Core/Src/main.o + .debug_frame 0x000000000000095c 0xf0 Core/Src/stm32l4xx_it.o + .debug_frame 0x0000000000000a4c 0x58 Core/Src/system_stm32l4xx.o + .debug_frame 0x0000000000000aa4 0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o + .debug_frame 0x0000000000000f3c 0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o + .debug_frame 0x00000000000013d4 0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_frame 0x00000000000018d0 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) diff --git a/RealOne/Debug/objects.list b/RealOne/Debug/objects.list index 116a9f5..f46fbd5 100644 --- a/RealOne/Debug/objects.list +++ b/RealOne/Debug/objects.list @@ -26,4 +26,5 @@ "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o" "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o" "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o" +"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.o" "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o" diff --git a/RealOne/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h b/RealOne/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h new file mode 100644 index 0000000..076c0a0 --- /dev/null +++ b/RealOne/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rtc.h @@ -0,0 +1,3918 @@ +/** + ****************************************************************************** + * @file stm32l4xx_ll_rtc.h + * @author MCD Application Team + * @brief Header file of RTC LL module. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + /* Define to prevent recursive inclusion -------------------------------------*/ + #ifndef __STM32L4xx_LL_RTC_H + #define __STM32L4xx_LL_RTC_H + + #ifdef __cplusplus + extern "C" { + #endif + + /* Includes ------------------------------------------------------------------*/ + #include "stm32l4xx.h" + + /** @addtogroup STM32L4xx_LL_Driver + * @{ + */ + + #if defined(RTC) + + /** @defgroup RTC_LL RTC + * @{ + */ + + /* Private types -------------------------------------------------------------*/ + /* Private variables ---------------------------------------------------------*/ + /* Private constants ---------------------------------------------------------*/ + /** @defgroup RTC_LL_Private_Constants RTC Private Constants + * @{ + */ + /* Masks Definition */ + #define RTC_INIT_MASK 0xFFFFFFFFU + #define RTC_RSF_MASK 0xFFFFFF5FU + + /* Write protection defines */ + #define RTC_WRITE_PROTECTION_DISABLE ((uint8_t)0xFFU) + #define RTC_WRITE_PROTECTION_ENABLE_1 ((uint8_t)0xCAU) + #define RTC_WRITE_PROTECTION_ENABLE_2 ((uint8_t)0x53U) + + /* Defines used to combine date & time */ + #define RTC_OFFSET_WEEKDAY 24U + #define RTC_OFFSET_DAY 16U + #define RTC_OFFSET_MONTH 8U + #define RTC_OFFSET_HOUR 16U + #define RTC_OFFSET_MINUTE 8U + + /** + * @} + */ + + /* Private macros ------------------------------------------------------------*/ + #if defined(USE_FULL_LL_DRIVER) + /** @defgroup RTC_LL_Private_Macros RTC Private Macros + * @{ + */ + /** + * @} + */ + #endif /*USE_FULL_LL_DRIVER*/ + + /* Exported types ------------------------------------------------------------*/ + #if defined(USE_FULL_LL_DRIVER) + /** @defgroup RTC_LL_ES_INIT RTC Exported Init structure + * @{ + */ + + /** + * @brief RTC Init structures definition + */ + typedef struct + { + uint32_t HourFormat; /*!< Specifies the RTC Hours Format. + This parameter can be a value of @ref RTC_LL_EC_HOURFORMAT + + This feature can be modified afterwards using unitary function + @ref LL_RTC_SetHourFormat(). */ + + uint32_t AsynchPrescaler; /*!< Specifies the RTC Asynchronous Predivider value. + This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F + + This feature can be modified afterwards using unitary function + @ref LL_RTC_SetAsynchPrescaler(). */ + + uint32_t SynchPrescaler; /*!< Specifies the RTC Synchronous Predivider value. + This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF + + This feature can be modified afterwards using unitary function + @ref LL_RTC_SetSynchPrescaler(). */ + } LL_RTC_InitTypeDef; + + /** + * @brief RTC Time structure definition + */ + typedef struct + { + uint32_t TimeFormat; /*!< Specifies the RTC AM/PM Time. + This parameter can be a value of @ref RTC_LL_EC_TIME_FORMAT + + This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetFormat(). */ + + uint8_t Hours; /*!< Specifies the RTC Time Hours. + This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the @ref LL_RTC_TIME_FORMAT_PM is selected. + This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the @ref LL_RTC_TIME_FORMAT_AM_OR_24 is selected. + + This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetHour(). */ + + uint8_t Minutes; /*!< Specifies the RTC Time Minutes. + This parameter must be a number between Min_Data = 0 and Max_Data = 59 + + This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetMinute(). */ + + uint8_t Seconds; /*!< Specifies the RTC Time Seconds. + This parameter must be a number between Min_Data = 0 and Max_Data = 59 + + This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetSecond(). */ + } LL_RTC_TimeTypeDef; + + /** + * @brief RTC Date structure definition + */ + typedef struct + { + uint8_t WeekDay; /*!< Specifies the RTC Date WeekDay. + This parameter can be a value of @ref RTC_LL_EC_WEEKDAY + + This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetWeekDay(). */ + + uint8_t Month; /*!< Specifies the RTC Date Month. + This parameter can be a value of @ref RTC_LL_EC_MONTH + + This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetMonth(). */ + + uint8_t Day; /*!< Specifies the RTC Date Day. + This parameter must be a number between Min_Data = 1 and Max_Data = 31 + + This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetDay(). */ + + uint8_t Year; /*!< Specifies the RTC Date Year. + This parameter must be a number between Min_Data = 0 and Max_Data = 99 + + This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetYear(). */ + } LL_RTC_DateTypeDef; + + /** + * @brief RTC Alarm structure definition + */ + typedef struct + { + LL_RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members. */ + + uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks. + This parameter can be a value of @ref RTC_LL_EC_ALMA_MASK for ALARM A or @ref RTC_LL_EC_ALMB_MASK for ALARM B. + + This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetMask() for ALARM A + or @ref LL_RTC_ALMB_SetMask() for ALARM B + */ + + uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on day or WeekDay. + This parameter can be a value of @ref RTC_LL_EC_ALMA_WEEKDAY_SELECTION for ALARM A or @ref RTC_LL_EC_ALMB_WEEKDAY_SELECTION for ALARM B + + This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_EnableWeekday() or @ref LL_RTC_ALMA_DisableWeekday() + for ALARM A or @ref LL_RTC_ALMB_EnableWeekday() or @ref LL_RTC_ALMB_DisableWeekday() for ALARM B + */ + + uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Day/WeekDay. + If AlarmDateWeekDaySel set to day, this parameter must be a number between Min_Data = 1 and Max_Data = 31. + + This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetDay() + for ALARM A or @ref LL_RTC_ALMB_SetDay() for ALARM B. + + If AlarmDateWeekDaySel set to Weekday, this parameter can be a value of @ref RTC_LL_EC_WEEKDAY. + + This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetWeekDay() + for ALARM A or @ref LL_RTC_ALMB_SetWeekDay() for ALARM B. + */ + } LL_RTC_AlarmTypeDef; + + /** + * @} + */ + #endif /* USE_FULL_LL_DRIVER */ + + /* Exported constants --------------------------------------------------------*/ + /** @defgroup RTC_LL_Exported_Constants RTC Exported Constants + * @{ + */ + + #if defined(USE_FULL_LL_DRIVER) + /** @defgroup RTC_LL_EC_FORMAT FORMAT + * @{ + */ + #define LL_RTC_FORMAT_BIN 0x00000000U /*!< Binary data format */ + #define LL_RTC_FORMAT_BCD 0x00000001U /*!< BCD data format */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMA_WEEKDAY_SELECTION RTC Alarm A Date WeekDay + * @{ + */ + #define LL_RTC_ALMA_DATEWEEKDAYSEL_DATE 0x00000000U /*!< Alarm A Date is selected */ + #define LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMAR_WDSEL /*!< Alarm A WeekDay is selected */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMB_WEEKDAY_SELECTION RTC Alarm B Date WeekDay + * @{ + */ + #define LL_RTC_ALMB_DATEWEEKDAYSEL_DATE 0x00000000U /*!< Alarm B Date is selected */ + #define LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMBR_WDSEL /*!< Alarm B WeekDay is selected */ + /** + * @} + */ + + #endif /* USE_FULL_LL_DRIVER */ + + /** @defgroup RTC_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_RTC_ReadReg function + * @{ + */ + #define LL_RTC_ISR_ITSF RTC_ISR_ITSF + #define LL_RTC_ISR_RECALPF RTC_ISR_RECALPF + #define LL_RTC_ISR_TAMP3F RTC_ISR_TAMP3F + #define LL_RTC_ISR_TAMP2F RTC_ISR_TAMP2F + #define LL_RTC_ISR_TAMP1F RTC_ISR_TAMP1F + #define LL_RTC_ISR_TSOVF RTC_ISR_TSOVF + #define LL_RTC_ISR_TSF RTC_ISR_TSF + #define LL_RTC_ISR_WUTF RTC_ISR_WUTF + #define LL_RTC_ISR_ALRBF RTC_ISR_ALRBF + #define LL_RTC_ISR_ALRAF RTC_ISR_ALRAF + #define LL_RTC_ISR_INITF RTC_ISR_INITF + #define LL_RTC_ISR_RSF RTC_ISR_RSF + #define LL_RTC_ISR_INITS RTC_ISR_INITS + #define LL_RTC_ISR_SHPF RTC_ISR_SHPF + #define LL_RTC_ISR_WUTWF RTC_ISR_WUTWF + #define LL_RTC_ISR_ALRBWF RTC_ISR_ALRBWF + #define LL_RTC_ISR_ALRAWF RTC_ISR_ALRAWF + /** + * @} + */ + + /** @defgroup RTC_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_RTC_ReadReg and LL_RTC_WriteReg functions + * @{ + */ + #define LL_RTC_CR_TSIE RTC_CR_TSIE + #define LL_RTC_CR_WUTIE RTC_CR_WUTIE + #define LL_RTC_CR_ALRBIE RTC_CR_ALRBIE + #define LL_RTC_CR_ALRAIE RTC_CR_ALRAIE + #define LL_RTC_TAMPCR_TAMP3IE RTC_TAMPCR_TAMP3IE + #define LL_RTC_TAMPCR_TAMP2IE RTC_TAMPCR_TAMP2IE + #define LL_RTC_TAMPCR_TAMP1IE RTC_TAMPCR_TAMP1IE + #define LL_RTC_TAMPCR_TAMPIE RTC_TAMPCR_TAMPIE + /** + * @} + */ + + /** @defgroup RTC_LL_EC_WEEKDAY WEEK DAY + * @{ + */ + #define LL_RTC_WEEKDAY_MONDAY ((uint8_t)0x01U) /*!< Monday */ + #define LL_RTC_WEEKDAY_TUESDAY ((uint8_t)0x02U) /*!< Tuesday */ + #define LL_RTC_WEEKDAY_WEDNESDAY ((uint8_t)0x03U) /*!< Wednesday */ + #define LL_RTC_WEEKDAY_THURSDAY ((uint8_t)0x04U) /*!< Thrusday */ + #define LL_RTC_WEEKDAY_FRIDAY ((uint8_t)0x05U) /*!< Friday */ + #define LL_RTC_WEEKDAY_SATURDAY ((uint8_t)0x06U) /*!< Saturday */ + #define LL_RTC_WEEKDAY_SUNDAY ((uint8_t)0x07U) /*!< Sunday */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_MONTH MONTH + * @{ + */ + #define LL_RTC_MONTH_JANUARY ((uint8_t)0x01U) /*!< January */ + #define LL_RTC_MONTH_FEBRUARY ((uint8_t)0x02U) /*!< February */ + #define LL_RTC_MONTH_MARCH ((uint8_t)0x03U) /*!< March */ + #define LL_RTC_MONTH_APRIL ((uint8_t)0x04U) /*!< April */ + #define LL_RTC_MONTH_MAY ((uint8_t)0x05U) /*!< May */ + #define LL_RTC_MONTH_JUNE ((uint8_t)0x06U) /*!< June */ + #define LL_RTC_MONTH_JULY ((uint8_t)0x07U) /*!< July */ + #define LL_RTC_MONTH_AUGUST ((uint8_t)0x08U) /*!< August */ + #define LL_RTC_MONTH_SEPTEMBER ((uint8_t)0x09U) /*!< September */ + #define LL_RTC_MONTH_OCTOBER ((uint8_t)0x10U) /*!< October */ + #define LL_RTC_MONTH_NOVEMBER ((uint8_t)0x11U) /*!< November */ + #define LL_RTC_MONTH_DECEMBER ((uint8_t)0x12U) /*!< December */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_HOURFORMAT HOUR FORMAT + * @{ + */ + #define LL_RTC_HOURFORMAT_24HOUR 0x00000000U /*!< 24 hour/day format */ + #define LL_RTC_HOURFORMAT_AMPM RTC_CR_FMT /*!< AM/PM hour format */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALARMOUT ALARM OUTPUT + * @{ + */ + #define LL_RTC_ALARMOUT_DISABLE 0x00000000U /*!< Output disabled */ + #define LL_RTC_ALARMOUT_ALMA RTC_CR_OSEL_0 /*!< Alarm A output enabled */ + #define LL_RTC_ALARMOUT_ALMB RTC_CR_OSEL_1 /*!< Alarm B output enabled */ + #define LL_RTC_ALARMOUT_WAKEUP RTC_CR_OSEL /*!< Wakeup output enabled */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALARM_OUTPUTTYPE ALARM OUTPUT TYPE + * @{ + */ + #define LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN 0x00000000U /*!< RTC_ALARM, when mapped on PC13, is open-drain output */ + #define LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL RTC_OR_ALARMOUTTYPE /*!< RTC_ALARM, when mapped on PC13, is push-pull output */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_OUTPUTPOLARITY_PIN OUTPUT POLARITY PIN + * @{ + */ + #define LL_RTC_OUTPUTPOLARITY_PIN_HIGH 0x00000000U /*!< Pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL)*/ + #define LL_RTC_OUTPUTPOLARITY_PIN_LOW RTC_CR_POL /*!< Pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL) */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TIME_FORMAT TIME FORMAT + * @{ + */ + #define LL_RTC_TIME_FORMAT_AM_OR_24 0x00000000U /*!< AM or 24-hour format */ + #define LL_RTC_TIME_FORMAT_PM RTC_TR_PM /*!< PM */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_SHIFT_SECOND SHIFT SECOND + * @{ + */ + #define LL_RTC_SHIFT_SECOND_DELAY 0x00000000U /* Delay (seconds) = SUBFS / (PREDIV_S + 1) */ + #define LL_RTC_SHIFT_SECOND_ADVANCE RTC_SHIFTR_ADD1S /* Advance (seconds) = (1 - (SUBFS / (PREDIV_S + 1))) */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMA_MASK ALARMA MASK + * @{ + */ + #define LL_RTC_ALMA_MASK_NONE 0x00000000U /*!< No masks applied on Alarm A*/ + #define LL_RTC_ALMA_MASK_DATEWEEKDAY RTC_ALRMAR_MSK4 /*!< Date/day do not care in Alarm A comparison */ + #define LL_RTC_ALMA_MASK_HOURS RTC_ALRMAR_MSK3 /*!< Hours do not care in Alarm A comparison */ + #define LL_RTC_ALMA_MASK_MINUTES RTC_ALRMAR_MSK2 /*!< Minutes do not care in Alarm A comparison */ + #define LL_RTC_ALMA_MASK_SECONDS RTC_ALRMAR_MSK1 /*!< Seconds do not care in Alarm A comparison */ + #define LL_RTC_ALMA_MASK_ALL (RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1) /*!< Masks all */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMA_TIME_FORMAT ALARMA TIME FORMAT + * @{ + */ + #define LL_RTC_ALMA_TIME_FORMAT_AM 0x00000000U /*!< AM or 24-hour format */ + #define LL_RTC_ALMA_TIME_FORMAT_PM RTC_ALRMAR_PM /*!< PM */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMB_MASK ALARMB MASK + * @{ + */ + #define LL_RTC_ALMB_MASK_NONE 0x00000000U /*!< No masks applied on Alarm B*/ + #define LL_RTC_ALMB_MASK_DATEWEEKDAY RTC_ALRMBR_MSK4 /*!< Date/day do not care in Alarm B comparison */ + #define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3 /*!< Hours do not care in Alarm B comparison */ + #define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2 /*!< Minutes do not care in Alarm B comparison */ + #define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1 /*!< Seconds do not care in Alarm B comparison */ + #define LL_RTC_ALMB_MASK_ALL (RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1) /*!< Masks all */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_ALMB_TIME_FORMAT ALARMB TIME FORMAT + * @{ + */ + #define LL_RTC_ALMB_TIME_FORMAT_AM 0x00000000U /*!< AM or 24-hour format */ + #define LL_RTC_ALMB_TIME_FORMAT_PM RTC_ALRMBR_PM /*!< PM */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TIMESTAMP_EDGE TIMESTAMP EDGE + * @{ + */ + #define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ + #define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TS_TIME_FORMAT TIMESTAMP TIME FORMAT + * @{ + */ + #define LL_RTC_TS_TIME_FORMAT_AM 0x00000000U /*!< AM or 24-hour format */ + #define LL_RTC_TS_TIME_FORMAT_PM RTC_TSTR_PM /*!< PM */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TAMPER TAMPER + * @{ + */ + #if defined(RTC_TAMPER1_SUPPORT) + #define LL_RTC_TAMPER_1 RTC_TAMPCR_TAMP1E /*!< RTC_TAMP1 input detection */ + #endif /* RTC_TAMPER1_SUPPORT */ + #if defined(RTC_TAMPER2_SUPPORT) + #define LL_RTC_TAMPER_2 RTC_TAMPCR_TAMP2E /*!< RTC_TAMP2 input detection */ + #endif /* RTC_TAMPER2_SUPPORT */ + #if defined(RTC_TAMPER3_SUPPORT) + #define LL_RTC_TAMPER_3 RTC_TAMPCR_TAMP3E /*!< RTC_TAMP3 input detection */ + #endif /* RTC_TAMPER3_SUPPORT */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TAMPER_MASK TAMPER MASK + * @{ + */ + #if defined(RTC_TAMPER1_SUPPORT) + #define LL_RTC_TAMPER_MASK_TAMPER1 RTC_TAMPCR_TAMP1MF /*!< Tamper 1 event generates a trigger event. TAMP1F is masked and internally cleared by hardware.The backup registers are not erased */ + #endif /* RTC_TAMPER1_SUPPORT */ + #if defined(RTC_TAMPER2_SUPPORT) + #define LL_RTC_TAMPER_MASK_TAMPER2 RTC_TAMPCR_TAMP2MF /*!< Tamper 2 event generates a trigger event. TAMP2F is masked and internally cleared by hardware. The backup registers are not erased. */ + #endif /* RTC_TAMPER2_SUPPORT */ + #if defined(RTC_TAMPER3_SUPPORT) + #define LL_RTC_TAMPER_MASK_TAMPER3 RTC_TAMPCR_TAMP3MF /*!< Tamper 3 event generates a trigger event. TAMP3F is masked and internally cleared by hardware. The backup registers are not erased */ + #endif /* RTC_TAMPER3_SUPPORT */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_TAMPER_NOERASE TAMPER NO ERASE + * @{ + */ + #if defined(RTC_TAMPER1_SUPPORT) + #define LL_RTC_TAMPER_NOERASE_TAMPER1 RTC_TAMPCR_TAMP1NOERASE /*!< Tamper 1 event does not erase the backup registers. */ + #endif /* RTC_TAMPER1_SUPPORT */ + #if defined(RTC_TAMPER2_SUPPORT) + #define LL_RTC_TAMPER_NOERASE_TAMPER2 RTC_TAMPCR_TAMP2NOERASE /*!< Tamper 2 event does not erase the backup registers. */ + #endif /* RTC_TAMPER2_SUPPORT */ + #if defined(RTC_TAMPER3_SUPPORT) + #define LL_RTC_TAMPER_NOERASE_TAMPER3 RTC_TAMPCR_TAMP3NOERASE /*!< Tamper 3 event does not erase the backup registers. */ + #endif /* RTC_TAMPER3_SUPPORT */ + /** + * @} + */ + + #if defined(RTC_TAMPCR_TAMPPRCH) + /** @defgroup RTC_LL_EC_TAMPER_DURATION TAMPER DURATION + * @{ + */ + #define LL_RTC_TAMPER_DURATION_1RTCCLK 0x00000000U /*!< Tamper pins are pre-charged before sampling during 1 RTCCLK cycle */ + #define LL_RTC_TAMPER_DURATION_2RTCCLK RTC_TAMPCR_TAMPPRCH_0 /*!< Tamper pins are pre-charged before sampling during 2 RTCCLK cycles */ + #define LL_RTC_TAMPER_DURATION_4RTCCLK RTC_TAMPCR_TAMPPRCH_1 /*!< Tamper pins are pre-charged before sampling during 4 RTCCLK cycles */ + #define LL_RTC_TAMPER_DURATION_8RTCCLK RTC_TAMPCR_TAMPPRCH /*!< Tamper pins are pre-charged before sampling during 8 RTCCLK cycles */ + /** + * @} + */ + #endif /* RTC_TAMPCR_TAMPPRCH */ + + #if defined(RTC_TAMPCR_TAMPFLT) + /** @defgroup RTC_LL_EC_TAMPER_FILTER TAMPER FILTER + * @{ + */ + #define LL_RTC_TAMPER_FILTER_DISABLE 0x00000000U /*!< Tamper filter is disabled */ + #define LL_RTC_TAMPER_FILTER_2SAMPLE RTC_TAMPCR_TAMPFLT_0 /*!< Tamper is activated after 2 consecutive samples at the active level */ + #define LL_RTC_TAMPER_FILTER_4SAMPLE RTC_TAMPCR_TAMPFLT_1 /*!< Tamper is activated after 4 consecutive samples at the active level */ + #define LL_RTC_TAMPER_FILTER_8SAMPLE RTC_TAMPCR_TAMPFLT /*!< Tamper is activated after 8 consecutive samples at the active level. */ + /** + * @} + */ + #endif /* RTC_TAMPCR_TAMPFLT */ + + #if defined(RTC_TAMPCR_TAMPFREQ) + /** @defgroup RTC_LL_EC_TAMPER_SAMPLFREQDIV TAMPER SAMPLING FREQUENCY DIVIDER + * @{ + */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_32768 0x00000000U /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 32768 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_16384 RTC_TAMPCR_TAMPFREQ_0 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 16384 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_8192 RTC_TAMPCR_TAMPFREQ_1 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 8192 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_4096 (RTC_TAMPCR_TAMPFREQ_1 | RTC_TAMPCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 4096 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_2048 RTC_TAMPCR_TAMPFREQ_2 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 2048 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_1024 (RTC_TAMPCR_TAMPFREQ_2 | RTC_TAMPCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 1024 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_512 (RTC_TAMPCR_TAMPFREQ_2 | RTC_TAMPCR_TAMPFREQ_1) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 512 */ + #define LL_RTC_TAMPER_SAMPLFREQDIV_256 RTC_TAMPCR_TAMPFREQ /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 256 */ + /** + * @} + */ + #endif /* RTC_TAMPCR_TAMPFREQ */ + + /** @defgroup RTC_LL_EC_TAMPER_ACTIVELEVEL TAMPER ACTIVE LEVEL + * @{ + */ + #if defined(RTC_TAMPER1_SUPPORT) + #define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAMPCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/ + #endif /* RTC_TAMPER1_SUPPORT */ + #if defined(RTC_TAMPER2_SUPPORT) + #define LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 RTC_TAMPCR_TAMP2TRG /*!< RTC_TAMP2 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/ + #endif /* RTC_TAMPER2_SUPPORT */ + #if defined(RTC_TAMPER3_SUPPORT) + #define LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 RTC_TAMPCR_TAMP3TRG /*!< RTC_TAMP3 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/ + #endif /* RTC_TAMPER3_SUPPORT */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_WAKEUPCLOCK_DIV WAKEUP CLOCK DIV + * @{ + */ + #define LL_RTC_WAKEUPCLOCK_DIV_16 0x00000000U /*!< RTC/16 clock is selected */ + #define LL_RTC_WAKEUPCLOCK_DIV_8 (RTC_CR_WUCKSEL_0) /*!< RTC/8 clock is selected */ + #define LL_RTC_WAKEUPCLOCK_DIV_4 (RTC_CR_WUCKSEL_1) /*!< RTC/4 clock is selected */ + #define LL_RTC_WAKEUPCLOCK_DIV_2 (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_0) /*!< RTC/2 clock is selected */ + #define LL_RTC_WAKEUPCLOCK_CKSPRE (RTC_CR_WUCKSEL_2) /*!< ck_spre (usually 1 Hz) clock is selected */ + #define LL_RTC_WAKEUPCLOCK_CKSPRE_WUT (RTC_CR_WUCKSEL_2 | RTC_CR_WUCKSEL_1) /*!< ck_spre (usually 1 Hz) clock is selected and 2exp16 is added to the WUT counter value*/ + /** + * @} + */ + + #if defined(RTC_BACKUP_SUPPORT) + /** @defgroup RTC_LL_EC_BKP BACKUP + * @{ + */ + #define LL_RTC_BKP_DR0 0x00000000U + #define LL_RTC_BKP_DR1 0x00000001U + #define LL_RTC_BKP_DR2 0x00000002U + #define LL_RTC_BKP_DR3 0x00000003U + #define LL_RTC_BKP_DR4 0x00000004U + #if RTC_BKP_NUMBER > 5 + #define LL_RTC_BKP_DR5 0x00000005U + #define LL_RTC_BKP_DR6 0x00000006U + #define LL_RTC_BKP_DR7 0x00000007U + #define LL_RTC_BKP_DR8 0x00000008U + #define LL_RTC_BKP_DR9 0x00000009U + #define LL_RTC_BKP_DR10 0x0000000AU + #define LL_RTC_BKP_DR11 0x0000000BU + #define LL_RTC_BKP_DR12 0x0000000CU + #define LL_RTC_BKP_DR13 0x0000000DU + #define LL_RTC_BKP_DR14 0x0000000EU + #define LL_RTC_BKP_DR15 0x0000000FU + #endif /* RTC_BKP_NUMBER > 5 */ + + #if RTC_BKP_NUMBER > 16 + #define LL_RTC_BKP_DR16 0x00000010U + #define LL_RTC_BKP_DR17 0x00000011U + #define LL_RTC_BKP_DR18 0x00000012U + #define LL_RTC_BKP_DR19 0x00000013U + #endif /* RTC_BKP_NUMBER > 16 */ + + #if RTC_BKP_NUMBER > 20 + #define LL_RTC_BKP_DR20 0x00000014U + #define LL_RTC_BKP_DR21 0x00000015U + #define LL_RTC_BKP_DR22 0x00000016U + #define LL_RTC_BKP_DR23 0x00000017U + #define LL_RTC_BKP_DR24 0x00000018U + #define LL_RTC_BKP_DR25 0x00000019U + #define LL_RTC_BKP_DR26 0x0000001AU + #define LL_RTC_BKP_DR27 0x0000001BU + #define LL_RTC_BKP_DR28 0x0000001CU + #define LL_RTC_BKP_DR29 0x0000001DU + #define LL_RTC_BKP_DR30 0x0000001EU + #define LL_RTC_BKP_DR31 0x0000001FU + #endif /* RTC_BKP_NUMBER > 20 */ + /** + * @} + */ + #endif /* RTC_BACKUP_SUPPORT */ + + /** @defgroup RTC_LL_EC_CALIB_OUTPUT Calibration output + * @{ + */ + #define LL_RTC_CALIB_OUTPUT_NONE 0x00000000U /*!< Calibration output disabled */ + #define LL_RTC_CALIB_OUTPUT_1HZ (RTC_CR_COE | RTC_CR_COSEL) /*!< Calibration output is 1 Hz */ + #define LL_RTC_CALIB_OUTPUT_512HZ (RTC_CR_COE) /*!< Calibration output is 512 Hz */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_CALIB_INSERTPULSE Calibration pulse insertion + * @{ + */ + #define LL_RTC_CALIB_INSERTPULSE_NONE 0x00000000U /*!< No RTCCLK pulses are added */ + #define LL_RTC_CALIB_INSERTPULSE_SET RTC_CALR_CALP /*!< One RTCCLK pulse is effectively inserted every 2exp11 pulses (frequency increased by 488.5 ppm) */ + /** + * @} + */ + + /** @defgroup RTC_LL_EC_CALIB_PERIOD Calibration period + * @{ + */ + #define LL_RTC_CALIB_PERIOD_32SEC 0x00000000U /*!< Use a 32-second calibration cycle period */ + #define LL_RTC_CALIB_PERIOD_16SEC RTC_CALR_CALW16 /*!< Use a 16-second calibration cycle period */ + #define LL_RTC_CALIB_PERIOD_8SEC RTC_CALR_CALW8 /*!< Use a 8-second calibration cycle period */ + /** + * @} + */ + + /** + * @} + */ + + /* Exported macro ------------------------------------------------------------*/ + /** @defgroup RTC_LL_Exported_Macros RTC Exported Macros + * @{ + */ + + /** @defgroup RTC_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + + /** + * @brief Write a value in RTC register + * @param __INSTANCE__ RTC Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ + #define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + + /** + * @brief Read a value in RTC register + * @param __INSTANCE__ RTC Instance + * @param __REG__ Register to be read + * @retval Register value + */ + #define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) + /** + * @} + */ + + /** @defgroup RTC_LL_EM_Convert Convert helper Macros + * @{ + */ + + /** + * @brief Helper macro to convert a value from 2 digit decimal format to BCD format + * @param __VALUE__ Byte to be converted + * @retval Converted byte + */ + #define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U)) + + /** + * @brief Helper macro to convert a value from BCD format to 2 digit decimal format + * @param __VALUE__ BCD value to be converted + * @retval Converted byte + */ + #define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU)) + + /** + * @} + */ + + /** @defgroup RTC_LL_EM_Date Date helper Macros + * @{ + */ + + /** + * @brief Helper macro to retrieve weekday. + * @param __RTC_DATE__ Date returned by @ref LL_RTC_DATE_Get function. + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + */ + #define __LL_RTC_GET_WEEKDAY(__RTC_DATE__) (((__RTC_DATE__) >> RTC_OFFSET_WEEKDAY) & 0x000000FFU) + + /** + * @brief Helper macro to retrieve Year in BCD format + * @param __RTC_DATE__ Value returned by @ref LL_RTC_DATE_Get + * @retval Year in BCD format (0x00 . . . 0x99) + */ + #define __LL_RTC_GET_YEAR(__RTC_DATE__) ((__RTC_DATE__) & 0x000000FFU) + + /** + * @brief Helper macro to retrieve Month in BCD format + * @param __RTC_DATE__ Value returned by @ref LL_RTC_DATE_Get + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_MONTH_JANUARY + * @arg @ref LL_RTC_MONTH_FEBRUARY + * @arg @ref LL_RTC_MONTH_MARCH + * @arg @ref LL_RTC_MONTH_APRIL + * @arg @ref LL_RTC_MONTH_MAY + * @arg @ref LL_RTC_MONTH_JUNE + * @arg @ref LL_RTC_MONTH_JULY + * @arg @ref LL_RTC_MONTH_AUGUST + * @arg @ref LL_RTC_MONTH_SEPTEMBER + * @arg @ref LL_RTC_MONTH_OCTOBER + * @arg @ref LL_RTC_MONTH_NOVEMBER + * @arg @ref LL_RTC_MONTH_DECEMBER + */ + #define __LL_RTC_GET_MONTH(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_MONTH) & 0x000000FFU) + + /** + * @brief Helper macro to retrieve Day in BCD format + * @param __RTC_DATE__ Value returned by @ref LL_RTC_DATE_Get + * @retval Day in BCD format (0x01 . . . 0x31) + */ + #define __LL_RTC_GET_DAY(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_DAY) & 0x000000FFU) + + /** + * @} + */ + + /** @defgroup RTC_LL_EM_Time Time helper Macros + * @{ + */ + + /** + * @brief Helper macro to retrieve hour in BCD format + * @param __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function + * @retval Hours in BCD format (0x01. . .0x12 or between Min_Data=0x00 and Max_Data=0x23) + */ + #define __LL_RTC_GET_HOUR(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_HOUR) & 0x000000FFU) + + /** + * @brief Helper macro to retrieve minute in BCD format + * @param __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function + * @retval Minutes in BCD format (0x00. . .0x59) + */ + #define __LL_RTC_GET_MINUTE(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_MINUTE) & 0x000000FFU) + + /** + * @brief Helper macro to retrieve second in BCD format + * @param __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function + * @retval Seconds in format (0x00. . .0x59) + */ + #define __LL_RTC_GET_SECOND(__RTC_TIME__) ((__RTC_TIME__) & 0x000000FFU) + + /** + * @} + */ + + /** + * @} + */ + + /* Exported functions --------------------------------------------------------*/ + /** @defgroup RTC_LL_Exported_Functions RTC Exported Functions + * @{ + */ + + /** @defgroup RTC_LL_EF_Configuration Configuration + * @{ + */ + + /** + * @brief Set Hours format (24 hour/day or AM/PM hour format) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @rmtoll CR FMT LL_RTC_SetHourFormat + * @param RTCx RTC Instance + * @param HourFormat This parameter can be one of the following values: + * @arg @ref LL_RTC_HOURFORMAT_24HOUR + * @arg @ref LL_RTC_HOURFORMAT_AMPM + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetHourFormat(RTC_TypeDef *RTCx, uint32_t HourFormat) + { + MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat); + } + + /** + * @brief Get Hours format (24 hour/day or AM/PM hour format) + * @rmtoll CR FMT LL_RTC_GetHourFormat + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_HOURFORMAT_24HOUR + * @arg @ref LL_RTC_HOURFORMAT_AMPM + */ + __STATIC_INLINE uint32_t LL_RTC_GetHourFormat(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT)); + } + + /** + * @brief Select the flag to be routed to RTC_ALARM output + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR OSEL LL_RTC_SetAlarmOutEvent + * @param RTCx RTC Instance + * @param AlarmOutput This parameter can be one of the following values: + * @arg @ref LL_RTC_ALARMOUT_DISABLE + * @arg @ref LL_RTC_ALARMOUT_ALMA + * @arg @ref LL_RTC_ALARMOUT_ALMB + * @arg @ref LL_RTC_ALARMOUT_WAKEUP + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetAlarmOutEvent(RTC_TypeDef *RTCx, uint32_t AlarmOutput) + { + MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput); + } + + /** + * @brief Get the flag to be routed to RTC_ALARM output + * @rmtoll CR OSEL LL_RTC_GetAlarmOutEvent + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_ALARMOUT_DISABLE + * @arg @ref LL_RTC_ALARMOUT_ALMA + * @arg @ref LL_RTC_ALARMOUT_ALMB + * @arg @ref LL_RTC_ALARMOUT_WAKEUP + */ + __STATIC_INLINE uint32_t LL_RTC_GetAlarmOutEvent(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL)); + } + + /** + * @brief Set RTC_ALARM output type (ALARM in push-pull or open-drain output) + * @note Used only when RTC_ALARM is mapped on PC13 + * @rmtoll OR ALARMOUTTYPE LL_RTC_SetAlarmOutputType + * @param RTCx RTC Instance + * @param Output This parameter can be one of the following values: + * @arg @ref LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN + * @arg @ref LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetAlarmOutputType(RTC_TypeDef *RTCx, uint32_t Output) + { + MODIFY_REG(RTCx->OR, RTC_OR_ALARMOUTTYPE, Output); + } + + /** + * @brief Get RTC_ALARM output type (ALARM in push-pull or open-drain output) + * @note used only when RTC_ALARM is mapped on PC13 + * @rmtoll OR ALARMOUTTYPE LL_RTC_GetAlarmOutputType + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN + * @arg @ref LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL + */ + __STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->OR, RTC_OR_ALARMOUTTYPE)); + } + + /** + * @brief Enable initialization mode + * @note Initialization mode is used to program time and date register (RTC_TR and RTC_DR) + * and prescaler register (RTC_PRER). + * Counters are stopped and start counting from the new value when INIT is reset. + * @rmtoll ISR INIT LL_RTC_EnableInitMode + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableInitMode(RTC_TypeDef *RTCx) + { + /* Set the Initialization mode */ + WRITE_REG(RTCx->ISR, RTC_INIT_MASK); + } + + /** + * @brief Disable initialization mode (Free running mode) + * @rmtoll ISR INIT LL_RTC_DisableInitMode + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableInitMode(RTC_TypeDef *RTCx) + { + /* Exit Initialization mode */ + WRITE_REG(RTCx->ISR, (uint32_t)~RTC_ISR_INIT); + } + + /** + * @brief Set Output polarity (pin is low when ALRAF/ALRBF/WUTF is asserted) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR POL LL_RTC_SetOutputPolarity + * @param RTCx RTC Instance + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_HIGH + * @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_LOW + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetOutputPolarity(RTC_TypeDef *RTCx, uint32_t Polarity) + { + MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity); + } + + /** + * @brief Get Output polarity + * @rmtoll CR POL LL_RTC_GetOutputPolarity + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_HIGH + * @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_LOW + */ + __STATIC_INLINE uint32_t LL_RTC_GetOutputPolarity(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL)); + } + + /** + * @brief Enable Bypass the shadow registers + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR BYPSHAD LL_RTC_EnableShadowRegBypass + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableShadowRegBypass(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_BYPSHAD); + } + + /** + * @brief Disable Bypass the shadow registers + * @rmtoll CR BYPSHAD LL_RTC_DisableShadowRegBypass + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableShadowRegBypass(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD); + } + + /** + * @brief Check if Shadow registers bypass is enabled or not. + * @rmtoll CR BYPSHAD LL_RTC_IsShadowRegBypassEnabled + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD)); + } + + /** + * @brief Enable RTC_REFIN reference clock detection (50 or 60 Hz) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @rmtoll CR REFCKON LL_RTC_EnableRefClock + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableRefClock(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_REFCKON); + } + + /** + * @brief Disable RTC_REFIN reference clock detection (50 or 60 Hz) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @rmtoll CR REFCKON LL_RTC_DisableRefClock + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableRefClock(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_REFCKON); + } + + /** + * @brief Set Asynchronous prescaler factor + * @rmtoll PRER PREDIV_A LL_RTC_SetAsynchPrescaler + * @param RTCx RTC Instance + * @param AsynchPrescaler Value between Min_Data = 0 and Max_Data = 0x7F + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler) + { + MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_A, AsynchPrescaler << RTC_PRER_PREDIV_A_Pos); + } + + /** + * @brief Set Synchronous prescaler factor + * @rmtoll PRER PREDIV_S LL_RTC_SetSynchPrescaler + * @param RTCx RTC Instance + * @param SynchPrescaler Value between Min_Data = 0 and Max_Data = 0x7FFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_SetSynchPrescaler(RTC_TypeDef *RTCx, uint32_t SynchPrescaler) + { + MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_S, SynchPrescaler); + } + + /** + * @brief Get Asynchronous prescaler factor + * @rmtoll PRER PREDIV_A LL_RTC_GetAsynchPrescaler + * @param RTCx RTC Instance + * @retval Value between Min_Data = 0 and Max_Data = 0x7F + */ + __STATIC_INLINE uint32_t LL_RTC_GetAsynchPrescaler(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_A) >> RTC_PRER_PREDIV_A_Pos); + } + + /** + * @brief Get Synchronous prescaler factor + * @rmtoll PRER PREDIV_S LL_RTC_GetSynchPrescaler + * @param RTCx RTC Instance + * @retval Value between Min_Data = 0 and Max_Data = 0x7FFF + */ + __STATIC_INLINE uint32_t LL_RTC_GetSynchPrescaler(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_S)); + } + + /** + * @brief Enable the write protection for RTC registers. + * @rmtoll WPR KEY LL_RTC_EnableWriteProtection + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_DISABLE); + } + + /** + * @brief Disable the write protection for RTC registers. + * @rmtoll WPR KEY LL_RTC_DisableWriteProtection + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_1); + WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_2); + } + + /** + * @brief Enable RTC_OUT remap + * @rmtoll OR OUT_RMP LL_RTC_EnableOutRemap + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableOutRemap(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->OR, RTC_OR_OUT_RMP); + } + + /** + * @brief Disable RTC_OUT remap + * @rmtoll OR OUT_RMP LL_RTC_DisableOutRemap + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableOutRemap(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->OR, RTC_OR_OUT_RMP); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_Time Time + * @{ + */ + + /** + * @brief Set time format (AM/24-hour or PM notation) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @rmtoll TR PM LL_RTC_TIME_SetFormat + * @param RTCx RTC Instance + * @param TimeFormat This parameter can be one of the following values: + * @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24 + * @arg @ref LL_RTC_TIME_FORMAT_PM + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat) + { + MODIFY_REG(RTCx->TR, RTC_TR_PM, TimeFormat); + } + + /** + * @brief Get time format (AM or PM notation) + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar + * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). + * @rmtoll TR PM LL_RTC_TIME_GetFormat + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24 + * @arg @ref LL_RTC_TIME_FORMAT_PM + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_GetFormat(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TR, RTC_TR_PM)); + } + + /** + * @brief Set Hours in BCD format + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert hour from binary to BCD format + * @rmtoll TR HT LL_RTC_TIME_SetHour\n + * TR HU LL_RTC_TIME_SetHour + * @param RTCx RTC Instance + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours) + { + MODIFY_REG(RTCx->TR, (RTC_TR_HT | RTC_TR_HU), + (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos))); + } + + /** + * @brief Get Hours in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar + * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert hour from BCD to + * Binary format + * @rmtoll TR HT LL_RTC_TIME_GetHour\n + * TR HU LL_RTC_TIME_GetHour + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_GetHour(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU))) >> RTC_TR_HU_Pos); + } + + /** + * @brief Set Minutes in BCD format + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format + * @rmtoll TR MNT LL_RTC_TIME_SetMinute\n + * TR MNU LL_RTC_TIME_SetMinute + * @param RTCx RTC Instance + * @param Minutes Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes) + { + MODIFY_REG(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU), + (((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos))); + } + + /** + * @brief Get Minutes in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar + * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert minute from BCD + * to Binary format + * @rmtoll TR MNT LL_RTC_TIME_GetMinute\n + * TR MNU LL_RTC_TIME_GetMinute + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU)))>> RTC_TR_MNU_Pos); + } + + /** + * @brief Set Seconds in BCD format + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format + * @rmtoll TR ST LL_RTC_TIME_SetSecond\n + * TR SU LL_RTC_TIME_SetSecond + * @param RTCx RTC Instance + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds) + { + MODIFY_REG(RTCx->TR, (RTC_TR_ST | RTC_TR_SU), + (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos))); + } + + /** + * @brief Get Seconds in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar + * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD + * to Binary format + * @rmtoll TR ST LL_RTC_TIME_GetSecond\n + * TR SU LL_RTC_TIME_GetSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_GetSecond(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->TR, (RTC_TR_ST | RTC_TR_SU))) >> RTC_TR_SU_Pos); + } + + /** + * @brief Set time (hour, minute and second) in BCD format + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function) + * @note TimeFormat and Hours should follow the same format + * @rmtoll TR PM LL_RTC_TIME_Config\n + * TR HT LL_RTC_TIME_Config\n + * TR HU LL_RTC_TIME_Config\n + * TR MNT LL_RTC_TIME_Config\n + * TR MNU LL_RTC_TIME_Config\n + * TR ST LL_RTC_TIME_Config\n + * TR SU LL_RTC_TIME_Config + * @param RTCx RTC Instance + * @param Format12_24 This parameter can be one of the following values: + * @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24 + * @arg @ref LL_RTC_TIME_FORMAT_PM + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @param Minutes Value between Min_Data=0x00 and Max_Data=0x59 + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds) + { + register uint32_t temp = 0U; + + temp = Format12_24 | \ + (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \ + (((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos)) | \ + (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos)); + MODIFY_REG(RTCx->TR, (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU), temp); + } + + /** + * @brief Get time (hour, minute and second) in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar + * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). + * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND + * are available to get independently each parameter. + * @rmtoll TR HT LL_RTC_TIME_Get\n + * TR HU LL_RTC_TIME_Get\n + * TR MNT LL_RTC_TIME_Get\n + * TR MNU LL_RTC_TIME_Get\n + * TR ST LL_RTC_TIME_Get\n + * TR SU LL_RTC_TIME_Get + * @param RTCx RTC Instance + * @retval Combination of hours, minutes and seconds (Format: 0x00HHMMSS). + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx) + { + register uint32_t temp = 0U; + + temp = READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU)); + return (uint32_t)((((((temp & RTC_TR_HT) >> RTC_TR_HT_Pos) << 4U) | ((temp & RTC_TR_HU) >> RTC_TR_HU_Pos)) << RTC_OFFSET_HOUR) | \ + (((((temp & RTC_TR_MNT) >> RTC_TR_MNT_Pos) << 4U) | ((temp & RTC_TR_MNU) >> RTC_TR_MNU_Pos)) << RTC_OFFSET_MINUTE) | \ + ((((temp & RTC_TR_ST) >> RTC_TR_ST_Pos) << 4U) | ((temp & RTC_TR_SU) >> RTC_TR_SU_Pos))); + } + + /** + * @brief Memorize whether the daylight saving time change has been performed + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR BKP LL_RTC_TIME_EnableDayLightStore + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_EnableDayLightStore(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_BKP); + } + + /** + * @brief Disable memorization whether the daylight saving time change has been performed. + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR BKP LL_RTC_TIME_DisableDayLightStore + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_DisableDayLightStore(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_BKP); + } + + /** + * @brief Check if RTC Day Light Saving stored operation has been enabled or not + * @rmtoll CR BKP LL_RTC_TIME_IsDayLightStoreEnabled + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_BKP) == (RTC_CR_BKP)); + } + + /** + * @brief Subtract 1 hour (winter time change) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR SUB1H LL_RTC_TIME_DecHour + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_DecHour(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_SUB1H); + } + + /** + * @brief Add 1 hour (summer time change) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ADD1H LL_RTC_TIME_IncHour + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_IncHour(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ADD1H); + } + + /** + * @brief Get Sub second value in the synchronous prescaler counter. + * @note You can use both SubSeconds value and SecondFraction (PREDIV_S through + * LL_RTC_GetSynchPrescaler function) terms returned to convert Calendar + * SubSeconds value in second fraction ratio with time unit following + * generic formula: + * ==> Seconds fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit + * This conversion can be performed only if no shift operation is pending + * (ie. SHFP=0) when PREDIV_S >= SS. + * @rmtoll SSR SS LL_RTC_TIME_GetSubSecond + * @param RTCx RTC Instance + * @retval Sub second value (number between 0 and 65535) + */ + __STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS)); + } + + /** + * @brief Synchronize to a remote clock with a high degree of precision. + * @note This operation effectively subtracts from (delays) or advance the clock of a fraction of a second. + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note When REFCKON is set, firmware must not write to Shift control register. + * @rmtoll SHIFTR ADD1S LL_RTC_TIME_Synchronize\n + * SHIFTR SUBFS LL_RTC_TIME_Synchronize + * @param RTCx RTC Instance + * @param ShiftSecond This parameter can be one of the following values: + * @arg @ref LL_RTC_SHIFT_SECOND_DELAY + * @arg @ref LL_RTC_SHIFT_SECOND_ADVANCE + * @param Fraction Number of Seconds Fractions (any value from 0 to 0x7FFF) + * @retval None + */ + __STATIC_INLINE void LL_RTC_TIME_Synchronize(RTC_TypeDef *RTCx, uint32_t ShiftSecond, uint32_t Fraction) + { + WRITE_REG(RTCx->SHIFTR, ShiftSecond | Fraction); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_Date Date + * @{ + */ + + /** + * @brief Set Year in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Year from binary to BCD format + * @rmtoll DR YT LL_RTC_DATE_SetYear\n + * DR YU LL_RTC_DATE_SetYear + * @param RTCx RTC Instance + * @param Year Value between Min_Data=0x00 and Max_Data=0x99 + * @retval None + */ + __STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year) + { + MODIFY_REG(RTCx->DR, (RTC_DR_YT | RTC_DR_YU), + (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos))); + } + + /** + * @brief Get Year in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format + * @rmtoll DR YT LL_RTC_DATE_GetYear\n + * DR YU LL_RTC_DATE_GetYear + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x99 + */ + __STATIC_INLINE uint32_t LL_RTC_DATE_GetYear(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->DR, (RTC_DR_YT | RTC_DR_YU))) >> RTC_DR_YU_Pos); + } + + /** + * @brief Set Week day + * @rmtoll DR WDU LL_RTC_DATE_SetWeekDay + * @param RTCx RTC Instance + * @param WeekDay This parameter can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + * @retval None + */ + __STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay) + { + MODIFY_REG(RTCx->DR, RTC_DR_WDU, WeekDay << RTC_DR_WDU_Pos); + } + + /** + * @brief Get Week day + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @rmtoll DR WDU LL_RTC_DATE_GetWeekDay + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + */ + __STATIC_INLINE uint32_t LL_RTC_DATE_GetWeekDay(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->DR, RTC_DR_WDU) >> RTC_DR_WDU_Pos); + } + + /** + * @brief Set Month in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Month from binary to BCD format + * @rmtoll DR MT LL_RTC_DATE_SetMonth\n + * DR MU LL_RTC_DATE_SetMonth + * @param RTCx RTC Instance + * @param Month This parameter can be one of the following values: + * @arg @ref LL_RTC_MONTH_JANUARY + * @arg @ref LL_RTC_MONTH_FEBRUARY + * @arg @ref LL_RTC_MONTH_MARCH + * @arg @ref LL_RTC_MONTH_APRIL + * @arg @ref LL_RTC_MONTH_MAY + * @arg @ref LL_RTC_MONTH_JUNE + * @arg @ref LL_RTC_MONTH_JULY + * @arg @ref LL_RTC_MONTH_AUGUST + * @arg @ref LL_RTC_MONTH_SEPTEMBER + * @arg @ref LL_RTC_MONTH_OCTOBER + * @arg @ref LL_RTC_MONTH_NOVEMBER + * @arg @ref LL_RTC_MONTH_DECEMBER + * @retval None + */ + __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month) + { + MODIFY_REG(RTCx->DR, (RTC_DR_MT | RTC_DR_MU), + (((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos))); + } + + /** + * @brief Get Month in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format + * @rmtoll DR MT LL_RTC_DATE_GetMonth\n + * DR MU LL_RTC_DATE_GetMonth + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_MONTH_JANUARY + * @arg @ref LL_RTC_MONTH_FEBRUARY + * @arg @ref LL_RTC_MONTH_MARCH + * @arg @ref LL_RTC_MONTH_APRIL + * @arg @ref LL_RTC_MONTH_MAY + * @arg @ref LL_RTC_MONTH_JUNE + * @arg @ref LL_RTC_MONTH_JULY + * @arg @ref LL_RTC_MONTH_AUGUST + * @arg @ref LL_RTC_MONTH_SEPTEMBER + * @arg @ref LL_RTC_MONTH_OCTOBER + * @arg @ref LL_RTC_MONTH_NOVEMBER + * @arg @ref LL_RTC_MONTH_DECEMBER + */ + __STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU)))>> RTC_DR_MU_Pos); + } + + /** + * @brief Set Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format + * @rmtoll DR DT LL_RTC_DATE_SetDay\n + * DR DU LL_RTC_DATE_SetDay + * @param RTCx RTC Instance + * @param Day Value between Min_Data=0x01 and Max_Data=0x31 + * @retval None + */ + __STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day) + { + MODIFY_REG(RTCx->DR, (RTC_DR_DT | RTC_DR_DU), + (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos))); + } + + /** + * @brief Get Day in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format + * @rmtoll DR DT LL_RTC_DATE_GetDay\n + * DR DU LL_RTC_DATE_GetDay + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x31 + */ + __STATIC_INLINE uint32_t LL_RTC_DATE_GetDay(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->DR, (RTC_DR_DT | RTC_DR_DU))) >> RTC_DR_DU_Pos); + } + + /** + * @brief Set date (WeekDay, Day, Month and Year) in BCD format + * @rmtoll DR WDU LL_RTC_DATE_Config\n + * DR MT LL_RTC_DATE_Config\n + * DR MU LL_RTC_DATE_Config\n + * DR DT LL_RTC_DATE_Config\n + * DR DU LL_RTC_DATE_Config\n + * DR YT LL_RTC_DATE_Config\n + * DR YU LL_RTC_DATE_Config + * @param RTCx RTC Instance + * @param WeekDay This parameter can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + * @param Day Value between Min_Data=0x01 and Max_Data=0x31 + * @param Month This parameter can be one of the following values: + * @arg @ref LL_RTC_MONTH_JANUARY + * @arg @ref LL_RTC_MONTH_FEBRUARY + * @arg @ref LL_RTC_MONTH_MARCH + * @arg @ref LL_RTC_MONTH_APRIL + * @arg @ref LL_RTC_MONTH_MAY + * @arg @ref LL_RTC_MONTH_JUNE + * @arg @ref LL_RTC_MONTH_JULY + * @arg @ref LL_RTC_MONTH_AUGUST + * @arg @ref LL_RTC_MONTH_SEPTEMBER + * @arg @ref LL_RTC_MONTH_OCTOBER + * @arg @ref LL_RTC_MONTH_NOVEMBER + * @arg @ref LL_RTC_MONTH_DECEMBER + * @param Year Value between Min_Data=0x00 and Max_Data=0x99 + * @retval None + */ + __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uint32_t Day, uint32_t Month, uint32_t Year) + { + register uint32_t temp = 0U; + + temp = (WeekDay << RTC_DR_WDU_Pos) | \ + (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \ + (((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos)) | \ + (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos)); + + MODIFY_REG(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU), temp); + } + + /** + * @brief Get date (WeekDay, Day, Month and Year) in BCD format + * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * before reading this bit + * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH, + * and __LL_RTC_GET_DAY are available to get independently each parameter. + * @rmtoll DR WDU LL_RTC_DATE_Get\n + * DR MT LL_RTC_DATE_Get\n + * DR MU LL_RTC_DATE_Get\n + * DR DT LL_RTC_DATE_Get\n + * DR DU LL_RTC_DATE_Get\n + * DR YT LL_RTC_DATE_Get\n + * DR YU LL_RTC_DATE_Get + * @param RTCx RTC Instance + * @retval Combination of WeekDay, Day, Month and Year (Format: 0xWWDDMMYY). + */ + __STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx) + { + register uint32_t temp = 0U; + + temp = READ_BIT(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU)); + return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \ + (((((temp & RTC_DR_DT) >> RTC_DR_DT_Pos) << 4U) | ((temp & RTC_DR_DU) >> RTC_DR_DU_Pos)) << RTC_OFFSET_DAY) | \ + (((((temp & RTC_DR_MT) >> RTC_DR_MT_Pos) << 4U) | ((temp & RTC_DR_MU) >> RTC_DR_MU_Pos)) << RTC_OFFSET_MONTH) | \ + ((((temp & RTC_DR_YT) >> RTC_DR_YT_Pos) << 4U) | ((temp & RTC_DR_YU) >> RTC_DR_YU_Pos))); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_ALARMA ALARMA + * @{ + */ + + /** + * @brief Enable Alarm A + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRAE LL_RTC_ALMA_Enable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_Enable(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ALRAE); + } + + /** + * @brief Disable Alarm A + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRAE LL_RTC_ALMA_Disable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_Disable(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_ALRAE); + } + + /** + * @brief Specify the Alarm A masks. + * @rmtoll ALRMAR MSK4 LL_RTC_ALMA_SetMask\n + * ALRMAR MSK3 LL_RTC_ALMA_SetMask\n + * ALRMAR MSK2 LL_RTC_ALMA_SetMask\n + * ALRMAR MSK1 LL_RTC_ALMA_SetMask + * @param RTCx RTC Instance + * @param Mask This parameter can be a combination of the following values: + * @arg @ref LL_RTC_ALMA_MASK_NONE + * @arg @ref LL_RTC_ALMA_MASK_DATEWEEKDAY + * @arg @ref LL_RTC_ALMA_MASK_HOURS + * @arg @ref LL_RTC_ALMA_MASK_MINUTES + * @arg @ref LL_RTC_ALMA_MASK_SECONDS + * @arg @ref LL_RTC_ALMA_MASK_ALL + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1, Mask); + } + + /** + * @brief Get the Alarm A masks. + * @rmtoll ALRMAR MSK4 LL_RTC_ALMA_GetMask\n + * ALRMAR MSK3 LL_RTC_ALMA_GetMask\n + * ALRMAR MSK2 LL_RTC_ALMA_GetMask\n + * ALRMAR MSK1 LL_RTC_ALMA_GetMask + * @param RTCx RTC Instance + * @retval Returned value can be can be a combination of the following values: + * @arg @ref LL_RTC_ALMA_MASK_NONE + * @arg @ref LL_RTC_ALMA_MASK_DATEWEEKDAY + * @arg @ref LL_RTC_ALMA_MASK_HOURS + * @arg @ref LL_RTC_ALMA_MASK_MINUTES + * @arg @ref LL_RTC_ALMA_MASK_SECONDS + * @arg @ref LL_RTC_ALMA_MASK_ALL + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetMask(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1)); + } + + /** + * @brief Enable AlarmA Week day selection (DU[3:0] represents the week day. DT[1:0] is do not care) + * @rmtoll ALRMAR WDSEL LL_RTC_ALMA_EnableWeekday + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_EnableWeekday(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL); + } + + /** + * @brief Disable AlarmA Week day selection (DU[3:0] represents the date ) + * @rmtoll ALRMAR WDSEL LL_RTC_ALMA_DisableWeekday + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_DisableWeekday(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL); + } + + /** + * @brief Set ALARM A Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format + * @rmtoll ALRMAR DT LL_RTC_ALMA_SetDay\n + * ALRMAR DU LL_RTC_ALMA_SetDay + * @param RTCx RTC Instance + * @param Day Value between Min_Data=0x01 and Max_Data=0x31 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetDay(RTC_TypeDef *RTCx, uint32_t Day) + { + MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU), + (((Day & 0xF0U) << (RTC_ALRMAR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMAR_DU_Pos))); + } + + /** + * @brief Get ALARM A Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format + * @rmtoll ALRMAR DT LL_RTC_ALMA_GetDay\n + * ALRMAR DU LL_RTC_ALMA_GetDay + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x31 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetDay(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU))) >> RTC_ALRMAR_DU_Pos); + } + + /** + * @brief Set ALARM A Weekday + * @rmtoll ALRMAR DU LL_RTC_ALMA_SetWeekDay + * @param RTCx RTC Instance + * @param WeekDay This parameter can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay) + { + MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_DU, WeekDay << RTC_ALRMAR_DU_Pos); + } + + /** + * @brief Get ALARM A Weekday + * @rmtoll ALRMAR DU LL_RTC_ALMA_GetWeekDay + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetWeekDay(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_DU) >> RTC_ALRMAR_DU_Pos); + } + + /** + * @brief Set Alarm A time format (AM/24-hour or PM notation) + * @rmtoll ALRMAR PM LL_RTC_ALMA_SetTimeFormat + * @param RTCx RTC Instance + * @param TimeFormat This parameter can be one of the following values: + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat) + { + MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM, TimeFormat); + } + + /** + * @brief Get Alarm A time format (AM or PM notation) + * @rmtoll ALRMAR PM LL_RTC_ALMA_GetTimeFormat + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetTimeFormat(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_PM)); + } + + /** + * @brief Set ALARM A Hours in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Hours from binary to BCD format + * @rmtoll ALRMAR HT LL_RTC_ALMA_SetHour\n + * ALRMAR HU LL_RTC_ALMA_SetHour + * @param RTCx RTC Instance + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetHour(RTC_TypeDef *RTCx, uint32_t Hours) + { + MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU), + (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos))); + } + + /** + * @brief Get ALARM A Hours in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format + * @rmtoll ALRMAR HT LL_RTC_ALMA_GetHour\n + * ALRMAR HU LL_RTC_ALMA_GetHour + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU))) >> RTC_ALRMAR_HU_Pos); + } + + /** + * @brief Set ALARM A Minutes in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format + * @rmtoll ALRMAR MNT LL_RTC_ALMA_SetMinute\n + * ALRMAR MNU LL_RTC_ALMA_SetMinute + * @param RTCx RTC Instance + * @param Minutes Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes) + { + MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU), + (((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos))); + } + + /** + * @brief Get ALARM A Minutes in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format + * @rmtoll ALRMAR MNT LL_RTC_ALMA_GetMinute\n + * ALRMAR MNU LL_RTC_ALMA_GetMinute + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetMinute(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU))) >> RTC_ALRMAR_MNU_Pos); + } + + /** + * @brief Set ALARM A Seconds in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format + * @rmtoll ALRMAR ST LL_RTC_ALMA_SetSecond\n + * ALRMAR SU LL_RTC_ALMA_SetSecond + * @param RTCx RTC Instance + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds) + { + MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU), + (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos))); + } + + /** + * @brief Get ALARM A Seconds in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format + * @rmtoll ALRMAR ST LL_RTC_ALMA_GetSecond\n + * ALRMAR SU LL_RTC_ALMA_GetSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetSecond(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU))) >> RTC_ALRMAR_SU_Pos); + } + + /** + * @brief Set Alarm A Time (hour, minute and second) in BCD format + * @rmtoll ALRMAR PM LL_RTC_ALMA_ConfigTime\n + * ALRMAR HT LL_RTC_ALMA_ConfigTime\n + * ALRMAR HU LL_RTC_ALMA_ConfigTime\n + * ALRMAR MNT LL_RTC_ALMA_ConfigTime\n + * ALRMAR MNU LL_RTC_ALMA_ConfigTime\n + * ALRMAR ST LL_RTC_ALMA_ConfigTime\n + * ALRMAR SU LL_RTC_ALMA_ConfigTime + * @param RTCx RTC Instance + * @param Format12_24 This parameter can be one of the following values: + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @param Minutes Value between Min_Data=0x00 and Max_Data=0x59 + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds) + { + register uint32_t temp = 0U; + + temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \ + (((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos)) | \ + (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos)); + + MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM | RTC_ALRMAR_HT | RTC_ALRMAR_HU | RTC_ALRMAR_MNT | RTC_ALRMAR_MNU | RTC_ALRMAR_ST | RTC_ALRMAR_SU, temp); + } + + /** + * @brief Get Alarm B Time (hour, minute and second) in BCD format + * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND + * are available to get independently each parameter. + * @rmtoll ALRMAR HT LL_RTC_ALMA_GetTime\n + * ALRMAR HU LL_RTC_ALMA_GetTime\n + * ALRMAR MNT LL_RTC_ALMA_GetTime\n + * ALRMAR MNU LL_RTC_ALMA_GetTime\n + * ALRMAR ST LL_RTC_ALMA_GetTime\n + * ALRMAR SU LL_RTC_ALMA_GetTime + * @param RTCx RTC Instance + * @retval Combination of hours, minutes and seconds. + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef *RTCx) + { + return (uint32_t)((LL_RTC_ALMA_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMA_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMA_GetSecond(RTCx)); + } + + /** + * @brief Set Alarm A Mask the most-significant bits starting at this bit + * @note This register can be written only when ALRAE is reset in RTC_CR register, + * or in initialization mode. + * @rmtoll ALRMASSR MASKSS LL_RTC_ALMA_SetSubSecondMask + * @param RTCx RTC Instance + * @param Mask Value between Min_Data=0x00 and Max_Data=0xF + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS, Mask << RTC_ALRMASSR_MASKSS_Pos); + } + + /** + * @brief Get Alarm A Mask the most-significant bits starting at this bit + * @rmtoll ALRMASSR MASKSS LL_RTC_ALMA_GetSubSecondMask + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xF + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS) >> RTC_ALRMASSR_MASKSS_Pos); + } + + /** + * @brief Set Alarm A Sub seconds value + * @rmtoll ALRMASSR SS LL_RTC_ALMA_SetSubSecond + * @param RTCx RTC Instance + * @param Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMA_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond) + { + MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_SS, Subsecond); + } + + /** + * @brief Get Alarm A Sub seconds value + * @rmtoll ALRMASSR SS LL_RTC_ALMA_GetSubSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF + */ + __STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecond(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_SS)); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_ALARMB ALARMB + * @{ + */ + + /** + * @brief Enable Alarm B + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRBE LL_RTC_ALMB_Enable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_Enable(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ALRBE); + } + + /** + * @brief Disable Alarm B + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRBE LL_RTC_ALMB_Disable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_Disable(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_ALRBE); + } + + /** + * @brief Specify the Alarm B masks. + * @rmtoll ALRMBR MSK4 LL_RTC_ALMB_SetMask\n + * ALRMBR MSK3 LL_RTC_ALMB_SetMask\n + * ALRMBR MSK2 LL_RTC_ALMB_SetMask\n + * ALRMBR MSK1 LL_RTC_ALMB_SetMask + * @param RTCx RTC Instance + * @param Mask This parameter can be a combination of the following values: + * @arg @ref LL_RTC_ALMB_MASK_NONE + * @arg @ref LL_RTC_ALMB_MASK_DATEWEEKDAY + * @arg @ref LL_RTC_ALMB_MASK_HOURS + * @arg @ref LL_RTC_ALMB_MASK_MINUTES + * @arg @ref LL_RTC_ALMB_MASK_SECONDS + * @arg @ref LL_RTC_ALMB_MASK_ALL + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1, Mask); + } + + /** + * @brief Get the Alarm B masks. + * @rmtoll ALRMBR MSK4 LL_RTC_ALMB_GetMask\n + * ALRMBR MSK3 LL_RTC_ALMB_GetMask\n + * ALRMBR MSK2 LL_RTC_ALMB_GetMask\n + * ALRMBR MSK1 LL_RTC_ALMB_GetMask + * @param RTCx RTC Instance + * @retval Returned value can be can be a combination of the following values: + * @arg @ref LL_RTC_ALMB_MASK_NONE + * @arg @ref LL_RTC_ALMB_MASK_DATEWEEKDAY + * @arg @ref LL_RTC_ALMB_MASK_HOURS + * @arg @ref LL_RTC_ALMB_MASK_MINUTES + * @arg @ref LL_RTC_ALMB_MASK_SECONDS + * @arg @ref LL_RTC_ALMB_MASK_ALL + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetMask(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1)); + } + + /** + * @brief Enable AlarmB Week day selection (DU[3:0] represents the week day. DT[1:0] is do not care) + * @rmtoll ALRMBR WDSEL LL_RTC_ALMB_EnableWeekday + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_EnableWeekday(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL); + } + + /** + * @brief Disable AlarmB Week day selection (DU[3:0] represents the date ) + * @rmtoll ALRMBR WDSEL LL_RTC_ALMB_DisableWeekday + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_DisableWeekday(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL); + } + + /** + * @brief Set ALARM B Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format + * @rmtoll ALRMBR DT LL_RTC_ALMB_SetDay\n + * ALRMBR DU LL_RTC_ALMB_SetDay + * @param RTCx RTC Instance + * @param Day Value between Min_Data=0x01 and Max_Data=0x31 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day) + { + MODIFY_REG(RTC->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU), + (((Day & 0xF0U) << (RTC_ALRMBR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMBR_DU_Pos))); + } + + /** + * @brief Get ALARM B Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format + * @rmtoll ALRMBR DT LL_RTC_ALMB_GetDay\n + * ALRMBR DU LL_RTC_ALMB_GetDay + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x31 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU))) >> RTC_ALRMBR_DU_Pos); + } + + /** + * @brief Set ALARM B Weekday + * @rmtoll ALRMBR DU LL_RTC_ALMB_SetWeekDay + * @param RTCx RTC Instance + * @param WeekDay This parameter can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay) + { + MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_DU, WeekDay << RTC_ALRMBR_DU_Pos); + } + + /** + * @brief Get ALARM B Weekday + * @rmtoll ALRMBR DU LL_RTC_ALMB_GetWeekDay + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetWeekDay(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_DU) >> RTC_ALRMBR_DU_Pos); + } + + /** + * @brief Set ALARM B time format (AM/24-hour or PM notation) + * @rmtoll ALRMBR PM LL_RTC_ALMB_SetTimeFormat + * @param RTCx RTC Instance + * @param TimeFormat This parameter can be one of the following values: + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat) + { + MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM, TimeFormat); + } + + /** + * @brief Get ALARM B time format (AM or PM notation) + * @rmtoll ALRMBR PM LL_RTC_ALMB_GetTimeFormat + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetTimeFormat(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_PM)); + } + + /** + * @brief Set ALARM B Hours in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Hours from binary to BCD format + * @rmtoll ALRMBR HT LL_RTC_ALMB_SetHour\n + * ALRMBR HU LL_RTC_ALMB_SetHour + * @param RTCx RTC Instance + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetHour(RTC_TypeDef *RTCx, uint32_t Hours) + { + MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU), + (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos))); + } + + /** + * @brief Get ALARM B Hours in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format + * @rmtoll ALRMBR HT LL_RTC_ALMB_GetHour\n + * ALRMBR HU LL_RTC_ALMB_GetHour + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetHour(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU))) >> RTC_ALRMBR_HU_Pos); + } + + /** + * @brief Set ALARM B Minutes in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format + * @rmtoll ALRMBR MNT LL_RTC_ALMB_SetMinute\n + * ALRMBR MNU LL_RTC_ALMB_SetMinute + * @param RTCx RTC Instance + * @param Minutes between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes) + { + MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU), + (((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos))); + } + + /** + * @brief Get ALARM B Minutes in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format + * @rmtoll ALRMBR MNT LL_RTC_ALMB_GetMinute\n + * ALRMBR MNU LL_RTC_ALMB_GetMinute + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU))) >> RTC_ALRMBR_MNU_Pos); + } + + /** + * @brief Set ALARM B Seconds in BCD format + * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format + * @rmtoll ALRMBR ST LL_RTC_ALMB_SetSecond\n + * ALRMBR SU LL_RTC_ALMB_SetSecond + * @param RTCx RTC Instance + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds) + { + MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU), + (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos))); + } + + /** + * @brief Get ALARM B Seconds in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format + * @rmtoll ALRMBR ST LL_RTC_ALMB_GetSecond\n + * ALRMBR SU LL_RTC_ALMB_GetSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef *RTCx) + { + return ((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU))) >> RTC_ALRMBR_SU_Pos); + } + + /** + * @brief Set Alarm B Time (hour, minute and second) in BCD format + * @rmtoll ALRMBR PM LL_RTC_ALMB_ConfigTime\n + * ALRMBR HT LL_RTC_ALMB_ConfigTime\n + * ALRMBR HU LL_RTC_ALMB_ConfigTime\n + * ALRMBR MNT LL_RTC_ALMB_ConfigTime\n + * ALRMBR MNU LL_RTC_ALMB_ConfigTime\n + * ALRMBR ST LL_RTC_ALMB_ConfigTime\n + * ALRMBR SU LL_RTC_ALMB_ConfigTime + * @param RTCx RTC Instance + * @param Format12_24 This parameter can be one of the following values: + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM + * @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM + * @param Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + * @param Minutes Value between Min_Data=0x00 and Max_Data=0x59 + * @param Seconds Value between Min_Data=0x00 and Max_Data=0x59 + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds) + { + register uint32_t temp = 0U; + + temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \ + (((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)) | \ + (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos)); + + MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM| RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp); + } + + /** + * @brief Get Alarm B Time (hour, minute and second) in BCD format + * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND + * are available to get independently each parameter. + * @rmtoll ALRMBR HT LL_RTC_ALMB_GetTime\n + * ALRMBR HU LL_RTC_ALMB_GetTime\n + * ALRMBR MNT LL_RTC_ALMB_GetTime\n + * ALRMBR MNU LL_RTC_ALMB_GetTime\n + * ALRMBR ST LL_RTC_ALMB_GetTime\n + * ALRMBR SU LL_RTC_ALMB_GetTime + * @param RTCx RTC Instance + * @retval Combination of hours, minutes and seconds. + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetTime(RTC_TypeDef *RTCx) + { + return (uint32_t)((LL_RTC_ALMB_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMB_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMB_GetSecond(RTCx)); + } + + /** + * @brief Set Alarm B Mask the most-significant bits starting at this bit + * @note This register can be written only when ALRBE is reset in RTC_CR register, + * or in initialization mode. + * @rmtoll ALRMBSSR MASKSS LL_RTC_ALMB_SetSubSecondMask + * @param RTCx RTC Instance + * @param Mask Value between Min_Data=0x00 and Max_Data=0xF + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS, Mask << RTC_ALRMBSSR_MASKSS_Pos); + } + + /** + * @brief Get Alarm B Mask the most-significant bits starting at this bit + * @rmtoll ALRMBSSR MASKSS LL_RTC_ALMB_GetSubSecondMask + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xF + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS) >> RTC_ALRMBSSR_MASKSS_Pos); + } + + /** + * @brief Set Alarm B Sub seconds value + * @rmtoll ALRMBSSR SS LL_RTC_ALMB_SetSubSecond + * @param RTCx RTC Instance + * @param Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_ALMB_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond) + { + MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS, Subsecond); + } + + /** + * @brief Get Alarm B Sub seconds value + * @rmtoll ALRMBSSR SS LL_RTC_ALMB_GetSubSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF + */ + __STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecond(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS)); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_Timestamp Timestamp + * @{ + */ + + /** + * @brief Enable internal event timestamp + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ITSE LL_RTC_TS_EnableInternalEvent + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_EnableInternalEvent(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ITSE); + } + + /** + * @brief Disable internal event timestamp + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ITSE LL_RTC_TS_DisableInternalEvent + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_DisableInternalEvent(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_ITSE); + } + + /** + * @brief Enable Timestamp + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR TSE LL_RTC_TS_Enable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_Enable(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_TSE); + } + + /** + * @brief Disable Timestamp + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR TSE LL_RTC_TS_Disable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_Disable(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_TSE); + } + + /** + * @brief Set Time-stamp event active edge + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting + * @rmtoll CR TSEDGE LL_RTC_TS_SetActiveEdge + * @param RTCx RTC Instance + * @param Edge This parameter can be one of the following values: + * @arg @ref LL_RTC_TIMESTAMP_EDGE_RISING + * @arg @ref LL_RTC_TIMESTAMP_EDGE_FALLING + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_SetActiveEdge(RTC_TypeDef *RTCx, uint32_t Edge) + { + MODIFY_REG(RTCx->CR, RTC_CR_TSEDGE, Edge); + } + + /** + * @brief Get Time-stamp event active edge + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR TSEDGE LL_RTC_TS_GetActiveEdge + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TIMESTAMP_EDGE_RISING + * @arg @ref LL_RTC_TIMESTAMP_EDGE_FALLING + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetActiveEdge(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TSEDGE)); + } + + /** + * @brief Get Timestamp AM/PM notation (AM or 24-hour format) + * @rmtoll TSTR PM LL_RTC_TS_GetTimeFormat + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TS_TIME_FORMAT_AM + * @arg @ref LL_RTC_TS_TIME_FORMAT_PM + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetTimeFormat(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_PM)); + } + + /** + * @brief Get Timestamp Hours in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format + * @rmtoll TSTR HT LL_RTC_TS_GetHour\n + * TSTR HU LL_RTC_TS_GetHour + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23 + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetHour(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_HT | RTC_TSTR_HU) >> RTC_TSTR_HU_Pos); + } + + /** + * @brief Get Timestamp Minutes in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format + * @rmtoll TSTR MNT LL_RTC_TS_GetMinute\n + * TSTR MNU LL_RTC_TS_GetMinute + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetMinute(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_MNT | RTC_TSTR_MNU) >> RTC_TSTR_MNU_Pos); + } + + /** + * @brief Get Timestamp Seconds in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format + * @rmtoll TSTR ST LL_RTC_TS_GetSecond\n + * TSTR SU LL_RTC_TS_GetSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x59 + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetSecond(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_ST | RTC_TSTR_SU)); + } + + /** + * @brief Get Timestamp time (hour, minute and second) in BCD format + * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND + * are available to get independently each parameter. + * @rmtoll TSTR HT LL_RTC_TS_GetTime\n + * TSTR HU LL_RTC_TS_GetTime\n + * TSTR MNT LL_RTC_TS_GetTime\n + * TSTR MNU LL_RTC_TS_GetTime\n + * TSTR ST LL_RTC_TS_GetTime\n + * TSTR SU LL_RTC_TS_GetTime + * @param RTCx RTC Instance + * @retval Combination of hours, minutes and seconds. + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetTime(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSTR, + RTC_TSTR_HT | RTC_TSTR_HU | RTC_TSTR_MNT | RTC_TSTR_MNU | RTC_TSTR_ST | RTC_TSTR_SU)); + } + + /** + * @brief Get Timestamp Week day + * @rmtoll TSDR WDU LL_RTC_TS_GetWeekDay + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WEEKDAY_MONDAY + * @arg @ref LL_RTC_WEEKDAY_TUESDAY + * @arg @ref LL_RTC_WEEKDAY_WEDNESDAY + * @arg @ref LL_RTC_WEEKDAY_THURSDAY + * @arg @ref LL_RTC_WEEKDAY_FRIDAY + * @arg @ref LL_RTC_WEEKDAY_SATURDAY + * @arg @ref LL_RTC_WEEKDAY_SUNDAY + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetWeekDay(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU) >> RTC_TSDR_WDU_Pos); + } + + /** + * @brief Get Timestamp Month in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format + * @rmtoll TSDR MT LL_RTC_TS_GetMonth\n + * TSDR MU LL_RTC_TS_GetMonth + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_MONTH_JANUARY + * @arg @ref LL_RTC_MONTH_FEBRUARY + * @arg @ref LL_RTC_MONTH_MARCH + * @arg @ref LL_RTC_MONTH_APRIL + * @arg @ref LL_RTC_MONTH_MAY + * @arg @ref LL_RTC_MONTH_JUNE + * @arg @ref LL_RTC_MONTH_JULY + * @arg @ref LL_RTC_MONTH_AUGUST + * @arg @ref LL_RTC_MONTH_SEPTEMBER + * @arg @ref LL_RTC_MONTH_OCTOBER + * @arg @ref LL_RTC_MONTH_NOVEMBER + * @arg @ref LL_RTC_MONTH_DECEMBER + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetMonth(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_MT | RTC_TSDR_MU) >> RTC_TSDR_MU_Pos); + } + + /** + * @brief Get Timestamp Day in BCD format + * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format + * @rmtoll TSDR DT LL_RTC_TS_GetDay\n + * TSDR DU LL_RTC_TS_GetDay + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x01 and Max_Data=0x31 + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetDay(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_DT | RTC_TSDR_DU)); + } + + /** + * @brief Get Timestamp date (WeekDay, Day and Month) in BCD format + * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_MONTH, + * and __LL_RTC_GET_DAY are available to get independently each parameter. + * @rmtoll TSDR WDU LL_RTC_TS_GetDate\n + * TSDR MT LL_RTC_TS_GetDate\n + * TSDR MU LL_RTC_TS_GetDate\n + * TSDR DT LL_RTC_TS_GetDate\n + * TSDR DU LL_RTC_TS_GetDate + * @param RTCx RTC Instance + * @retval Combination of Weekday, Day and Month + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU | RTC_TSDR_MT | RTC_TSDR_MU | RTC_TSDR_DT | RTC_TSDR_DU)); + } + + /** + * @brief Get time-stamp sub second value + * @rmtoll TSSSR SS LL_RTC_TS_GetSubSecond + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF + */ + __STATIC_INLINE uint32_t LL_RTC_TS_GetSubSecond(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TSSSR, RTC_TSSSR_SS)); + } + + #if defined(RTC_TAMPCR_TAMPTS) + /** + * @brief Activate timestamp on tamper detection event + * @rmtoll TAMPCR TAMPTS LL_RTC_TS_EnableOnTamper + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_EnableOnTamper(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPTS); + } + + /** + * @brief Disable timestamp on tamper detection event + * @rmtoll TAMPCR TAMPTS LL_RTC_TS_DisableOnTamper + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TS_DisableOnTamper(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPTS); + } + #endif /* RTC_TAMPCR_TAMPTS */ + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_Tamper Tamper + * @{ + */ + + /** + * @brief Enable RTC_TAMPx input detection + * @rmtoll TAMPCR TAMP1E LL_RTC_TAMPER_Enable\n + * TAMPCR TAMP2E LL_RTC_TAMPER_Enable\n + * TAMPCR TAMP3E LL_RTC_TAMPER_Enable + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_1 + * @arg @ref LL_RTC_TAMPER_2 + * @arg @ref LL_RTC_TAMPER_3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper) + { + SET_BIT(RTCx->TAMPCR, Tamper); + } + + /** + * @brief Clear RTC_TAMPx input detection + * @rmtoll TAMPCR TAMP1E LL_RTC_TAMPER_Disable\n + * TAMPCR TAMP2E LL_RTC_TAMPER_Disable\n + * TAMPCR TAMP3E LL_RTC_TAMPER_Disable + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_1 + * @arg @ref LL_RTC_TAMPER_2 + * @arg @ref LL_RTC_TAMPER_3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper) + { + CLEAR_BIT(RTCx->TAMPCR, Tamper); + } + + /** + * @brief Enable Tamper mask flag + * @note Associated Tamper IT must not enabled when tamper mask is set. + * @rmtoll TAMPCR TAMP1MF LL_RTC_TAMPER_EnableMask\n + * TAMPCR TAMP2MF LL_RTC_TAMPER_EnableMask\n + * TAMPCR TAMP3MF LL_RTC_TAMPER_EnableMask + * @param RTCx RTC Instance + * @param Mask This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER1 + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER2 + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_EnableMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + SET_BIT(RTCx->TAMPCR, Mask); + } + + /** + * @brief Disable Tamper mask flag + * @rmtoll TAMPCR TAMP1MF LL_RTC_TAMPER_DisableMask\n + * TAMPCR TAMP2MF LL_RTC_TAMPER_DisableMask\n + * TAMPCR TAMP3MF LL_RTC_TAMPER_DisableMask + * @param RTCx RTC Instance + * @param Mask This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER1 + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER2 + * @arg @ref LL_RTC_TAMPER_MASK_TAMPER3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_DisableMask(RTC_TypeDef *RTCx, uint32_t Mask) + { + CLEAR_BIT(RTCx->TAMPCR, Mask); + } + + /** + * @brief Enable backup register erase after Tamper event detection + * @rmtoll TAMPCR TAMP1NOERASE LL_RTC_TAMPER_EnableEraseBKP\n + * TAMPCR TAMP2NOERASE LL_RTC_TAMPER_EnableEraseBKP\n + * TAMPCR TAMP3NOERASE LL_RTC_TAMPER_EnableEraseBKP + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER1 + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER2 + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_EnableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper) + { + CLEAR_BIT(RTCx->TAMPCR, Tamper); + } + + /** + * @brief Disable backup register erase after Tamper event detection + * @rmtoll TAMPCR TAMP1NOERASE LL_RTC_TAMPER_DisableEraseBKP\n + * TAMPCR TAMP2NOERASE LL_RTC_TAMPER_DisableEraseBKP\n + * TAMPCR TAMP3NOERASE LL_RTC_TAMPER_DisableEraseBKP + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER1 + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER2 + * @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_DisableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper) + { + SET_BIT(RTCx->TAMPCR, Tamper); + } + + #if defined(RTC_TAMPCR_TAMPPUDIS) + /** + * @brief Disable RTC_TAMPx pull-up disable (Disable precharge of RTC_TAMPx pins) + * @rmtoll TAMPCR TAMPPUDIS LL_RTC_TAMPER_DisablePullUp + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPUDIS); + } + + /** + * @brief Enable RTC_TAMPx pull-up disable ( Precharge RTC_TAMPx pins before sampling) + * @rmtoll TAMPCR TAMPPUDIS LL_RTC_TAMPER_EnablePullUp + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPUDIS); + } + #endif /* RTC_TAMPCR_TAMPPUDIS */ + + #if defined(RTC_TAMPCR_TAMPPRCH) + /** + * @brief Set RTC_TAMPx precharge duration + * @rmtoll TAMPCR TAMPPRCH LL_RTC_TAMPER_SetPrecharge + * @param RTCx RTC Instance + * @param Duration This parameter can be one of the following values: + * @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef *RTCx, uint32_t Duration) + { + MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPPRCH, Duration); + } + + /** + * @brief Get RTC_TAMPx precharge duration + * @rmtoll TAMPCR TAMPPRCH LL_RTC_TAMPER_GetPrecharge + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK + * @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK + */ + __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPRCH)); + } + #endif /* RTC_TAMPCR_TAMPPRCH */ + + #if defined(RTC_TAMPCR_TAMPFLT) + /** + * @brief Set RTC_TAMPx filter count + * @rmtoll TAMPCR TAMPFLT LL_RTC_TAMPER_SetFilterCount + * @param RTCx RTC Instance + * @param FilterCount This parameter can be one of the following values: + * @arg @ref LL_RTC_TAMPER_FILTER_DISABLE + * @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE + * @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE + * @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef *RTCx, uint32_t FilterCount) + { + MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPFLT, FilterCount); + } + + /** + * @brief Get RTC_TAMPx filter count + * @rmtoll TAMPCR TAMPFLT LL_RTC_TAMPER_GetFilterCount + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TAMPER_FILTER_DISABLE + * @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE + * @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE + * @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE + */ + __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPFLT)); + } + #endif /* RTC_TAMPCR_TAMPFLT */ + + #if defined(RTC_TAMPCR_TAMPFREQ) + /** + * @brief Set Tamper sampling frequency + * @rmtoll TAMPCR TAMPFREQ LL_RTC_TAMPER_SetSamplingFreq + * @param RTCx RTC Instance + * @param SamplingFreq This parameter can be one of the following values: + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256 + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef *RTCx, uint32_t SamplingFreq) + { + MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPFREQ, SamplingFreq); + } + + /** + * @brief Get Tamper sampling frequency + * @rmtoll TAMPCR TAMPFREQ LL_RTC_TAMPER_GetSamplingFreq + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512 + * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256 + */ + __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPFREQ)); + } + #endif /* RTC_TAMPCR_TAMPFREQ */ + + /** + * @brief Enable Active level for Tamper input + * @rmtoll TAMPCR TAMP1TRG LL_RTC_TAMPER_EnableActiveLevel\n + * TAMPCR TAMP2TRG LL_RTC_TAMPER_EnableActiveLevel\n + * TAMPCR TAMP3TRG LL_RTC_TAMPER_EnableActiveLevel + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper) + { + SET_BIT(RTCx->TAMPCR, Tamper); + } + + /** + * @brief Disable Active level for Tamper input + * @rmtoll TAMPCR TAMP1TRG LL_RTC_TAMPER_DisableActiveLevel\n + * TAMPCR TAMP2TRG LL_RTC_TAMPER_DisableActiveLevel\n + * TAMPCR TAMP3TRG LL_RTC_TAMPER_DisableActiveLevel + * @param RTCx RTC Instance + * @param Tamper This parameter can be a combination of the following values: + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 + * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 + * + * @retval None + */ + __STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper) + { + CLEAR_BIT(RTCx->TAMPCR, Tamper); + } + + /** + * @} + */ + + #if defined(RTC_WAKEUP_SUPPORT) + /** @defgroup RTC_LL_EF_Wakeup Wakeup + * @{ + */ + + /** + * @brief Enable Wakeup timer + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR WUTE LL_RTC_WAKEUP_Enable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_Enable(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_WUTE); + } + + /** + * @brief Disable Wakeup timer + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR WUTE LL_RTC_WAKEUP_Disable + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_Disable(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_WUTE); + } + + /** + * @brief Check if Wakeup timer is enabled or not + * @rmtoll CR WUTE LL_RTC_WAKEUP_IsEnabled + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)); + } + + /** + * @brief Select Wakeup clock + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1 + * @rmtoll CR WUCKSEL LL_RTC_WAKEUP_SetClock + * @param RTCx RTC Instance + * @param WakeupClock This parameter can be one of the following values: + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_16 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_8 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_4 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_2 + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_SetClock(RTC_TypeDef *RTCx, uint32_t WakeupClock) + { + MODIFY_REG(RTCx->CR, RTC_CR_WUCKSEL, WakeupClock); + } + + /** + * @brief Get Wakeup clock + * @rmtoll CR WUCKSEL LL_RTC_WAKEUP_GetClock + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_16 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_8 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_4 + * @arg @ref LL_RTC_WAKEUPCLOCK_DIV_2 + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE + * @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT + */ + __STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_WUCKSEL)); + } + + /** + * @brief Set Wakeup auto-reload value + * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR + * @rmtoll WUTR WUT LL_RTC_WAKEUP_SetAutoReload + * @param RTCx RTC Instance + * @param Value Value between Min_Data=0x00 and Max_Data=0xFFFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_WAKEUP_SetAutoReload(RTC_TypeDef *RTCx, uint32_t Value) + { + MODIFY_REG(RTCx->WUTR, RTC_WUTR_WUT, Value); + } + + /** + * @brief Get Wakeup auto-reload value + * @rmtoll WUTR WUT LL_RTC_WAKEUP_GetAutoReload + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF + */ + __STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->WUTR, RTC_WUTR_WUT)); + } + + /** + * @} + */ + #endif /* RTC_WAKEUP_SUPPORT */ + + #if defined(RTC_BACKUP_SUPPORT) + /** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers + * @{ + */ + + /** + * @brief Writes a data in a specified RTC Backup data register. + * @rmtoll BKPxR BKP LL_RTC_BAK_SetRegister + * @param RTCx RTC Instance + * @param BackupRegister This parameter can be one of the following values: + * @arg @ref LL_RTC_BKP_DR0 + * @arg @ref LL_RTC_BKP_DR1 + * @arg @ref LL_RTC_BKP_DR2 + * @arg @ref LL_RTC_BKP_DR3 + * @arg @ref LL_RTC_BKP_DR4 + * @arg @ref LL_RTC_BKP_DR5 + * @arg @ref LL_RTC_BKP_DR6 + * @arg @ref LL_RTC_BKP_DR7 + * @arg @ref LL_RTC_BKP_DR8 + * @arg @ref LL_RTC_BKP_DR9 + * @arg @ref LL_RTC_BKP_DR10 + * @arg @ref LL_RTC_BKP_DR11 + * @arg @ref LL_RTC_BKP_DR12 + * @arg @ref LL_RTC_BKP_DR13 + * @arg @ref LL_RTC_BKP_DR14 + * @arg @ref LL_RTC_BKP_DR15 + * @arg @ref LL_RTC_BKP_DR16 + * @arg @ref LL_RTC_BKP_DR17 + * @arg @ref LL_RTC_BKP_DR18 + * @arg @ref LL_RTC_BKP_DR19 + * @arg @ref LL_RTC_BKP_DR20 + * @arg @ref LL_RTC_BKP_DR21 + * @arg @ref LL_RTC_BKP_DR22 + * @arg @ref LL_RTC_BKP_DR23 + * @arg @ref LL_RTC_BKP_DR24 + * @arg @ref LL_RTC_BKP_DR25 + * @arg @ref LL_RTC_BKP_DR26 + * @arg @ref LL_RTC_BKP_DR27 + * @arg @ref LL_RTC_BKP_DR28 + * @arg @ref LL_RTC_BKP_DR29 + * @arg @ref LL_RTC_BKP_DR30 + * @arg @ref LL_RTC_BKP_DR31 + * @param Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF + * @retval None + */ + __STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data) + { + register uint32_t tmp = 0U; + + tmp = (uint32_t)(&(RTCx->BKP0R)); + tmp += (BackupRegister * 4U); + + /* Write the specified register */ + *(__IO uint32_t *)tmp = (uint32_t)Data; + } + + /** + * @brief Reads data from the specified RTC Backup data Register. + * @rmtoll BKPxR BKP LL_RTC_BAK_GetRegister + * @param RTCx RTC Instance + * @param BackupRegister This parameter can be one of the following values: + * @arg @ref LL_RTC_BKP_DR0 + * @arg @ref LL_RTC_BKP_DR1 + * @arg @ref LL_RTC_BKP_DR2 + * @arg @ref LL_RTC_BKP_DR3 + * @arg @ref LL_RTC_BKP_DR4 + * @arg @ref LL_RTC_BKP_DR5 + * @arg @ref LL_RTC_BKP_DR6 + * @arg @ref LL_RTC_BKP_DR7 + * @arg @ref LL_RTC_BKP_DR8 + * @arg @ref LL_RTC_BKP_DR9 + * @arg @ref LL_RTC_BKP_DR10 + * @arg @ref LL_RTC_BKP_DR11 + * @arg @ref LL_RTC_BKP_DR12 + * @arg @ref LL_RTC_BKP_DR13 + * @arg @ref LL_RTC_BKP_DR14 + * @arg @ref LL_RTC_BKP_DR15 + * @arg @ref LL_RTC_BKP_DR16 + * @arg @ref LL_RTC_BKP_DR17 + * @arg @ref LL_RTC_BKP_DR18 + * @arg @ref LL_RTC_BKP_DR19 + * @arg @ref LL_RTC_BKP_DR20 + * @arg @ref LL_RTC_BKP_DR21 + * @arg @ref LL_RTC_BKP_DR22 + * @arg @ref LL_RTC_BKP_DR23 + * @arg @ref LL_RTC_BKP_DR24 + * @arg @ref LL_RTC_BKP_DR25 + * @arg @ref LL_RTC_BKP_DR26 + * @arg @ref LL_RTC_BKP_DR27 + * @arg @ref LL_RTC_BKP_DR28 + * @arg @ref LL_RTC_BKP_DR29 + * @arg @ref LL_RTC_BKP_DR30 + * @arg @ref LL_RTC_BKP_DR31 + * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF + */ + __STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister) + { + register uint32_t tmp = 0U; + + tmp = (uint32_t)(&(RTCx->BKP0R)); + tmp += (BackupRegister * 4U); + + /* Read the specified register */ + return (*(__IO uint32_t *)tmp); + } + + /** + * @} + */ + #endif /* RTC_BACKUP_SUPPORT */ + + /** @defgroup RTC_LL_EF_Calibration Calibration + * @{ + */ + + /** + * @brief Set Calibration output frequency (1 Hz or 512 Hz) + * @note Bits are write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR COE LL_RTC_CAL_SetOutputFreq\n + * CR COSEL LL_RTC_CAL_SetOutputFreq + * @param RTCx RTC Instance + * @param Frequency This parameter can be one of the following values: + * @arg @ref LL_RTC_CALIB_OUTPUT_NONE + * @arg @ref LL_RTC_CALIB_OUTPUT_1HZ + * @arg @ref LL_RTC_CALIB_OUTPUT_512HZ + * @retval None + */ + __STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Frequency) + { + MODIFY_REG(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL, Frequency); + } + + /** + * @brief Get Calibration output frequency (1 Hz or 512 Hz) + * @rmtoll CR COE LL_RTC_CAL_GetOutputFreq\n + * CR COSEL LL_RTC_CAL_GetOutputFreq + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_CALIB_OUTPUT_NONE + * @arg @ref LL_RTC_CALIB_OUTPUT_1HZ + * @arg @ref LL_RTC_CALIB_OUTPUT_512HZ + */ + __STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL)); + } + + /** + * @brief Insert or not One RTCCLK pulse every 2exp11 pulses (frequency increased by 488.5 ppm) + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR + * @rmtoll CALR CALP LL_RTC_CAL_SetPulse + * @param RTCx RTC Instance + * @param Pulse This parameter can be one of the following values: + * @arg @ref LL_RTC_CALIB_INSERTPULSE_NONE + * @arg @ref LL_RTC_CALIB_INSERTPULSE_SET + * @retval None + */ + __STATIC_INLINE void LL_RTC_CAL_SetPulse(RTC_TypeDef *RTCx, uint32_t Pulse) + { + MODIFY_REG(RTCx->CALR, RTC_CALR_CALP, Pulse); + } + + /** + * @brief Check if one RTCCLK has been inserted or not every 2exp11 pulses (frequency increased by 488.5 ppm) + * @rmtoll CALR CALP LL_RTC_CAL_IsPulseInserted + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CALR, RTC_CALR_CALP) == (RTC_CALR_CALP)); + } + + /** + * @brief Set the calibration cycle period + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR + * @rmtoll CALR CALW8 LL_RTC_CAL_SetPeriod\n + * CALR CALW16 LL_RTC_CAL_SetPeriod + * @param RTCx RTC Instance + * @param Period This parameter can be one of the following values: + * @arg @ref LL_RTC_CALIB_PERIOD_32SEC + * @arg @ref LL_RTC_CALIB_PERIOD_16SEC + * @arg @ref LL_RTC_CALIB_PERIOD_8SEC + * @retval None + */ + __STATIC_INLINE void LL_RTC_CAL_SetPeriod(RTC_TypeDef *RTCx, uint32_t Period) + { + MODIFY_REG(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16, Period); + } + + /** + * @brief Get the calibration cycle period + * @rmtoll CALR CALW8 LL_RTC_CAL_GetPeriod\n + * CALR CALW16 LL_RTC_CAL_GetPeriod + * @param RTCx RTC Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_RTC_CALIB_PERIOD_32SEC + * @arg @ref LL_RTC_CALIB_PERIOD_16SEC + * @arg @ref LL_RTC_CALIB_PERIOD_8SEC + */ + __STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16)); + } + + /** + * @brief Set Calibration minus + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR + * @rmtoll CALR CALM LL_RTC_CAL_SetMinus + * @param RTCx RTC Instance + * @param CalibMinus Value between Min_Data=0x00 and Max_Data=0x1FF + * @retval None + */ + __STATIC_INLINE void LL_RTC_CAL_SetMinus(RTC_TypeDef *RTCx, uint32_t CalibMinus) + { + MODIFY_REG(RTCx->CALR, RTC_CALR_CALM, CalibMinus); + } + + /** + * @brief Get Calibration minus + * @rmtoll CALR CALM LL_RTC_CAL_GetMinus + * @param RTCx RTC Instance + * @retval Value between Min_Data=0x00 and Max_Data= 0x1FF + */ + __STATIC_INLINE uint32_t LL_RTC_CAL_GetMinus(RTC_TypeDef *RTCx) + { + return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALM)); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + + /** + * @brief Get Internal Time-stamp flag + * @rmtoll ISR ITSF LL_RTC_IsActiveFlag_ITS + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITS(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_ITSF) == (RTC_ISR_ITSF)); + } + + /** + * @brief Get Recalibration pending Flag + * @rmtoll ISR RECALPF LL_RTC_IsActiveFlag_RECALP + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RECALP(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_RECALPF) == (RTC_ISR_RECALPF)); + } + + #if defined(RTC_TAMPER3_SUPPORT) + /** + * @brief Get RTC_TAMP3 detection flag + * @rmtoll ISR TAMP3F LL_RTC_IsActiveFlag_TAMP3 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP3F) == (RTC_ISR_TAMP3F)); + } + #endif /* RTC_TAMPER3_SUPPORT */ + + #if defined(RTC_TAMPER2_SUPPORT) + /** + * @brief Get RTC_TAMP2 detection flag + * @rmtoll ISR TAMP2F LL_RTC_IsActiveFlag_TAMP2 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP2F) == (RTC_ISR_TAMP2F)); + } + #endif /* RTC_TAMPER2_SUPPORT */ + + #if defined(RTC_TAMPER1_SUPPORT) + /** + * @brief Get RTC_TAMP1 detection flag + * @rmtoll ISR TAMP1F LL_RTC_IsActiveFlag_TAMP1 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F)); + } + #endif /* RTC_TAMPER1_SUPPORT */ + + /** + * @brief Get Time-stamp overflow flag + * @rmtoll ISR TSOVF LL_RTC_IsActiveFlag_TSOV + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_TSOVF) == (RTC_ISR_TSOVF)); + } + + /** + * @brief Get Time-stamp flag + * @rmtoll ISR TSF LL_RTC_IsActiveFlag_TS + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF)); + } + + #if defined(RTC_WAKEUP_SUPPORT) + /** + * @brief Get Wakeup timer flag + * @rmtoll ISR WUTF LL_RTC_IsActiveFlag_WUT + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF)); + } + #endif /* RTC_WAKEUP_SUPPORT */ + + /** + * @brief Get Alarm B flag + * @rmtoll ISR ALRBF LL_RTC_IsActiveFlag_ALRB + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBF) == (RTC_ISR_ALRBF)); + } + + /** + * @brief Get Alarm A flag + * @rmtoll ISR ALRAF LL_RTC_IsActiveFlag_ALRA + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF)); + } + + /** + * @brief Clear Internal Time-stamp flag + * @rmtoll ISR ITSF LL_RTC_ClearFlag_ITS + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_ITS(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_ITSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + #if defined(RTC_TAMPER3_SUPPORT) + /** + * @brief Clear RTC_TAMP3 detection flag + * @rmtoll ISR TAMP3F LL_RTC_ClearFlag_TAMP3 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_TAMP3(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP3F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + #endif /* RTC_TAMPER3_SUPPORT */ + + #if defined(RTC_TAMPER2_SUPPORT) + /** + * @brief Clear RTC_TAMP2 detection flag + * @rmtoll ISR TAMP2F LL_RTC_ClearFlag_TAMP2 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP2F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + #endif /* RTC_TAMPER2_SUPPORT */ + + #if defined(RTC_TAMPER1_SUPPORT) + /** + * @brief Clear RTC_TAMP1 detection flag + * @rmtoll ISR TAMP1F LL_RTC_ClearFlag_TAMP1 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP1F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + #endif /* RTC_TAMPER1_SUPPORT */ + + /** + * @brief Clear Time-stamp overflow flag + * @rmtoll ISR TSOVF LL_RTC_ClearFlag_TSOV + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_TSOV(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSOVF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + /** + * @brief Clear Time-stamp flag + * @rmtoll ISR TSF LL_RTC_ClearFlag_TS + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_TS(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + #if defined(RTC_WAKEUP_SUPPORT) + /** + * @brief Clear Wakeup timer flag + * @rmtoll ISR WUTF LL_RTC_ClearFlag_WUT + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_WUT(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_WUTF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + #endif /* RTC_WAKEUP_SUPPORT */ + + /** + * @brief Clear Alarm B flag + * @rmtoll ISR ALRBF LL_RTC_ClearFlag_ALRB + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_ALRB(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRBF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + /** + * @brief Clear Alarm A flag + * @rmtoll ISR ALRAF LL_RTC_ClearFlag_ALRA + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_ALRA(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRAF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + /** + * @brief Get Initialization flag + * @rmtoll ISR INITF LL_RTC_IsActiveFlag_INIT + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_INITF) == (RTC_ISR_INITF)); + } + + /** + * @brief Get Registers synchronization flag + * @rmtoll ISR RSF LL_RTC_IsActiveFlag_RS + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_RSF) == (RTC_ISR_RSF)); + } + + /** + * @brief Clear Registers synchronization flag + * @rmtoll ISR RSF LL_RTC_ClearFlag_RS + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx) + { + WRITE_REG(RTCx->ISR, (~((RTC_ISR_RSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT))); + } + + /** + * @brief Get Initialization status flag + * @rmtoll ISR INITS LL_RTC_IsActiveFlag_INITS + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS)); + } + + /** + * @brief Get Shift operation pending flag + * @rmtoll ISR SHPF LL_RTC_IsActiveFlag_SHP + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_SHPF) == (RTC_ISR_SHPF)); + } + + #if defined(RTC_WAKEUP_SUPPORT) + /** + * @brief Get Wakeup timer write flag + * @rmtoll ISR WUTWF LL_RTC_IsActiveFlag_WUTW + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF)); + } + #endif /* RTC_WAKEUP_SUPPORT */ + + /** + * @brief Get Alarm B write flag + * @rmtoll ISR ALRBWF LL_RTC_IsActiveFlag_ALRBW + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBWF) == (RTC_ISR_ALRBWF)); + } + + /** + * @brief Get Alarm A write flag + * @rmtoll ISR ALRAWF LL_RTC_IsActiveFlag_ALRAW + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAWF) == (RTC_ISR_ALRAWF)); + } + + /** + * @} + */ + + /** @defgroup RTC_LL_EF_IT_Management IT_Management + * @{ + */ + + /** + * @brief Enable Time-stamp interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR TSIE LL_RTC_EnableIT_TS + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_TS(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_TSIE); + } + + /** + * @brief Disable Time-stamp interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR TSIE LL_RTC_DisableIT_TS + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_TS(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_TSIE); + } + + #if defined(RTC_WAKEUP_SUPPORT) + /** + * @brief Enable Wakeup timer interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR WUTIE LL_RTC_EnableIT_WUT + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_WUT(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_WUTIE); + } + + /** + * @brief Disable Wakeup timer interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR WUTIE LL_RTC_DisableIT_WUT + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_WUT(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_WUTIE); + } + #endif /* RTC_WAKEUP_SUPPORT */ + + /** + * @brief Enable Alarm B interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRBIE LL_RTC_EnableIT_ALRB + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_ALRB(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ALRBIE); + } + + /** + * @brief Disable Alarm B interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRBIE LL_RTC_DisableIT_ALRB + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_ALRB(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_ALRBIE); + } + + /** + * @brief Enable Alarm A interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRAIE LL_RTC_EnableIT_ALRA + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_ALRA(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->CR, RTC_CR_ALRAIE); + } + + /** + * @brief Disable Alarm A interrupt + * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. + * @rmtoll CR ALRAIE LL_RTC_DisableIT_ALRA + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_ALRA(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->CR, RTC_CR_ALRAIE); + } + + #if defined(RTC_TAMPER3_SUPPORT) + /** + * @brief Enable Tamper 3 interrupt + * @rmtoll TAMPCR TAMP3IE LL_RTC_EnableIT_TAMP3 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_TAMP3(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP3IE); + } + + /** + * @brief Disable Tamper 3 interrupt + * @rmtoll TAMPCR TAMP3IE LL_RTC_DisableIT_TAMP3 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_TAMP3(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP3IE); + } + #endif /* RTC_TAMPER3_SUPPORT */ + + #if defined(RTC_TAMPER2_SUPPORT) + /** + * @brief Enable Tamper 2 interrupt + * @rmtoll TAMPCR TAMP2IE LL_RTC_EnableIT_TAMP2 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_TAMP2(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP2IE); + } + + /** + * @brief Disable Tamper 2 interrupt + * @rmtoll TAMPCR TAMP2IE LL_RTC_DisableIT_TAMP2 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_TAMP2(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP2IE); + } + #endif /* RTC_TAMPER2_SUPPORT */ + + #if defined(RTC_TAMPER1_SUPPORT) + /** + * @brief Enable Tamper 1 interrupt + * @rmtoll TAMPCR TAMP1IE LL_RTC_EnableIT_TAMP1 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_TAMP1(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP1IE); + } + + /** + * @brief Disable Tamper 1 interrupt + * @rmtoll TAMPCR TAMP1IE LL_RTC_DisableIT_TAMP1 + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_TAMP1(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP1IE); + } + #endif /* RTC_TAMPER1_SUPPORT */ + + /** + * @brief Enable all Tamper Interrupt + * @rmtoll TAMPCR TAMPIE LL_RTC_EnableIT_TAMP + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_EnableIT_TAMP(RTC_TypeDef *RTCx) + { + SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPIE); + } + + /** + * @brief Disable all Tamper Interrupt + * @rmtoll TAMPCR TAMPIE LL_RTC_DisableIT_TAMP + * @param RTCx RTC Instance + * @retval None + */ + __STATIC_INLINE void LL_RTC_DisableIT_TAMP(RTC_TypeDef *RTCx) + { + CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPIE); + } + + /** + * @brief Check if Time-stamp interrupt is enabled or not + * @rmtoll CR TSIE LL_RTC_IsEnabledIT_TS + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE)); + } + + #if defined(RTC_WAKEUP_SUPPORT) + /** + * @brief Check if Wakeup timer interrupt is enabled or not + * @rmtoll CR WUTIE LL_RTC_IsEnabledIT_WUT + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE)); + } + #endif /* RTC_WAKEUP_SUPPORT */ + + /** + * @brief Check if Alarm B interrupt is enabled or not + * @rmtoll CR ALRBIE LL_RTC_IsEnabledIT_ALRB + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE)); + } + + /** + * @brief Check if Alarm A interrupt is enabled or not + * @rmtoll CR ALRAIE LL_RTC_IsEnabledIT_ALRA + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE)); + } + + #if defined(RTC_TAMPER3_SUPPORT) + /** + * @brief Check if Tamper 3 interrupt is enabled or not + * @rmtoll TAMPCR TAMP3IE LL_RTC_IsEnabledIT_TAMP3 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP3(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->TAMPCR, + RTC_TAMPCR_TAMP3IE) == (RTC_TAMPCR_TAMP3IE)); + } + #endif /* RTC_TAMPER3_SUPPORT */ + + #if defined(RTC_TAMPER2_SUPPORT) + /** + * @brief Check if Tamper 2 interrupt is enabled or not + * @rmtoll TAMPCR TAMP2IE LL_RTC_IsEnabledIT_TAMP2 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP2(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->TAMPCR, + RTC_TAMPCR_TAMP2IE) == (RTC_TAMPCR_TAMP2IE)); + + } + #endif /* RTC_TAMPER2_SUPPORT */ + + #if defined(RTC_TAMPER1_SUPPORT) + /** + * @brief Check if Tamper 1 interrupt is enabled or not + * @rmtoll TAMPCR TAMP1IE LL_RTC_IsEnabledIT_TAMP1 + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP1(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->TAMPCR, + RTC_TAMPCR_TAMP1IE) == (RTC_TAMPCR_TAMP1IE)); + } + #endif /* RTC_TAMPER1_SUPPORT */ + + /** + * @brief Check if all the TAMPER interrupts are enabled or not + * @rmtoll TAMPCR TAMPIE LL_RTC_IsEnabledIT_TAMP + * @param RTCx RTC Instance + * @retval State of bit (1 or 0). + */ + __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(RTC_TypeDef *RTCx) + { + return (READ_BIT(RTCx->TAMPCR, + RTC_TAMPCR_TAMPIE) == (RTC_TAMPCR_TAMPIE)); + } + + /** + * @} + */ + + #if defined(USE_FULL_LL_DRIVER) + /** @defgroup RTC_LL_EF_Init Initialization and de-initialization functions + * @{ + */ + + ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx); + ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct); + void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct); + ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct); + void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct); + ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct); + void LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct); + ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct); + ErrorStatus LL_RTC_ALMB_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct); + void LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct); + void LL_RTC_ALMB_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct); + ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx); + ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx); + ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx); + + /** + * @} + */ + #endif /* USE_FULL_LL_DRIVER */ + + /** + * @} + */ + + /** + * @} + */ + + #endif /* defined(RTC) */ + + /** + * @} + */ + + #ifdef __cplusplus + } + #endif + + #endif /* __STM32L4xx_LL_RTC_H */ diff --git a/RealOne/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c b/RealOne/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c new file mode 100644 index 0000000..794c7e0 --- /dev/null +++ b/RealOne/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rtc.c @@ -0,0 +1,895 @@ + + /** + ****************************************************************************** + * @file stm32l4xx_ll_rtc.c + * @author MCD Application Team + * @brief RTC LL module driver. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + #if defined(USE_FULL_LL_DRIVER) + + /* Includes ------------------------------------------------------------------*/ + #include "stm32l4xx_ll_rtc.h" + #include "stm32l4xx_ll_cortex.h" + #ifdef USE_FULL_ASSERT + #include "stm32_assert.h" + #else + #define assert_param(expr) ((void)0U) + #endif + + /** @addtogroup STM32L4xx_LL_Driver + * @{ + */ + + #if defined(RTC) + + /** @addtogroup RTC_LL + * @{ + */ + + /* Private types -------------------------------------------------------------*/ + /* Private variables ---------------------------------------------------------*/ + /* Private constants ---------------------------------------------------------*/ + /** @addtogroup RTC_LL_Private_Constants + * @{ + */ + /* Default values used for prescaler */ + #define RTC_ASYNCH_PRESC_DEFAULT 0x0000007FU + #define RTC_SYNCH_PRESC_DEFAULT 0x000000FFU + + /* Values used for timeout */ + #define RTC_INITMODE_TIMEOUT 1000U /* 1s when tick set to 1ms */ + #define RTC_SYNCHRO_TIMEOUT 1000U /* 1s when tick set to 1ms */ + /** + * @} + */ + + /* Private macros ------------------------------------------------------------*/ + /** @addtogroup RTC_LL_Private_Macros + * @{ + */ + + #define IS_LL_RTC_HOURFORMAT(__VALUE__) (((__VALUE__) == LL_RTC_HOURFORMAT_24HOUR) \ + || ((__VALUE__) == LL_RTC_HOURFORMAT_AMPM)) + + #define IS_LL_RTC_ASYNCH_PREDIV(__VALUE__) ((__VALUE__) <= 0x7FU) + + #define IS_LL_RTC_SYNCH_PREDIV(__VALUE__) ((__VALUE__) <= 0x7FFFU) + + #define IS_LL_RTC_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_FORMAT_BIN) \ + || ((__VALUE__) == LL_RTC_FORMAT_BCD)) + + #define IS_LL_RTC_TIME_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_TIME_FORMAT_AM_OR_24) \ + || ((__VALUE__) == LL_RTC_TIME_FORMAT_PM)) + + #define IS_LL_RTC_HOUR12(__HOUR__) (((__HOUR__) > 0U) && ((__HOUR__) <= 12U)) + #define IS_LL_RTC_HOUR24(__HOUR__) ((__HOUR__) <= 23U) + #define IS_LL_RTC_MINUTES(__MINUTES__) ((__MINUTES__) <= 59U) + #define IS_LL_RTC_SECONDS(__SECONDS__) ((__SECONDS__) <= 59U) + + #define IS_LL_RTC_WEEKDAY(__VALUE__) (((__VALUE__) == LL_RTC_WEEKDAY_MONDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_TUESDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_WEDNESDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_THURSDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_FRIDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_SATURDAY) \ + || ((__VALUE__) == LL_RTC_WEEKDAY_SUNDAY)) + + #define IS_LL_RTC_DAY(__DAY__) (((__DAY__) >= 1U) && ((__DAY__) <= 31U)) + + #define IS_LL_RTC_MONTH(__VALUE__) (((__VALUE__) == LL_RTC_MONTH_JANUARY) \ + || ((__VALUE__) == LL_RTC_MONTH_FEBRUARY) \ + || ((__VALUE__) == LL_RTC_MONTH_MARCH) \ + || ((__VALUE__) == LL_RTC_MONTH_APRIL) \ + || ((__VALUE__) == LL_RTC_MONTH_MAY) \ + || ((__VALUE__) == LL_RTC_MONTH_JUNE) \ + || ((__VALUE__) == LL_RTC_MONTH_JULY) \ + || ((__VALUE__) == LL_RTC_MONTH_AUGUST) \ + || ((__VALUE__) == LL_RTC_MONTH_SEPTEMBER) \ + || ((__VALUE__) == LL_RTC_MONTH_OCTOBER) \ + || ((__VALUE__) == LL_RTC_MONTH_NOVEMBER) \ + || ((__VALUE__) == LL_RTC_MONTH_DECEMBER)) + + #define IS_LL_RTC_YEAR(__YEAR__) ((__YEAR__) <= 99U) + + #define IS_LL_RTC_ALMA_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMA_MASK_NONE) \ + || ((__VALUE__) == LL_RTC_ALMA_MASK_DATEWEEKDAY) \ + || ((__VALUE__) == LL_RTC_ALMA_MASK_HOURS) \ + || ((__VALUE__) == LL_RTC_ALMA_MASK_MINUTES) \ + || ((__VALUE__) == LL_RTC_ALMA_MASK_SECONDS) \ + || ((__VALUE__) == LL_RTC_ALMA_MASK_ALL)) + + #define IS_LL_RTC_ALMB_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMB_MASK_NONE) \ + || ((__VALUE__) == LL_RTC_ALMB_MASK_DATEWEEKDAY) \ + || ((__VALUE__) == LL_RTC_ALMB_MASK_HOURS) \ + || ((__VALUE__) == LL_RTC_ALMB_MASK_MINUTES) \ + || ((__VALUE__) == LL_RTC_ALMB_MASK_SECONDS) \ + || ((__VALUE__) == LL_RTC_ALMB_MASK_ALL)) + + + #define IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) || \ + ((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY)) + + #define IS_LL_RTC_ALMB_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) || \ + ((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY)) + + + /** + * @} + */ + /* Private function prototypes -----------------------------------------------*/ + /* Exported functions --------------------------------------------------------*/ + /** @addtogroup RTC_LL_Exported_Functions + * @{ + */ + + /** @addtogroup RTC_LL_EF_Init + * @{ + */ + + /** + * @brief De-Initializes the RTC registers to their default reset values. + * @note This function doesn't reset the RTC Clock source and RTC Backup Data + * registers. + * @param RTCx RTC Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC registers are de-initialized + * - ERROR: RTC registers are not de-initialized + */ + ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx) + { + ErrorStatus status = ERROR; + + /* Check the parameter */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Set Initialization mode */ + if (LL_RTC_EnterInitMode(RTCx) != ERROR) + { + /* Reset TR, DR and CR registers */ + LL_RTC_WriteReg(RTCx, TR, 0x00000000U); + #if defined(RTC_WAKEUP_SUPPORT) + LL_RTC_WriteReg(RTCx, WUTR, RTC_WUTR_WUT); + #endif /* RTC_WAKEUP_SUPPORT */ + LL_RTC_WriteReg(RTCx, DR , (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); + /* Reset All CR bits except CR[2:0] */ + #if defined(RTC_WAKEUP_SUPPORT) + LL_RTC_WriteReg(RTCx, CR, (LL_RTC_ReadReg(RTCx, CR) & RTC_CR_WUCKSEL)); + #else + LL_RTC_WriteReg(RTCx, CR, 0x00000000U); + #endif /* RTC_WAKEUP_SUPPORT */ + LL_RTC_WriteReg(RTCx, PRER, (RTC_PRER_PREDIV_A | RTC_SYNCH_PRESC_DEFAULT)); + LL_RTC_WriteReg(RTCx, ALRMAR, 0x00000000U); + LL_RTC_WriteReg(RTCx, ALRMBR, 0x00000000U); + LL_RTC_WriteReg(RTCx, SHIFTR, 0x00000000U); + LL_RTC_WriteReg(RTCx, CALR, 0x00000000U); + LL_RTC_WriteReg(RTCx, ALRMASSR, 0x00000000U); + LL_RTC_WriteReg(RTCx, ALRMBSSR, 0x00000000U); + + /* Reset ISR register and exit initialization mode */ + LL_RTC_WriteReg(RTCx, ISR, 0x00000000U); + + /* Reset Tamper and alternate functions configuration register */ + LL_RTC_WriteReg(RTCx, TAMPCR, 0x00000000U); + + /* Reset Option register */ + LL_RTC_WriteReg(RTCx, OR, 0x00000000U); + + /* Wait till the RTC RSF flag is set */ + status = LL_RTC_WaitForSynchro(RTCx); + } + + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return status; + } + + /** + * @brief Initializes the RTC registers according to the specified parameters + * in RTC_InitStruct. + * @param RTCx RTC Instance + * @param RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure that contains + * the configuration information for the RTC peripheral. + * @note The RTC Prescaler register is write protected and can be written in + * initialization mode only. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC registers are initialized + * - ERROR: RTC registers are not initialized + */ + ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct) + { + ErrorStatus status = ERROR; + + /* Check the parameters */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + assert_param(IS_LL_RTC_HOURFORMAT(RTC_InitStruct->HourFormat)); + assert_param(IS_LL_RTC_ASYNCH_PREDIV(RTC_InitStruct->AsynchPrescaler)); + assert_param(IS_LL_RTC_SYNCH_PREDIV(RTC_InitStruct->SynchPrescaler)); + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Set Initialization mode */ + if (LL_RTC_EnterInitMode(RTCx) != ERROR) + { + /* Set Hour Format */ + LL_RTC_SetHourFormat(RTCx, RTC_InitStruct->HourFormat); + + /* Configure Synchronous and Asynchronous prescaler factor */ + LL_RTC_SetSynchPrescaler(RTCx, RTC_InitStruct->SynchPrescaler); + LL_RTC_SetAsynchPrescaler(RTCx, RTC_InitStruct->AsynchPrescaler); + + /* Exit Initialization mode */ + LL_RTC_DisableInitMode(RTCx); + + status = SUCCESS; + } + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return status; + } + + /** + * @brief Set each @ref LL_RTC_InitTypeDef field to default value. + * @param RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure which will be initialized. + * @retval None + */ + void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct) + { + /* Set RTC_InitStruct fields to default values */ + RTC_InitStruct->HourFormat = LL_RTC_HOURFORMAT_24HOUR; + RTC_InitStruct->AsynchPrescaler = RTC_ASYNCH_PRESC_DEFAULT; + RTC_InitStruct->SynchPrescaler = RTC_SYNCH_PRESC_DEFAULT; + } + + /** + * @brief Set the RTC current time. + * @param RTCx RTC Instance + * @param RTC_Format This parameter can be one of the following values: + * @arg @ref LL_RTC_FORMAT_BIN + * @arg @ref LL_RTC_FORMAT_BCD + * @param RTC_TimeStruct pointer to a RTC_TimeTypeDef structure that contains + * the time configuration information for the RTC. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC Time register is configured + * - ERROR: RTC Time register is not configured + */ + ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct) + { + ErrorStatus status = ERROR; + + /* Check the parameters */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + assert_param(IS_LL_RTC_FORMAT(RTC_Format)); + + if (RTC_Format == LL_RTC_FORMAT_BIN) + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(RTC_TimeStruct->Hours)); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat)); + } + else + { + RTC_TimeStruct->TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(RTC_TimeStruct->Hours)); + } + assert_param(IS_LL_RTC_MINUTES(RTC_TimeStruct->Minutes)); + assert_param(IS_LL_RTC_SECONDS(RTC_TimeStruct->Seconds)); + } + else + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours))); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat)); + } + else + { + RTC_TimeStruct->TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours))); + } + assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Minutes))); + assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Seconds))); + } + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Set Initialization mode */ + if (LL_RTC_EnterInitMode(RTCx) != ERROR) + { + /* Check the input parameters format */ + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, RTC_TimeStruct->Hours, + RTC_TimeStruct->Minutes, RTC_TimeStruct->Seconds); + } + else + { + LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Hours), + __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Minutes), + __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Seconds)); + } + + /* Exit Initialization mode */ + LL_RTC_DisableInitMode(RTC); + + /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ + if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U) + { + status = LL_RTC_WaitForSynchro(RTCx); + } + else + { + status = SUCCESS; + } + } + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return status; + } + + /** + * @brief Set each @ref LL_RTC_TimeTypeDef field to default value (Time = 00h:00min:00sec). + * @param RTC_TimeStruct pointer to a @ref LL_RTC_TimeTypeDef structure which will be initialized. + * @retval None + */ + void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct) + { + /* Time = 00h:00min:00sec */ + RTC_TimeStruct->TimeFormat = LL_RTC_TIME_FORMAT_AM_OR_24; + RTC_TimeStruct->Hours = 0U; + RTC_TimeStruct->Minutes = 0U; + RTC_TimeStruct->Seconds = 0U; + } + + /** + * @brief Set the RTC current date. + * @param RTCx RTC Instance + * @param RTC_Format This parameter can be one of the following values: + * @arg @ref LL_RTC_FORMAT_BIN + * @arg @ref LL_RTC_FORMAT_BCD + * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that contains + * the date configuration information for the RTC. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC Day register is configured + * - ERROR: RTC Day register is not configured + */ + ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct) + { + ErrorStatus status = ERROR; + + /* Check the parameters */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + assert_param(IS_LL_RTC_FORMAT(RTC_Format)); + + if ((RTC_Format == LL_RTC_FORMAT_BIN) && ((RTC_DateStruct->Month & 0x10U) == 0x10U)) + { + RTC_DateStruct->Month = (RTC_DateStruct->Month & (uint32_t)~(0x10U)) + 0x0AU; + } + if (RTC_Format == LL_RTC_FORMAT_BIN) + { + assert_param(IS_LL_RTC_YEAR(RTC_DateStruct->Year)); + assert_param(IS_LL_RTC_MONTH(RTC_DateStruct->Month)); + assert_param(IS_LL_RTC_DAY(RTC_DateStruct->Day)); + } + else + { + assert_param(IS_LL_RTC_YEAR(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Year))); + assert_param(IS_LL_RTC_MONTH(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Month))); + assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Day))); + } + assert_param(IS_LL_RTC_WEEKDAY(RTC_DateStruct->WeekDay)); + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Set Initialization mode */ + if (LL_RTC_EnterInitMode(RTCx) != ERROR) + { + /* Check the input parameters format */ + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, RTC_DateStruct->Day, RTC_DateStruct->Month, RTC_DateStruct->Year); + } + else + { + LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Day), + __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Month), __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Year)); + } + + /* Exit Initialization mode */ + LL_RTC_DisableInitMode(RTC); + + /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ + if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U) + { + status = LL_RTC_WaitForSynchro(RTCx); + } + else + { + status = SUCCESS; + } + } + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return status; + } + + /** + * @brief Set each @ref LL_RTC_DateTypeDef field to default value (date = Monday, January 01 xx00) + * @param RTC_DateStruct pointer to a @ref LL_RTC_DateTypeDef structure which will be initialized. + * @retval None + */ + void LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct) + { + /* Monday, January 01 xx00 */ + RTC_DateStruct->WeekDay = LL_RTC_WEEKDAY_MONDAY; + RTC_DateStruct->Day = 1U; + RTC_DateStruct->Month = LL_RTC_MONTH_JANUARY; + RTC_DateStruct->Year = 0U; + } + + /** + * @brief Set the RTC Alarm A. + * @note The Alarm register can only be written when the corresponding Alarm + * is disabled (Use @ref LL_RTC_ALMA_Disable function). + * @param RTCx RTC Instance + * @param RTC_Format This parameter can be one of the following values: + * @arg @ref LL_RTC_FORMAT_BIN + * @arg @ref LL_RTC_FORMAT_BCD + * @param RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure that + * contains the alarm configuration parameters. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: ALARMA registers are configured + * - ERROR: ALARMA registers are not configured + */ + ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct) + { + /* Check the parameters */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + assert_param(IS_LL_RTC_FORMAT(RTC_Format)); + assert_param(IS_LL_RTC_ALMA_MASK(RTC_AlarmStruct->AlarmMask)); + assert_param(IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(RTC_AlarmStruct->AlarmDateWeekDaySel)); + + if (RTC_Format == LL_RTC_FORMAT_BIN) + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(RTC_AlarmStruct->AlarmTime.Hours)); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat)); + } + else + { + RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(RTC_AlarmStruct->AlarmTime.Hours)); + } + assert_param(IS_LL_RTC_MINUTES(RTC_AlarmStruct->AlarmTime.Minutes)); + assert_param(IS_LL_RTC_SECONDS(RTC_AlarmStruct->AlarmTime.Seconds)); + + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) + { + assert_param(IS_LL_RTC_DAY(RTC_AlarmStruct->AlarmDateWeekDay)); + } + else + { + assert_param(IS_LL_RTC_WEEKDAY(RTC_AlarmStruct->AlarmDateWeekDay)); + } + } + else + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours))); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat)); + } + else + { + RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours))); + } + + assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Minutes))); + assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Seconds))); + + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) + { + assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay))); + } + else + { + assert_param(IS_LL_RTC_WEEKDAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay))); + } + } + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Select weekday selection */ + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) + { + /* Set the date for ALARM */ + LL_RTC_ALMA_DisableWeekday(RTCx); + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_ALMA_SetDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay); + } + else + { + LL_RTC_ALMA_SetDay(RTCx, __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmDateWeekDay)); + } + } + else + { + /* Set the week day for ALARM */ + LL_RTC_ALMA_EnableWeekday(RTCx); + LL_RTC_ALMA_SetWeekDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay); + } + + /* Configure the Alarm register */ + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, RTC_AlarmStruct->AlarmTime.Hours, + RTC_AlarmStruct->AlarmTime.Minutes, RTC_AlarmStruct->AlarmTime.Seconds); + } + else + { + LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Hours), + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Minutes), + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Seconds)); + } + /* Set ALARM mask */ + LL_RTC_ALMA_SetMask(RTCx, RTC_AlarmStruct->AlarmMask); + + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return SUCCESS; + } + + /** + * @brief Set the RTC Alarm B. + * @note The Alarm register can only be written when the corresponding Alarm + * is disabled (@ref LL_RTC_ALMB_Disable function). + * @param RTCx RTC Instance + * @param RTC_Format This parameter can be one of the following values: + * @arg @ref LL_RTC_FORMAT_BIN + * @arg @ref LL_RTC_FORMAT_BCD + * @param RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure that + * contains the alarm configuration parameters. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: ALARMB registers are configured + * - ERROR: ALARMB registers are not configured + */ + ErrorStatus LL_RTC_ALMB_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct) + { + /* Check the parameters */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + assert_param(IS_LL_RTC_FORMAT(RTC_Format)); + assert_param(IS_LL_RTC_ALMB_MASK(RTC_AlarmStruct->AlarmMask)); + assert_param(IS_LL_RTC_ALMB_DATE_WEEKDAY_SEL(RTC_AlarmStruct->AlarmDateWeekDaySel)); + + if (RTC_Format == LL_RTC_FORMAT_BIN) + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(RTC_AlarmStruct->AlarmTime.Hours)); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat)); + } + else + { + RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(RTC_AlarmStruct->AlarmTime.Hours)); + } + assert_param(IS_LL_RTC_MINUTES(RTC_AlarmStruct->AlarmTime.Minutes)); + assert_param(IS_LL_RTC_SECONDS(RTC_AlarmStruct->AlarmTime.Seconds)); + + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) + { + assert_param(IS_LL_RTC_DAY(RTC_AlarmStruct->AlarmDateWeekDay)); + } + else + { + assert_param(IS_LL_RTC_WEEKDAY(RTC_AlarmStruct->AlarmDateWeekDay)); + } + } + else + { + if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR) + { + assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours))); + assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat)); + } + else + { + RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U; + assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours))); + } + + assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Minutes))); + assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Seconds))); + + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) + { + assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay))); + } + else + { + assert_param(IS_LL_RTC_WEEKDAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay))); + } + } + + /* Disable the write protection for RTC registers */ + LL_RTC_DisableWriteProtection(RTCx); + + /* Select weekday selection */ + if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) + { + /* Set the date for ALARM */ + LL_RTC_ALMB_DisableWeekday(RTCx); + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_ALMB_SetDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay); + } + else + { + LL_RTC_ALMB_SetDay(RTCx, __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmDateWeekDay)); + } + } + else + { + /* Set the week day for ALARM */ + LL_RTC_ALMB_EnableWeekday(RTCx); + LL_RTC_ALMB_SetWeekDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay); + } + + /* Configure the Alarm register */ + if (RTC_Format != LL_RTC_FORMAT_BIN) + { + LL_RTC_ALMB_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, RTC_AlarmStruct->AlarmTime.Hours, + RTC_AlarmStruct->AlarmTime.Minutes, RTC_AlarmStruct->AlarmTime.Seconds); + } + else + { + LL_RTC_ALMB_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Hours), + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Minutes), + __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Seconds)); + } + /* Set ALARM mask */ + LL_RTC_ALMB_SetMask(RTCx, RTC_AlarmStruct->AlarmMask); + + /* Enable the write protection for RTC registers */ + LL_RTC_EnableWriteProtection(RTCx); + + return SUCCESS; + } + + /** + * @brief Set each @ref LL_RTC_AlarmTypeDef of ALARMA field to default value (Time = 00h:00mn:00sec / + * Day = 1st day of the month/Mask = all fields are masked). + * @param RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure which will be initialized. + * @retval None + */ + void LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct) + { + /* Alarm Time Settings : Time = 00h:00mn:00sec */ + RTC_AlarmStruct->AlarmTime.TimeFormat = LL_RTC_ALMA_TIME_FORMAT_AM; + RTC_AlarmStruct->AlarmTime.Hours = 0U; + RTC_AlarmStruct->AlarmTime.Minutes = 0U; + RTC_AlarmStruct->AlarmTime.Seconds = 0U; + + /* Alarm Day Settings : Day = 1st day of the month */ + RTC_AlarmStruct->AlarmDateWeekDaySel = LL_RTC_ALMA_DATEWEEKDAYSEL_DATE; + RTC_AlarmStruct->AlarmDateWeekDay = 1U; + + /* Alarm Masks Settings : Mask = all fields are not masked */ + RTC_AlarmStruct->AlarmMask = LL_RTC_ALMA_MASK_NONE; + } + + /** + * @brief Set each @ref LL_RTC_AlarmTypeDef of ALARMA field to default value (Time = 00h:00mn:00sec / + * Day = 1st day of the month/Mask = all fields are masked). + * @param RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure which will be initialized. + * @retval None + */ + void LL_RTC_ALMB_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct) + { + /* Alarm Time Settings : Time = 00h:00mn:00sec */ + RTC_AlarmStruct->AlarmTime.TimeFormat = LL_RTC_ALMB_TIME_FORMAT_AM; + RTC_AlarmStruct->AlarmTime.Hours = 0U; + RTC_AlarmStruct->AlarmTime.Minutes = 0U; + RTC_AlarmStruct->AlarmTime.Seconds = 0U; + + /* Alarm Day Settings : Day = 1st day of the month */ + RTC_AlarmStruct->AlarmDateWeekDaySel = LL_RTC_ALMB_DATEWEEKDAYSEL_DATE; + RTC_AlarmStruct->AlarmDateWeekDay = 1U; + + /* Alarm Masks Settings : Mask = all fields are not masked */ + RTC_AlarmStruct->AlarmMask = LL_RTC_ALMB_MASK_NONE; + } + + /** + * @brief Enters the RTC Initialization mode. + * @note The RTC Initialization mode is write protected, use the + * @ref LL_RTC_DisableWriteProtection before calling this function. + * @param RTCx RTC Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC is in Init mode + * - ERROR: RTC is not in Init mode + */ + ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx) + { + __IO uint32_t timeout = RTC_INITMODE_TIMEOUT; + ErrorStatus status = SUCCESS; + uint32_t tmp = 0U; + + /* Check the parameter */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + + /* Check if the Initialization mode is set */ + if (LL_RTC_IsActiveFlag_INIT(RTCx) == 0U) + { + /* Set the Initialization mode */ + LL_RTC_EnableInitMode(RTCx); + + /* Wait till RTC is in INIT state and if Time out is reached exit */ + tmp = LL_RTC_IsActiveFlag_INIT(RTCx); + while ((timeout != 0U) && (tmp != 1U)) + { + if (LL_SYSTICK_IsActiveCounterFlag() == 1U) + { + timeout --; + } + tmp = LL_RTC_IsActiveFlag_INIT(RTCx); + if (timeout == 0U) + { + status = ERROR; + } + } + } + return status; + } + + /** + * @brief Exit the RTC Initialization mode. + * @note When the initialization sequence is complete, the calendar restarts + * counting after 4 RTCCLK cycles. + * @note The RTC Initialization mode is write protected, use the + * @ref LL_RTC_DisableWriteProtection before calling this function. + * @param RTCx RTC Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC exited from in Init mode + * - ERROR: Not applicable + */ + ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx) + { + /* Check the parameter */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + + /* Disable initialization mode */ + LL_RTC_DisableInitMode(RTCx); + + return SUCCESS; + } + + /** + * @brief Waits until the RTC Time and Day registers (RTC_TR and RTC_DR) are + * synchronized with RTC APB clock. + * @note The RTC Resynchronization mode is write protected, use the + * @ref LL_RTC_DisableWriteProtection before calling this function. + * @note To read the calendar through the shadow registers after Calendar + * initialization, calendar update or after wakeup from low power modes + * the software must first clear the RSF flag. + * The software must then wait until it is set again before reading + * the calendar, which means that the calendar registers have been + * correctly copied into the RTC_TR and RTC_DR shadow registers. + * @param RTCx RTC Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RTC registers are synchronised + * - ERROR: RTC registers are not synchronised + */ + ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx) + { + __IO uint32_t timeout = RTC_SYNCHRO_TIMEOUT; + ErrorStatus status = SUCCESS; + uint32_t tmp = 0U; + + /* Check the parameter */ + assert_param(IS_RTC_ALL_INSTANCE(RTCx)); + + /* Clear RSF flag */ + LL_RTC_ClearFlag_RS(RTCx); + + /* Wait the registers to be synchronised */ + tmp = LL_RTC_IsActiveFlag_RS(RTCx); + while ((timeout != 0U) && (tmp != 0U)) + { + if (LL_SYSTICK_IsActiveCounterFlag() == 1U) + { + timeout--; + } + tmp = LL_RTC_IsActiveFlag_RS(RTCx); + if (timeout == 0U) + { + status = ERROR; + } + } + + if (status != ERROR) + { + timeout = RTC_SYNCHRO_TIMEOUT; + tmp = LL_RTC_IsActiveFlag_RS(RTCx); + while ((timeout != 0U) && (tmp != 1U)) + { + if (LL_SYSTICK_IsActiveCounterFlag() == 1U) + { + timeout--; + } + tmp = LL_RTC_IsActiveFlag_RS(RTCx); + if (timeout == 0U) + { + status = ERROR; + } + } + } + + return (status); + } + + /** + * @} + */ + + /** + * @} + */ + + /** + * @} + */ + + #endif /* defined(RTC) */ + + /** + * @} + */ + + #endif /* USE_FULL_LL_DRIVER */ + diff --git a/RealOne/L476_ats_blink-master.ioc b/RealOne/RealOne.ioc similarity index 100% rename from RealOne/L476_ats_blink-master.ioc rename to RealOne/RealOne.ioc