From 416684b3e6c8bf82b05ae4b112c5a38909940c15 Mon Sep 17 00:00:00 2001
From: bray <bray@etud.insa-toulouse.fr>
Date: Thu, 5 Nov 2020 10:39:22 +0100
Subject: [PATCH] nearly broke everything, but should be safe now

---
 L476_ats_blink-master/.cproject               |  33 +-
 L476_ats_blink-master/.mxproject              |  28 +-
 L476_ats_blink-master/Core/Inc/main.h         |  17 +-
 L476_ats_blink-master/Core/Src/main.c         |  21 +-
 L476_ats_blink-master/Core/Src/stm32l4xx_it.c |  16 +-
 L476_ats_blink-master/Debug/Core/Src/main.o   | Bin 950776 -> 951784 bytes
 L476_ats_blink-master/Debug/Core/Src/main.su  |   5 +-
 .../Src/stm32l4xx_ll_utils.o                  | Bin 957064 -> 957060 bytes
 .../Debug/L476_ats_blink-master.bin           | Bin 2520 -> 2568 bytes
 .../Debug/L476_ats_blink-master.elf           | Bin 979420 -> 980004 bytes
 .../Debug/L476_ats_blink-master.list          | 974 +++++++++---------
 .../Debug/L476_ats_blink-master.map           | 433 ++++----
 .../Inc/stm32l4xx_ll_utils.h                  |   2 +-
 .../Src/stm32l4xx_ll_gpio.c                   | 298 ------
 .../Src/stm32l4xx_ll_pwr.c                    |  85 --
 .../L476_ats_blink-master.ioc                 |  79 +-
 16 files changed, 817 insertions(+), 1174 deletions(-)
 delete mode 100644 L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c
 delete mode 100644 L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c

diff --git a/L476_ats_blink-master/.cproject b/L476_ats_blink-master/.cproject
index 32e8b10..fa99011 100644
--- a/L476_ats_blink-master/.cproject
+++ b/L476_ats_blink-master/.cproject
@@ -36,28 +36,17 @@
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.260461090" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1008084780" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.2084042077" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
-									<listOptionValue builtIn="false" value="HSE_VALUE=8000000"/>
-									<listOptionValue builtIn="false" value="MSI_VALUE=4000000"/>
-									<listOptionValue builtIn="false" value="LSI_VALUE=32000"/>
-									<listOptionValue builtIn="false" value="HSE_STARTUP_TIMEOUT=100"/>
-									<listOptionValue builtIn="false" value="HSI_VALUE=16000000"/>
 									<listOptionValue builtIn="false" value="DEBUG"/>
-									<listOptionValue builtIn="false" value="LSE_STARTUP_TIMEOUT=5000"/>
-									<listOptionValue builtIn="false" value="LSE_VALUE=32768"/>
-									<listOptionValue builtIn="false" value="DATA_CACHE_ENABLE=1"/>
-									<listOptionValue builtIn="false" value="VDD_VALUE=3300"/>
-									<listOptionValue builtIn="false" value="INSTRUCTION_CACHE_ENABLE=1"/>
-									<listOptionValue builtIn="false" value="EXTERNALSAI2_CLOCK_VALUE=2097000"/>
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
 									<listOptionValue builtIn="false" value="STM32L476xx"/>
 									<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
-									<listOptionValue builtIn="false" value="EXTERNALSAI1_CLOCK_VALUE=2097000"/>
-									<listOptionValue builtIn="false" value="PREFETCH_ENABLE=0"/>
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.91113608" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32L4xx/Include"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy"/>
 								</option>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2066839393" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
 							</tool>
@@ -117,7 +106,7 @@
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.392142979" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.194970219" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.41252345" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1502291583" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32L476RGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32L4xx/Include | ../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32L476xx ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1502291583" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32L476RGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/CMSIS/Device/ST/STM32L4xx/Include | ../Drivers/STM32L4xx_HAL_Driver/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy ||  ||  || USE_HAL_DRIVER | STM32L476xx | USE_FULL_LL_DRIVER ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1285439591" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
 							<builder buildPath="${workspace_loc:/L476_ats_blink-master}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.197997793" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.237074260" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
@@ -128,27 +117,16 @@
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.155391150" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1325916365" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.877421546" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
-									<listOptionValue builtIn="false" value="HSE_VALUE=8000000"/>
-									<listOptionValue builtIn="false" value="MSI_VALUE=4000000"/>
-									<listOptionValue builtIn="false" value="LSI_VALUE=32000"/>
-									<listOptionValue builtIn="false" value="HSE_STARTUP_TIMEOUT=100"/>
-									<listOptionValue builtIn="false" value="HSI_VALUE=16000000"/>
-									<listOptionValue builtIn="false" value="LSE_STARTUP_TIMEOUT=5000"/>
-									<listOptionValue builtIn="false" value="LSE_VALUE=32768"/>
-									<listOptionValue builtIn="false" value="DATA_CACHE_ENABLE=1"/>
-									<listOptionValue builtIn="false" value="VDD_VALUE=3300"/>
-									<listOptionValue builtIn="false" value="INSTRUCTION_CACHE_ENABLE=1"/>
-									<listOptionValue builtIn="false" value="EXTERNALSAI2_CLOCK_VALUE=2097000"/>
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
 									<listOptionValue builtIn="false" value="STM32L476xx"/>
 									<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
-									<listOptionValue builtIn="false" value="EXTERNALSAI1_CLOCK_VALUE=2097000"/>
-									<listOptionValue builtIn="false" value="PREFETCH_ENABLE=0"/>
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1755829151" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32L4xx/Include"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy"/>
 								</option>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1542000366" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
 							</tool>
@@ -199,4 +177,5 @@
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
 	</storageModule>
+	<storageModule moduleId="refreshScope"/>
 </cproject>
diff --git a/L476_ats_blink-master/.mxproject b/L476_ats_blink-master/.mxproject
index e91bbe3..b0adf27 100644
--- a/L476_ats_blink-master/.mxproject
+++ b/L476_ats_blink-master/.mxproject
@@ -1,24 +1,26 @@
 [PreviousLibFiles]
-LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
 
 [PreviousUsedCubeIDEFiles]
-SourceFiles=Core\Src\main.c;Core\Src\stm32l4xx_it.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c;Core\Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c;Core\Src/system_stm32l4xx.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
-HeaderPath=Drivers\STM32L4xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32L4xx\Include;Drivers\CMSIS\Include;Core\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:4000000;EXTERNALSAI1_CLOCK_VALUE:2097000;EXTERNALSAI2_CLOCK_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L476xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:4000000;EXTERNALSAI1_CLOCK_VALUE:2097000;EXTERNALSAI2_CLOCK_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
+SourceFiles=Core\Src\main.c;Core\Src\stm32l4xx_it.c;Core\Src\stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Core\Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Core\Src/system_stm32l4xx.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
+HeaderPath=Drivers\STM32L4xx_HAL_Driver\Inc;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32L4xx\Include;Drivers\CMSIS\Include;Core\Inc;
+CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32L476xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
 
 [PreviousGenFiles]
 AdvancedFolderStructure=true
-HeaderFileListSize=3
-HeaderFiles#0=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Inc/stm32l4xx_it.h
-HeaderFiles#1=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Inc/stm32_assert.h
-HeaderFiles#2=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Inc/main.h
+HeaderFileListSize=4
+HeaderFiles#0=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Inc/stm32l4xx_it.h
+HeaderFiles#1=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Inc/stm32_assert.h
+HeaderFiles#2=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Inc/stm32l4xx_hal_conf.h
+HeaderFiles#3=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Inc/main.h
 HeaderFolderListSize=1
-HeaderPath#0=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Inc
+HeaderPath#0=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Inc
 HeaderFiles=;
-SourceFileListSize=2
-SourceFiles#0=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
-SourceFiles#1=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Src/main.c
+SourceFileListSize=3
+SourceFiles#0=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
+SourceFiles#1=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Src/stm32l4xx_hal_msp.c
+SourceFiles#2=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Src/main.c
 SourceFolderListSize=1
-SourcePath#0=C:/Users/adminaboyer/alex/enseignements_2020_21/TP_Prog_faible_energie/WorkSpace_STM32CubeIDE/L476_ats_blink-master/Core/Src
+SourcePath#0=C:/Users/camer/Desktop/LoPoSo/L476_ats_blink-master/Core/Src
 SourceFiles=;
 
diff --git a/L476_ats_blink-master/Core/Inc/main.h b/L476_ats_blink-master/Core/Inc/main.h
index 510f87b..460e791 100644
--- a/L476_ats_blink-master/Core/Inc/main.h
+++ b/L476_ats_blink-master/Core/Inc/main.h
@@ -28,6 +28,7 @@ extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal.h"
 #include "stm32l4xx_ll_crs.h"
 #include "stm32l4xx_ll_rcc.h"
 #include "stm32l4xx_ll_bus.h"
@@ -39,10 +40,6 @@ extern "C" {
 #include "stm32l4xx_ll_dma.h"
 #include "stm32l4xx_ll_gpio.h"
 
-#if defined(USE_FULL_ASSERT)
-#include "stm32_assert.h"
-#endif /* USE_FULL_ASSERT */
-
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 
@@ -71,18 +68,6 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
-#ifndef NVIC_PRIORITYGROUP_0
-#define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bit  for pre-emption priority,
-                                                                 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1         ((uint32_t)0x00000006) /*!< 1 bit  for pre-emption priority,
-                                                                 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2         ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
-                                                                 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3         ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
-                                                                 1 bit  for subpriority */
-#define NVIC_PRIORITYGROUP_4         ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
-                                                                 0 bit  for subpriority */
-#endif
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */
diff --git a/L476_ats_blink-master/Core/Src/main.c b/L476_ats_blink-master/Core/Src/main.c
index 7a03724..b0c1462 100644
--- a/L476_ats_blink-master/Core/Src/main.c
+++ b/L476_ats_blink-master/Core/Src/main.c
@@ -24,11 +24,14 @@ volatile uint8_t blue_mode = 0;
 
 void SysTick_Handler()
 {
+  if	( BLUE_BUTTON() ){
+			blue_mode = 1 ;
+  }
 
   msTicks++;                                                /* See startup file startup_LPC17xx.s for SysTick vector */
-  if (msTicks == 50){
+  if (msTicks == 5){
 	  LED_GREEN(0);
-  }else if(msTicks >= 1000){
+  }else if(msTicks >= 200){
 	  msTicks = 0;
 	  LED_GREEN(1);
   }
@@ -48,11 +51,15 @@ GPIO_init();
 LL_Init1msTick( SystemCoreClock );
 LL_SYSTICK_EnableIT();
 
+//Setup Sleep mode
+LL_LPM_EnableSleep();
+//LL_LPM_EnableSleepOnExit();
 
 while (1)  {
-	if	( BLUE_BUTTON() ){
-		blue_mode = 1;
+	if (blue_mode){
+		__WFI();
 	}
+
 //	else {
 //		LED_GREEN(0);
 //		LL_mDelay(950);
@@ -85,20 +92,20 @@ LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
 LL_RCC_MSI_Enable();
 while	(LL_RCC_MSI_IsReady() != 1)
 	{ };
-  
+
 /* Main PLL configuration and activation */
 LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
 LL_RCC_PLL_Enable();
 LL_RCC_PLL_EnableDomain_SYS();
 while(LL_RCC_PLL_IsReady() != 1)
 	{ };
-  
+
 /* Sysclk activation on the main PLL */
 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
 	{ };
-  
+
 /* Set APB1 & APB2 prescaler*/
 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
diff --git a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
index 613bc7a..a08e99e 100644
--- a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
+++ b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
@@ -179,16 +179,16 @@ void PendSV_Handler(void)
 /**
   * @brief This function handles System tick timer.
   */
-//void SysTick_Handler(void)
-//{
-//  /* USER CODE BEGIN SysTick_IRQn 0 */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
 //
-//  /* USER CODE END SysTick_IRQn 0 */
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
 //
-//  /* USER CODE BEGIN SysTick_IRQn 1 */
-//
-//  /* USER CODE END SysTick_IRQn 1 */
-//}
+  /* USER CODE END SysTick_IRQn 1 */
+}
 
 /******************************************************************************/
 /* STM32L4xx Peripheral Interrupt Handlers                                    */
diff --git a/L476_ats_blink-master/Debug/Core/Src/main.o b/L476_ats_blink-master/Debug/Core/Src/main.o
index a25367f5e884a974131e42ef22f99171353e9fb4..f4cc805b7c771f42d483007ad84f51ec84b26150 100644
GIT binary patch
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diff --git a/L476_ats_blink-master/Debug/Core/Src/main.su b/L476_ats_blink-master/Debug/Core/Src/main.su
index 70c16be..7678bba 100644
--- a/L476_ats_blink-master/Debug/Core/Src/main.su
+++ b/L476_ats_blink-master/Debug/Core/Src/main.su
@@ -11,6 +11,7 @@ stm32l4xx_ll_rcc.h:3800:22:LL_RCC_PLL_ConfigDomain_SYS	24	static
 stm32l4xx_ll_rcc.h:4178:22:LL_RCC_PLL_EnableDomain_SYS	4	static
 stm32l4xx_ll_system.h:1400:22:LL_FLASH_SetLatency	16	static
 stm32l4xx_ll_cortex.h:272:22:LL_SYSTICK_EnableIT	4	static
+stm32l4xx_ll_cortex.h:310:22:LL_LPM_EnableSleep	4	static
 main.c:25:6:SysTick_Handler	8	static
-main.c:39:5:main	8	static
-main.c:82:6:SystemClock_Config	8	static
+main.c:42:5:main	8	static,ignoring_inline_asm
+main.c:89:6:SystemClock_Config	8	static
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
index 501c2d745629f23e6f4fca3315e5926158aafa94..53b9d642551220dc36b45305e665e15e537bb253 100644
GIT binary patch
delta 796
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diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.bin b/L476_ats_blink-master/Debug/L476_ats_blink-master.bin
index 6afe72903d2d5c9c11b927bf402164f59d01b5b8..6a1428c58be31037e77dd8f1267adccece0e1468 100644
GIT binary patch
delta 815
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diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.elf b/L476_ats_blink-master/Debug/L476_ats_blink-master.elf
index ecbc6bf20f03ad1d737aa1a516c1a5ba81a59099..7a3bbf557353c6f5dc64197b38133ccf21e4652d 100644
GIT binary patch
delta 14699
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diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.list b/L476_ats_blink-master/Debug/L476_ats_blink-master.list
index 8ca194f..7173645 100644
--- a/L476_ats_blink-master/Debug/L476_ats_blink-master.list
+++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.list
@@ -5,45 +5,45 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   00000188  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         00000804  08000188  08000188  00010188  2**2
+  1 .text         00000834  08000188  08000188  00010188  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000040  0800098c  0800098c  0001098c  2**2
+  2 .rodata       00000040  080009bc  080009bc  000109bc  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  080009cc  080009cc  00020004  2**0
+  3 .ARM.extab    00000000  080009fc  080009fc  00020004  2**0
                   CONTENTS
-  4 .ARM          00000000  080009cc  080009cc  00020004  2**0
+  4 .ARM          00000000  080009fc  080009fc  00020004  2**0
                   CONTENTS
-  5 .preinit_array 00000000  080009cc  080009cc  00020004  2**0
+  5 .preinit_array 00000000  080009fc  080009fc  00020004  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  080009cc  080009cc  000109cc  2**2
+  6 .init_array   00000004  080009fc  080009fc  000109fc  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  080009d0  080009d0  000109d0  2**2
+  7 .fini_array   00000004  08000a00  08000a00  00010a00  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         00000004  20000000  080009d4  00020000  2**2
+  8 .data         00000004  20000000  08000a04  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00000024  20000004  080009d8  00020004  2**2
+  9 .bss          00000024  20000004  08000a08  00020004  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  20000028  080009d8  00020028  2**0
+ 10 ._user_heap_stack 00000600  20000028  08000a08  00020028  2**0
                   ALLOC
  11 .ARM.attributes 00000030  00000000  00000000  00020004  2**0
                   CONTENTS, READONLY
- 12 .debug_info   00002106  00000000  00000000  00020034  2**0
+ 12 .debug_info   000022b2  00000000  00000000  00020034  2**0
                   CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 00000771  00000000  00000000  0002213a  2**0
+ 13 .debug_abbrev 00000771  00000000  00000000  000222e6  2**0
                   CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 000002d8  00000000  00000000  000228b0  2**3
+ 14 .debug_aranges 000002e0  00000000  00000000  00022a58  2**3
                   CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 00000280  00000000  00000000  00022b88  2**3
+ 15 .debug_ranges 00000288  00000000  00000000  00022d38  2**3
                   CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro  0001e120  00000000  00000000  00022e08  2**0
+ 16 .debug_macro  0001e120  00000000  00000000  00022fc0  2**0
                   CONTENTS, READONLY, DEBUGGING
- 17 .debug_line   0000201e  00000000  00000000  00040f28  2**0
+ 17 .debug_line   00002035  00000000  00000000  000410e0  2**0
                   CONTENTS, READONLY, DEBUGGING
- 18 .debug_str    000a94ae  00000000  00000000  00042f46  2**0
+ 18 .debug_str    000a94c1  00000000  00000000  00043115  2**0
                   CONTENTS, READONLY, DEBUGGING
- 19 .comment      0000007b  00000000  00000000  000ec3f4  2**0
+ 19 .comment      0000007b  00000000  00000000  000ec5d6  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  00000a00  00000000  00000000  000ec470  2**2
+ 20 .debug_frame  00000a20  00000000  00000000  000ec654  2**2
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -62,7 +62,7 @@ Disassembly of section .text:
  800019e:	bd10      	pop	{r4, pc}
  80001a0:	20000004 	.word	0x20000004
  80001a4:	00000000 	.word	0x00000000
- 80001a8:	08000974 	.word	0x08000974
+ 80001a8:	080009a4 	.word	0x080009a4
 
 080001ac <frame_dummy>:
  80001ac:	b508      	push	{r3, lr}
@@ -74,7 +74,7 @@ Disassembly of section .text:
  80001ba:	bd08      	pop	{r3, pc}
  80001bc:	00000000 	.word	0x00000000
  80001c0:	20000008 	.word	0x20000008
- 80001c4:	08000974 	.word	0x08000974
+ 80001c4:	080009a4 	.word	0x080009a4
 
 080001c8 <LL_AHB2_GRP1_EnableClock>:
   *
@@ -742,814 +742,852 @@ __STATIC_INLINE void LL_SYSTICK_EnableIT(void)
  800057a:	bf00      	nop
  800057c:	e000e010 	.word	0xe000e010
 
-08000580 <SysTick_Handler>:
+08000580 <LL_LPM_EnableSleep>:
+  * @brief  Processor uses sleep as its low power mode
+  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableSleep
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_EnableSleep(void)
+{
+ 8000580:	b480      	push	{r7}
+ 8000582:	af00      	add	r7, sp, #0
+  /* Clear SLEEPDEEP bit of Cortex System Control Register */
+  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
+ 8000584:	4b05      	ldr	r3, [pc, #20]	; (800059c <LL_LPM_EnableSleep+0x1c>)
+ 8000586:	691b      	ldr	r3, [r3, #16]
+ 8000588:	4a04      	ldr	r2, [pc, #16]	; (800059c <LL_LPM_EnableSleep+0x1c>)
+ 800058a:	f023 0304 	bic.w	r3, r3, #4
+ 800058e:	6113      	str	r3, [r2, #16]
+}
+ 8000590:	bf00      	nop
+ 8000592:	46bd      	mov	sp, r7
+ 8000594:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000598:	4770      	bx	lr
+ 800059a:	bf00      	nop
+ 800059c:	e000ed00 	.word	0xe000ed00
+
+080005a0 <SysTick_Handler>:
 volatile uint32_t msTicks = 0;
 volatile uint8_t expe = 0;
 volatile uint8_t blue_mode = 0;
 
 void SysTick_Handler()
 {
- 8000580:	b580      	push	{r7, lr}
- 8000582:	af00      	add	r7, sp, #0
+ 80005a0:	b580      	push	{r7, lr}
+ 80005a2:	af00      	add	r7, sp, #0
+  if	( BLUE_BUTTON() ){
+ 80005a4:	f7ff fee2 	bl	800036c <BLUE_BUTTON>
+ 80005a8:	4603      	mov	r3, r0
+ 80005aa:	2b00      	cmp	r3, #0
+ 80005ac:	d002      	beq.n	80005b4 <SysTick_Handler+0x14>
+			blue_mode = 1 ;
+ 80005ae:	4b0e      	ldr	r3, [pc, #56]	; (80005e8 <SysTick_Handler+0x48>)
+ 80005b0:	2201      	movs	r2, #1
+ 80005b2:	701a      	strb	r2, [r3, #0]
+  }
 
   msTicks++;                                                /* See startup file startup_LPC17xx.s for SysTick vector */
- 8000584:	4b0c      	ldr	r3, [pc, #48]	; (80005b8 <SysTick_Handler+0x38>)
- 8000586:	681b      	ldr	r3, [r3, #0]
- 8000588:	3301      	adds	r3, #1
- 800058a:	4a0b      	ldr	r2, [pc, #44]	; (80005b8 <SysTick_Handler+0x38>)
- 800058c:	6013      	str	r3, [r2, #0]
-  if (msTicks == 50){
- 800058e:	4b0a      	ldr	r3, [pc, #40]	; (80005b8 <SysTick_Handler+0x38>)
- 8000590:	681b      	ldr	r3, [r3, #0]
- 8000592:	2b32      	cmp	r3, #50	; 0x32
- 8000594:	d103      	bne.n	800059e <SysTick_Handler+0x1e>
+ 80005b4:	4b0d      	ldr	r3, [pc, #52]	; (80005ec <SysTick_Handler+0x4c>)
+ 80005b6:	681b      	ldr	r3, [r3, #0]
+ 80005b8:	3301      	adds	r3, #1
+ 80005ba:	4a0c      	ldr	r2, [pc, #48]	; (80005ec <SysTick_Handler+0x4c>)
+ 80005bc:	6013      	str	r3, [r2, #0]
+  if (msTicks == 5){
+ 80005be:	4b0b      	ldr	r3, [pc, #44]	; (80005ec <SysTick_Handler+0x4c>)
+ 80005c0:	681b      	ldr	r3, [r3, #0]
+ 80005c2:	2b05      	cmp	r3, #5
+ 80005c4:	d103      	bne.n	80005ce <SysTick_Handler+0x2e>
 	  LED_GREEN(0);
- 8000596:	2000      	movs	r0, #0
- 8000598:	f7ff fed2 	bl	8000340 <LED_GREEN>
-  }else if(msTicks >= 1000){
+ 80005c6:	2000      	movs	r0, #0
+ 80005c8:	f7ff feba 	bl	8000340 <LED_GREEN>
+  }else if(msTicks >= 200){
 	  msTicks = 0;
 	  LED_GREEN(1);
   }
 }
- 800059c:	e00a      	b.n	80005b4 <SysTick_Handler+0x34>
-  }else if(msTicks >= 1000){
- 800059e:	4b06      	ldr	r3, [pc, #24]	; (80005b8 <SysTick_Handler+0x38>)
- 80005a0:	681b      	ldr	r3, [r3, #0]
- 80005a2:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 80005a6:	d305      	bcc.n	80005b4 <SysTick_Handler+0x34>
+ 80005cc:	e009      	b.n	80005e2 <SysTick_Handler+0x42>
+  }else if(msTicks >= 200){
+ 80005ce:	4b07      	ldr	r3, [pc, #28]	; (80005ec <SysTick_Handler+0x4c>)
+ 80005d0:	681b      	ldr	r3, [r3, #0]
+ 80005d2:	2bc7      	cmp	r3, #199	; 0xc7
+ 80005d4:	d905      	bls.n	80005e2 <SysTick_Handler+0x42>
 	  msTicks = 0;
- 80005a8:	4b03      	ldr	r3, [pc, #12]	; (80005b8 <SysTick_Handler+0x38>)
- 80005aa:	2200      	movs	r2, #0
- 80005ac:	601a      	str	r2, [r3, #0]
+ 80005d6:	4b05      	ldr	r3, [pc, #20]	; (80005ec <SysTick_Handler+0x4c>)
+ 80005d8:	2200      	movs	r2, #0
+ 80005da:	601a      	str	r2, [r3, #0]
 	  LED_GREEN(1);
- 80005ae:	2001      	movs	r0, #1
- 80005b0:	f7ff fec6 	bl	8000340 <LED_GREEN>
+ 80005dc:	2001      	movs	r0, #1
+ 80005de:	f7ff feaf 	bl	8000340 <LED_GREEN>
 }
- 80005b4:	bf00      	nop
- 80005b6:	bd80      	pop	{r7, pc}
- 80005b8:	20000020 	.word	0x20000020
+ 80005e2:	bf00      	nop
+ 80005e4:	bd80      	pop	{r7, pc}
+ 80005e6:	bf00      	nop
+ 80005e8:	20000024 	.word	0x20000024
+ 80005ec:	20000020 	.word	0x20000020
 
-080005bc <main>:
+080005f0 <main>:
 
 void     SystemClock_Config(void);
 
 int main(void)
 {
- 80005bc:	b580      	push	{r7, lr}
- 80005be:	af00      	add	r7, sp, #0
+ 80005f0:	b580      	push	{r7, lr}
+ 80005f2:	af00      	add	r7, sp, #0
 /* Configure the system clock */
 SystemClock_Config();
- 80005c0:	f000 f816 	bl	80005f0 <SystemClock_Config>
+ 80005f4:	f000 f816 	bl	8000624 <SystemClock_Config>
 
 // config GPIO
 GPIO_init();
- 80005c4:	f7ff fe9e 	bl	8000304 <GPIO_init>
+ 80005f8:	f7ff fe84 	bl	8000304 <GPIO_init>
 
 // init systick timer (tick period at 1 ms)
 LL_Init1msTick( SystemCoreClock );
- 80005c8:	4b07      	ldr	r3, [pc, #28]	; (80005e8 <main+0x2c>)
- 80005ca:	681b      	ldr	r3, [r3, #0]
- 80005cc:	4618      	mov	r0, r3
- 80005ce:	f000 f99f 	bl	8000910 <LL_Init1msTick>
+ 80005fc:	4b07      	ldr	r3, [pc, #28]	; (800061c <main+0x2c>)
+ 80005fe:	681b      	ldr	r3, [r3, #0]
+ 8000600:	4618      	mov	r0, r3
+ 8000602:	f000 f99f 	bl	8000944 <LL_Init1msTick>
 LL_SYSTICK_EnableIT();
- 80005d2:	f7ff ffc5 	bl	8000560 <LL_SYSTICK_EnableIT>
+ 8000606:	f7ff ffab 	bl	8000560 <LL_SYSTICK_EnableIT>
 
+//Setup Sleep mode
+LL_LPM_EnableSleep();
+ 800060a:	f7ff ffb9 	bl	8000580 <LL_LPM_EnableSleep>
+//LL_LPM_EnableSleepOnExit();
 
 while (1)  {
-	if	( BLUE_BUTTON() ){
- 80005d6:	f7ff fec9 	bl	800036c <BLUE_BUTTON>
- 80005da:	4603      	mov	r3, r0
- 80005dc:	2b00      	cmp	r3, #0
- 80005de:	d0fa      	beq.n	80005d6 <main+0x1a>
-		blue_mode = 1;
- 80005e0:	4b02      	ldr	r3, [pc, #8]	; (80005ec <main+0x30>)
- 80005e2:	2201      	movs	r2, #1
- 80005e4:	701a      	strb	r2, [r3, #0]
-	if	( BLUE_BUTTON() ){
- 80005e6:	e7f6      	b.n	80005d6 <main+0x1a>
- 80005e8:	20000000 	.word	0x20000000
- 80005ec:	20000024 	.word	0x20000024
+	if (blue_mode){
+ 800060e:	4b04      	ldr	r3, [pc, #16]	; (8000620 <main+0x30>)
+ 8000610:	781b      	ldrb	r3, [r3, #0]
+ 8000612:	b2db      	uxtb	r3, r3
+ 8000614:	2b00      	cmp	r3, #0
+ 8000616:	d0fa      	beq.n	800060e <main+0x1e>
+		__WFI();
+ 8000618:	bf30      	wfi
+	if (blue_mode){
+ 800061a:	e7f8      	b.n	800060e <main+0x1e>
+ 800061c:	20000000 	.word	0x20000000
+ 8000620:	20000024 	.word	0x20000024
 
-080005f0 <SystemClock_Config>:
+08000624 <SystemClock_Config>:
   *            PLL_R                          = 2
   *            Flash Latency(WS)              = 4
   * @param  None
   * @retval None
   */
 void SystemClock_Config(void) {
- 80005f0:	b580      	push	{r7, lr}
- 80005f2:	af00      	add	r7, sp, #0
+ 8000624:	b580      	push	{r7, lr}
+ 8000626:	af00      	add	r7, sp, #0
 /* MSI configuration and activation */
 LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
- 80005f4:	2004      	movs	r0, #4
- 80005f6:	f7ff ff9f 	bl	8000538 <LL_FLASH_SetLatency>
+ 8000628:	2004      	movs	r0, #4
+ 800062a:	f7ff ff85 	bl	8000538 <LL_FLASH_SetLatency>
 LL_RCC_MSI_Enable();
- 80005fa:	f7ff fec9 	bl	8000390 <LL_RCC_MSI_Enable>
+ 800062e:	f7ff feaf 	bl	8000390 <LL_RCC_MSI_Enable>
 while	(LL_RCC_MSI_IsReady() != 1)
- 80005fe:	bf00      	nop
- 8000600:	f7ff fed6 	bl	80003b0 <LL_RCC_MSI_IsReady>
- 8000604:	4603      	mov	r3, r0
- 8000606:	2b01      	cmp	r3, #1
- 8000608:	d1fa      	bne.n	8000600 <SystemClock_Config+0x10>
+ 8000632:	bf00      	nop
+ 8000634:	f7ff febc 	bl	80003b0 <LL_RCC_MSI_IsReady>
+ 8000638:	4603      	mov	r3, r0
+ 800063a:	2b01      	cmp	r3, #1
+ 800063c:	d1fa      	bne.n	8000634 <SystemClock_Config+0x10>
 	{ };
   
 /* Main PLL configuration and activation */
 LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
- 800060a:	2300      	movs	r3, #0
- 800060c:	2228      	movs	r2, #40	; 0x28
- 800060e:	2100      	movs	r1, #0
- 8000610:	2001      	movs	r0, #1
- 8000612:	f7ff ff61 	bl	80004d8 <LL_RCC_PLL_ConfigDomain_SYS>
+ 800063e:	2300      	movs	r3, #0
+ 8000640:	2228      	movs	r2, #40	; 0x28
+ 8000642:	2100      	movs	r1, #0
+ 8000644:	2001      	movs	r0, #1
+ 8000646:	f7ff ff47 	bl	80004d8 <LL_RCC_PLL_ConfigDomain_SYS>
 LL_RCC_PLL_Enable();
- 8000616:	f7ff ff3b 	bl	8000490 <LL_RCC_PLL_Enable>
+ 800064a:	f7ff ff21 	bl	8000490 <LL_RCC_PLL_Enable>
 LL_RCC_PLL_EnableDomain_SYS();
- 800061a:	f7ff ff7d 	bl	8000518 <LL_RCC_PLL_EnableDomain_SYS>
+ 800064e:	f7ff ff63 	bl	8000518 <LL_RCC_PLL_EnableDomain_SYS>
 while(LL_RCC_PLL_IsReady() != 1)
- 800061e:	bf00      	nop
- 8000620:	f7ff ff46 	bl	80004b0 <LL_RCC_PLL_IsReady>
- 8000624:	4603      	mov	r3, r0
- 8000626:	2b01      	cmp	r3, #1
- 8000628:	d1fa      	bne.n	8000620 <SystemClock_Config+0x30>
+ 8000652:	bf00      	nop
+ 8000654:	f7ff ff2c 	bl	80004b0 <LL_RCC_PLL_IsReady>
+ 8000658:	4603      	mov	r3, r0
+ 800065a:	2b01      	cmp	r3, #1
+ 800065c:	d1fa      	bne.n	8000654 <SystemClock_Config+0x30>
 	{ };
   
 /* Sysclk activation on the main PLL */
 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
- 800062a:	2000      	movs	r0, #0
- 800062c:	f7ff fef4 	bl	8000418 <LL_RCC_SetAHBPrescaler>
+ 800065e:	2000      	movs	r0, #0
+ 8000660:	f7ff feda 	bl	8000418 <LL_RCC_SetAHBPrescaler>
 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
- 8000630:	2003      	movs	r0, #3
- 8000632:	f7ff fecf 	bl	80003d4 <LL_RCC_SetSysClkSource>
+ 8000664:	2003      	movs	r0, #3
+ 8000666:	f7ff feb5 	bl	80003d4 <LL_RCC_SetSysClkSource>
 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
- 8000636:	bf00      	nop
- 8000638:	f7ff fee0 	bl	80003fc <LL_RCC_GetSysClkSource>
- 800063c:	4603      	mov	r3, r0
- 800063e:	2b0c      	cmp	r3, #12
- 8000640:	d1fa      	bne.n	8000638 <SystemClock_Config+0x48>
+ 800066a:	bf00      	nop
+ 800066c:	f7ff fec6 	bl	80003fc <LL_RCC_GetSysClkSource>
+ 8000670:	4603      	mov	r3, r0
+ 8000672:	2b0c      	cmp	r3, #12
+ 8000674:	d1fa      	bne.n	800066c <SystemClock_Config+0x48>
 	{ };
   
 /* Set APB1 & APB2 prescaler*/
 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
- 8000642:	2000      	movs	r0, #0
- 8000644:	f7ff fefc 	bl	8000440 <LL_RCC_SetAPB1Prescaler>
+ 8000676:	2000      	movs	r0, #0
+ 8000678:	f7ff fee2 	bl	8000440 <LL_RCC_SetAPB1Prescaler>
 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
- 8000648:	2000      	movs	r0, #0
- 800064a:	f7ff ff0d 	bl	8000468 <LL_RCC_SetAPB2Prescaler>
+ 800067c:	2000      	movs	r0, #0
+ 800067e:	f7ff fef3 	bl	8000468 <LL_RCC_SetAPB2Prescaler>
 
 /* Update the global variable called SystemCoreClock */
 SystemCoreClockUpdate();
- 800064e:	f000 f861 	bl	8000714 <SystemCoreClockUpdate>
+ 8000682:	f000 f861 	bl	8000748 <SystemCoreClockUpdate>
 }
- 8000652:	bf00      	nop
- 8000654:	bd80      	pop	{r7, pc}
+ 8000686:	bf00      	nop
+ 8000688:	bd80      	pop	{r7, pc}
 
-08000656 <NMI_Handler>:
+0800068a <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable interrupt.
   */
 void NMI_Handler(void)
 {
- 8000656:	b480      	push	{r7}
- 8000658:	af00      	add	r7, sp, #0
+ 800068a:	b480      	push	{r7}
+ 800068c:	af00      	add	r7, sp, #0
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
 
   /* USER CODE END NonMaskableInt_IRQn 1 */
 }
- 800065a:	bf00      	nop
- 800065c:	46bd      	mov	sp, r7
- 800065e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000662:	4770      	bx	lr
+ 800068e:	bf00      	nop
+ 8000690:	46bd      	mov	sp, r7
+ 8000692:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000696:	4770      	bx	lr
 
-08000664 <HardFault_Handler>:
+08000698 <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 8000664:	b480      	push	{r7}
- 8000666:	af00      	add	r7, sp, #0
+ 8000698:	b480      	push	{r7}
+ 800069a:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 8000668:	e7fe      	b.n	8000668 <HardFault_Handler+0x4>
+ 800069c:	e7fe      	b.n	800069c <HardFault_Handler+0x4>
 
-0800066a <MemManage_Handler>:
+0800069e <MemManage_Handler>:
 
 /**
   * @brief This function handles Memory management fault.
   */
 void MemManage_Handler(void)
 {
- 800066a:	b480      	push	{r7}
- 800066c:	af00      	add	r7, sp, #0
+ 800069e:	b480      	push	{r7}
+ 80006a0:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
- 800066e:	e7fe      	b.n	800066e <MemManage_Handler+0x4>
+ 80006a2:	e7fe      	b.n	80006a2 <MemManage_Handler+0x4>
 
-08000670 <BusFault_Handler>:
+080006a4 <BusFault_Handler>:
 
 /**
   * @brief This function handles Prefetch fault, memory access fault.
   */
 void BusFault_Handler(void)
 {
- 8000670:	b480      	push	{r7}
- 8000672:	af00      	add	r7, sp, #0
+ 80006a4:	b480      	push	{r7}
+ 80006a6:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
   while (1)
- 8000674:	e7fe      	b.n	8000674 <BusFault_Handler+0x4>
+ 80006a8:	e7fe      	b.n	80006a8 <BusFault_Handler+0x4>
 
-08000676 <UsageFault_Handler>:
+080006aa <UsageFault_Handler>:
 
 /**
   * @brief This function handles Undefined instruction or illegal state.
   */
 void UsageFault_Handler(void)
 {
- 8000676:	b480      	push	{r7}
- 8000678:	af00      	add	r7, sp, #0
+ 80006aa:	b480      	push	{r7}
+ 80006ac:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
   while (1)
- 800067a:	e7fe      	b.n	800067a <UsageFault_Handler+0x4>
+ 80006ae:	e7fe      	b.n	80006ae <UsageFault_Handler+0x4>
 
-0800067c <SVC_Handler>:
+080006b0 <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 800067c:	b480      	push	{r7}
- 800067e:	af00      	add	r7, sp, #0
+ 80006b0:	b480      	push	{r7}
+ 80006b2:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVCall_IRQn 0 */
   /* USER CODE BEGIN SVCall_IRQn 1 */
 
   /* USER CODE END SVCall_IRQn 1 */
 }
- 8000680:	bf00      	nop
- 8000682:	46bd      	mov	sp, r7
- 8000684:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000688:	4770      	bx	lr
+ 80006b4:	bf00      	nop
+ 80006b6:	46bd      	mov	sp, r7
+ 80006b8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80006bc:	4770      	bx	lr
 
-0800068a <DebugMon_Handler>:
+080006be <DebugMon_Handler>:
 
 /**
   * @brief This function handles Debug monitor.
   */
 void DebugMon_Handler(void)
 {
- 800068a:	b480      	push	{r7}
- 800068c:	af00      	add	r7, sp, #0
+ 80006be:	b480      	push	{r7}
+ 80006c0:	af00      	add	r7, sp, #0
 
   /* USER CODE END DebugMonitor_IRQn 0 */
   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 
   /* USER CODE END DebugMonitor_IRQn 1 */
 }
- 800068e:	bf00      	nop
- 8000690:	46bd      	mov	sp, r7
- 8000692:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000696:	4770      	bx	lr
+ 80006c2:	bf00      	nop
+ 80006c4:	46bd      	mov	sp, r7
+ 80006c6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80006ca:	4770      	bx	lr
 
-08000698 <PendSV_Handler>:
+080006cc <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 8000698:	b480      	push	{r7}
- 800069a:	af00      	add	r7, sp, #0
+ 80006cc:	b480      	push	{r7}
+ 80006ce:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 800069c:	bf00      	nop
- 800069e:	46bd      	mov	sp, r7
- 80006a0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80006a4:	4770      	bx	lr
+ 80006d0:	bf00      	nop
+ 80006d2:	46bd      	mov	sp, r7
+ 80006d4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80006d8:	4770      	bx	lr
 	...
 
-080006a8 <SystemInit>:
+080006dc <SystemInit>:
   * @param  None
   * @retval None
   */
 
 void SystemInit(void)
 {
- 80006a8:	b480      	push	{r7}
- 80006aa:	af00      	add	r7, sp, #0
+ 80006dc:	b480      	push	{r7}
+ 80006de:	af00      	add	r7, sp, #0
   /* FPU settings ------------------------------------------------------------*/
   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
- 80006ac:	4b17      	ldr	r3, [pc, #92]	; (800070c <SystemInit+0x64>)
- 80006ae:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 80006b2:	4a16      	ldr	r2, [pc, #88]	; (800070c <SystemInit+0x64>)
- 80006b4:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
- 80006b8:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
+ 80006e0:	4b17      	ldr	r3, [pc, #92]	; (8000740 <SystemInit+0x64>)
+ 80006e2:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 80006e6:	4a16      	ldr	r2, [pc, #88]	; (8000740 <SystemInit+0x64>)
+ 80006e8:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
+ 80006ec:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
   #endif
 
   /* Reset the RCC clock configuration to the default reset state ------------*/
   /* Set MSION bit */
   RCC->CR |= RCC_CR_MSION;
- 80006bc:	4b14      	ldr	r3, [pc, #80]	; (8000710 <SystemInit+0x68>)
- 80006be:	681b      	ldr	r3, [r3, #0]
- 80006c0:	4a13      	ldr	r2, [pc, #76]	; (8000710 <SystemInit+0x68>)
- 80006c2:	f043 0301 	orr.w	r3, r3, #1
- 80006c6:	6013      	str	r3, [r2, #0]
+ 80006f0:	4b14      	ldr	r3, [pc, #80]	; (8000744 <SystemInit+0x68>)
+ 80006f2:	681b      	ldr	r3, [r3, #0]
+ 80006f4:	4a13      	ldr	r2, [pc, #76]	; (8000744 <SystemInit+0x68>)
+ 80006f6:	f043 0301 	orr.w	r3, r3, #1
+ 80006fa:	6013      	str	r3, [r2, #0]
 
   /* Reset CFGR register */
   RCC->CFGR = 0x00000000U;
- 80006c8:	4b11      	ldr	r3, [pc, #68]	; (8000710 <SystemInit+0x68>)
- 80006ca:	2200      	movs	r2, #0
- 80006cc:	609a      	str	r2, [r3, #8]
+ 80006fc:	4b11      	ldr	r3, [pc, #68]	; (8000744 <SystemInit+0x68>)
+ 80006fe:	2200      	movs	r2, #0
+ 8000700:	609a      	str	r2, [r3, #8]
 
   /* Reset HSEON, CSSON , HSION, and PLLON bits */
   RCC->CR &= 0xEAF6FFFFU;
- 80006ce:	4b10      	ldr	r3, [pc, #64]	; (8000710 <SystemInit+0x68>)
- 80006d0:	681b      	ldr	r3, [r3, #0]
- 80006d2:	4a0f      	ldr	r2, [pc, #60]	; (8000710 <SystemInit+0x68>)
- 80006d4:	f023 53a8 	bic.w	r3, r3, #352321536	; 0x15000000
- 80006d8:	f423 2310 	bic.w	r3, r3, #589824	; 0x90000
- 80006dc:	6013      	str	r3, [r2, #0]
+ 8000702:	4b10      	ldr	r3, [pc, #64]	; (8000744 <SystemInit+0x68>)
+ 8000704:	681b      	ldr	r3, [r3, #0]
+ 8000706:	4a0f      	ldr	r2, [pc, #60]	; (8000744 <SystemInit+0x68>)
+ 8000708:	f023 53a8 	bic.w	r3, r3, #352321536	; 0x15000000
+ 800070c:	f423 2310 	bic.w	r3, r3, #589824	; 0x90000
+ 8000710:	6013      	str	r3, [r2, #0]
 
   /* Reset PLLCFGR register */
   RCC->PLLCFGR = 0x00001000U;
- 80006de:	4b0c      	ldr	r3, [pc, #48]	; (8000710 <SystemInit+0x68>)
- 80006e0:	f44f 5280 	mov.w	r2, #4096	; 0x1000
- 80006e4:	60da      	str	r2, [r3, #12]
+ 8000712:	4b0c      	ldr	r3, [pc, #48]	; (8000744 <SystemInit+0x68>)
+ 8000714:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 8000718:	60da      	str	r2, [r3, #12]
 
   /* Reset HSEBYP bit */
   RCC->CR &= 0xFFFBFFFFU;
- 80006e6:	4b0a      	ldr	r3, [pc, #40]	; (8000710 <SystemInit+0x68>)
- 80006e8:	681b      	ldr	r3, [r3, #0]
- 80006ea:	4a09      	ldr	r2, [pc, #36]	; (8000710 <SystemInit+0x68>)
- 80006ec:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
- 80006f0:	6013      	str	r3, [r2, #0]
+ 800071a:	4b0a      	ldr	r3, [pc, #40]	; (8000744 <SystemInit+0x68>)
+ 800071c:	681b      	ldr	r3, [r3, #0]
+ 800071e:	4a09      	ldr	r2, [pc, #36]	; (8000744 <SystemInit+0x68>)
+ 8000720:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8000724:	6013      	str	r3, [r2, #0]
 
   /* Disable all interrupts */
   RCC->CIER = 0x00000000U;
- 80006f2:	4b07      	ldr	r3, [pc, #28]	; (8000710 <SystemInit+0x68>)
- 80006f4:	2200      	movs	r2, #0
- 80006f6:	619a      	str	r2, [r3, #24]
+ 8000726:	4b07      	ldr	r3, [pc, #28]	; (8000744 <SystemInit+0x68>)
+ 8000728:	2200      	movs	r2, #0
+ 800072a:	619a      	str	r2, [r3, #24]
 
   /* Configure the Vector Table location add offset address ------------------*/
 #ifdef VECT_TAB_SRAM
   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 80006f8:	4b04      	ldr	r3, [pc, #16]	; (800070c <SystemInit+0x64>)
- 80006fa:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
- 80006fe:	609a      	str	r2, [r3, #8]
+ 800072c:	4b04      	ldr	r3, [pc, #16]	; (8000740 <SystemInit+0x64>)
+ 800072e:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
+ 8000732:	609a      	str	r2, [r3, #8]
 #endif
 }
- 8000700:	bf00      	nop
- 8000702:	46bd      	mov	sp, r7
- 8000704:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000708:	4770      	bx	lr
- 800070a:	bf00      	nop
- 800070c:	e000ed00 	.word	0xe000ed00
- 8000710:	40021000 	.word	0x40021000
+ 8000734:	bf00      	nop
+ 8000736:	46bd      	mov	sp, r7
+ 8000738:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800073c:	4770      	bx	lr
+ 800073e:	bf00      	nop
+ 8000740:	e000ed00 	.word	0xe000ed00
+ 8000744:	40021000 	.word	0x40021000
 
-08000714 <SystemCoreClockUpdate>:
+08000748 <SystemCoreClockUpdate>:
   *
   * @param  None
   * @retval None
   */
 void SystemCoreClockUpdate(void)
 {
- 8000714:	b480      	push	{r7}
- 8000716:	b087      	sub	sp, #28
- 8000718:	af00      	add	r7, sp, #0
+ 8000748:	b480      	push	{r7}
+ 800074a:	b087      	sub	sp, #28
+ 800074c:	af00      	add	r7, sp, #0
   uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
- 800071a:	2300      	movs	r3, #0
- 800071c:	60fb      	str	r3, [r7, #12]
- 800071e:	2300      	movs	r3, #0
- 8000720:	617b      	str	r3, [r7, #20]
- 8000722:	2300      	movs	r3, #0
- 8000724:	613b      	str	r3, [r7, #16]
- 8000726:	2302      	movs	r3, #2
- 8000728:	60bb      	str	r3, [r7, #8]
- 800072a:	2300      	movs	r3, #0
- 800072c:	607b      	str	r3, [r7, #4]
- 800072e:	2302      	movs	r3, #2
- 8000730:	603b      	str	r3, [r7, #0]
+ 800074e:	2300      	movs	r3, #0
+ 8000750:	60fb      	str	r3, [r7, #12]
+ 8000752:	2300      	movs	r3, #0
+ 8000754:	617b      	str	r3, [r7, #20]
+ 8000756:	2300      	movs	r3, #0
+ 8000758:	613b      	str	r3, [r7, #16]
+ 800075a:	2302      	movs	r3, #2
+ 800075c:	60bb      	str	r3, [r7, #8]
+ 800075e:	2300      	movs	r3, #0
+ 8000760:	607b      	str	r3, [r7, #4]
+ 8000762:	2302      	movs	r3, #2
+ 8000764:	603b      	str	r3, [r7, #0]
 
   /* Get MSI Range frequency--------------------------------------------------*/
   if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
- 8000732:	4b4f      	ldr	r3, [pc, #316]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000734:	681b      	ldr	r3, [r3, #0]
- 8000736:	f003 0308 	and.w	r3, r3, #8
- 800073a:	2b00      	cmp	r3, #0
- 800073c:	d107      	bne.n	800074e <SystemCoreClockUpdate+0x3a>
+ 8000766:	4b4f      	ldr	r3, [pc, #316]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000768:	681b      	ldr	r3, [r3, #0]
+ 800076a:	f003 0308 	and.w	r3, r3, #8
+ 800076e:	2b00      	cmp	r3, #0
+ 8000770:	d107      	bne.n	8000782 <SystemCoreClockUpdate+0x3a>
   { /* MSISRANGE from RCC_CSR applies */
     msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
- 800073e:	4b4c      	ldr	r3, [pc, #304]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000740:	f8d3 3094 	ldr.w	r3, [r3, #148]	; 0x94
- 8000744:	0a1b      	lsrs	r3, r3, #8
- 8000746:	f003 030f 	and.w	r3, r3, #15
- 800074a:	617b      	str	r3, [r7, #20]
- 800074c:	e005      	b.n	800075a <SystemCoreClockUpdate+0x46>
+ 8000772:	4b4c      	ldr	r3, [pc, #304]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000774:	f8d3 3094 	ldr.w	r3, [r3, #148]	; 0x94
+ 8000778:	0a1b      	lsrs	r3, r3, #8
+ 800077a:	f003 030f 	and.w	r3, r3, #15
+ 800077e:	617b      	str	r3, [r7, #20]
+ 8000780:	e005      	b.n	800078e <SystemCoreClockUpdate+0x46>
   }
   else
   { /* MSIRANGE from RCC_CR applies */
     msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
- 800074e:	4b48      	ldr	r3, [pc, #288]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000750:	681b      	ldr	r3, [r3, #0]
- 8000752:	091b      	lsrs	r3, r3, #4
- 8000754:	f003 030f 	and.w	r3, r3, #15
- 8000758:	617b      	str	r3, [r7, #20]
+ 8000782:	4b48      	ldr	r3, [pc, #288]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000784:	681b      	ldr	r3, [r3, #0]
+ 8000786:	091b      	lsrs	r3, r3, #4
+ 8000788:	f003 030f 	and.w	r3, r3, #15
+ 800078c:	617b      	str	r3, [r7, #20]
   }
   /*MSI frequency range in HZ*/
   msirange = MSIRangeTable[msirange];
- 800075a:	4a46      	ldr	r2, [pc, #280]	; (8000874 <SystemCoreClockUpdate+0x160>)
- 800075c:	697b      	ldr	r3, [r7, #20]
- 800075e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8000762:	617b      	str	r3, [r7, #20]
+ 800078e:	4a46      	ldr	r2, [pc, #280]	; (80008a8 <SystemCoreClockUpdate+0x160>)
+ 8000790:	697b      	ldr	r3, [r7, #20]
+ 8000792:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8000796:	617b      	str	r3, [r7, #20]
 
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (RCC->CFGR & RCC_CFGR_SWS)
- 8000764:	4b42      	ldr	r3, [pc, #264]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000766:	689b      	ldr	r3, [r3, #8]
- 8000768:	f003 030c 	and.w	r3, r3, #12
- 800076c:	2b0c      	cmp	r3, #12
- 800076e:	d865      	bhi.n	800083c <SystemCoreClockUpdate+0x128>
- 8000770:	a201      	add	r2, pc, #4	; (adr r2, 8000778 <SystemCoreClockUpdate+0x64>)
- 8000772:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 8000776:	bf00      	nop
- 8000778:	080007ad 	.word	0x080007ad
- 800077c:	0800083d 	.word	0x0800083d
- 8000780:	0800083d 	.word	0x0800083d
- 8000784:	0800083d 	.word	0x0800083d
- 8000788:	080007b5 	.word	0x080007b5
- 800078c:	0800083d 	.word	0x0800083d
- 8000790:	0800083d 	.word	0x0800083d
- 8000794:	0800083d 	.word	0x0800083d
- 8000798:	080007bd 	.word	0x080007bd
- 800079c:	0800083d 	.word	0x0800083d
- 80007a0:	0800083d 	.word	0x0800083d
- 80007a4:	0800083d 	.word	0x0800083d
- 80007a8:	080007c5 	.word	0x080007c5
+ 8000798:	4b42      	ldr	r3, [pc, #264]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 800079a:	689b      	ldr	r3, [r3, #8]
+ 800079c:	f003 030c 	and.w	r3, r3, #12
+ 80007a0:	2b0c      	cmp	r3, #12
+ 80007a2:	d865      	bhi.n	8000870 <SystemCoreClockUpdate+0x128>
+ 80007a4:	a201      	add	r2, pc, #4	; (adr r2, 80007ac <SystemCoreClockUpdate+0x64>)
+ 80007a6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 80007aa:	bf00      	nop
+ 80007ac:	080007e1 	.word	0x080007e1
+ 80007b0:	08000871 	.word	0x08000871
+ 80007b4:	08000871 	.word	0x08000871
+ 80007b8:	08000871 	.word	0x08000871
+ 80007bc:	080007e9 	.word	0x080007e9
+ 80007c0:	08000871 	.word	0x08000871
+ 80007c4:	08000871 	.word	0x08000871
+ 80007c8:	08000871 	.word	0x08000871
+ 80007cc:	080007f1 	.word	0x080007f1
+ 80007d0:	08000871 	.word	0x08000871
+ 80007d4:	08000871 	.word	0x08000871
+ 80007d8:	08000871 	.word	0x08000871
+ 80007dc:	080007f9 	.word	0x080007f9
   {
     case 0x00:  /* MSI used as system clock source */
       SystemCoreClock = msirange;
- 80007ac:	4a32      	ldr	r2, [pc, #200]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 80007ae:	697b      	ldr	r3, [r7, #20]
- 80007b0:	6013      	str	r3, [r2, #0]
+ 80007e0:	4a32      	ldr	r2, [pc, #200]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 80007e2:	697b      	ldr	r3, [r7, #20]
+ 80007e4:	6013      	str	r3, [r2, #0]
       break;
- 80007b2:	e047      	b.n	8000844 <SystemCoreClockUpdate+0x130>
+ 80007e6:	e047      	b.n	8000878 <SystemCoreClockUpdate+0x130>
 
     case 0x04:  /* HSI used as system clock source */
       SystemCoreClock = HSI_VALUE;
- 80007b4:	4b30      	ldr	r3, [pc, #192]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 80007b6:	4a31      	ldr	r2, [pc, #196]	; (800087c <SystemCoreClockUpdate+0x168>)
- 80007b8:	601a      	str	r2, [r3, #0]
+ 80007e8:	4b30      	ldr	r3, [pc, #192]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 80007ea:	4a31      	ldr	r2, [pc, #196]	; (80008b0 <SystemCoreClockUpdate+0x168>)
+ 80007ec:	601a      	str	r2, [r3, #0]
       break;
- 80007ba:	e043      	b.n	8000844 <SystemCoreClockUpdate+0x130>
+ 80007ee:	e043      	b.n	8000878 <SystemCoreClockUpdate+0x130>
 
     case 0x08:  /* HSE used as system clock source */
       SystemCoreClock = HSE_VALUE;
- 80007bc:	4b2e      	ldr	r3, [pc, #184]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 80007be:	4a30      	ldr	r2, [pc, #192]	; (8000880 <SystemCoreClockUpdate+0x16c>)
- 80007c0:	601a      	str	r2, [r3, #0]
+ 80007f0:	4b2e      	ldr	r3, [pc, #184]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 80007f2:	4a30      	ldr	r2, [pc, #192]	; (80008b4 <SystemCoreClockUpdate+0x16c>)
+ 80007f4:	601a      	str	r2, [r3, #0]
       break;
- 80007c2:	e03f      	b.n	8000844 <SystemCoreClockUpdate+0x130>
+ 80007f6:	e03f      	b.n	8000878 <SystemCoreClockUpdate+0x130>
 
     case 0x0C:  /* PLL used as system clock  source */
       /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
          SYSCLK = PLL_VCO / PLLR
          */
       pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
- 80007c4:	4b2a      	ldr	r3, [pc, #168]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 80007c6:	68db      	ldr	r3, [r3, #12]
- 80007c8:	f003 0303 	and.w	r3, r3, #3
- 80007cc:	607b      	str	r3, [r7, #4]
+ 80007f8:	4b2a      	ldr	r3, [pc, #168]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 80007fa:	68db      	ldr	r3, [r3, #12]
+ 80007fc:	f003 0303 	and.w	r3, r3, #3
+ 8000800:	607b      	str	r3, [r7, #4]
       pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
- 80007ce:	4b28      	ldr	r3, [pc, #160]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 80007d0:	68db      	ldr	r3, [r3, #12]
- 80007d2:	091b      	lsrs	r3, r3, #4
- 80007d4:	f003 0307 	and.w	r3, r3, #7
- 80007d8:	3301      	adds	r3, #1
- 80007da:	603b      	str	r3, [r7, #0]
+ 8000802:	4b28      	ldr	r3, [pc, #160]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000804:	68db      	ldr	r3, [r3, #12]
+ 8000806:	091b      	lsrs	r3, r3, #4
+ 8000808:	f003 0307 	and.w	r3, r3, #7
+ 800080c:	3301      	adds	r3, #1
+ 800080e:	603b      	str	r3, [r7, #0]
 
       switch (pllsource)
- 80007dc:	687b      	ldr	r3, [r7, #4]
- 80007de:	2b02      	cmp	r3, #2
- 80007e0:	d002      	beq.n	80007e8 <SystemCoreClockUpdate+0xd4>
- 80007e2:	2b03      	cmp	r3, #3
- 80007e4:	d006      	beq.n	80007f4 <SystemCoreClockUpdate+0xe0>
- 80007e6:	e00b      	b.n	8000800 <SystemCoreClockUpdate+0xec>
+ 8000810:	687b      	ldr	r3, [r7, #4]
+ 8000812:	2b02      	cmp	r3, #2
+ 8000814:	d002      	beq.n	800081c <SystemCoreClockUpdate+0xd4>
+ 8000816:	2b03      	cmp	r3, #3
+ 8000818:	d006      	beq.n	8000828 <SystemCoreClockUpdate+0xe0>
+ 800081a:	e00b      	b.n	8000834 <SystemCoreClockUpdate+0xec>
       {
         case 0x02:  /* HSI used as PLL clock source */
           pllvco = (HSI_VALUE / pllm);
- 80007e8:	4a24      	ldr	r2, [pc, #144]	; (800087c <SystemCoreClockUpdate+0x168>)
- 80007ea:	683b      	ldr	r3, [r7, #0]
- 80007ec:	fbb2 f3f3 	udiv	r3, r2, r3
- 80007f0:	613b      	str	r3, [r7, #16]
+ 800081c:	4a24      	ldr	r2, [pc, #144]	; (80008b0 <SystemCoreClockUpdate+0x168>)
+ 800081e:	683b      	ldr	r3, [r7, #0]
+ 8000820:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8000824:	613b      	str	r3, [r7, #16]
           break;
- 80007f2:	e00b      	b.n	800080c <SystemCoreClockUpdate+0xf8>
+ 8000826:	e00b      	b.n	8000840 <SystemCoreClockUpdate+0xf8>
 
         case 0x03:  /* HSE used as PLL clock source */
           pllvco = (HSE_VALUE / pllm);
- 80007f4:	4a22      	ldr	r2, [pc, #136]	; (8000880 <SystemCoreClockUpdate+0x16c>)
- 80007f6:	683b      	ldr	r3, [r7, #0]
- 80007f8:	fbb2 f3f3 	udiv	r3, r2, r3
- 80007fc:	613b      	str	r3, [r7, #16]
+ 8000828:	4a22      	ldr	r2, [pc, #136]	; (80008b4 <SystemCoreClockUpdate+0x16c>)
+ 800082a:	683b      	ldr	r3, [r7, #0]
+ 800082c:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8000830:	613b      	str	r3, [r7, #16]
           break;
- 80007fe:	e005      	b.n	800080c <SystemCoreClockUpdate+0xf8>
+ 8000832:	e005      	b.n	8000840 <SystemCoreClockUpdate+0xf8>
 
         default:    /* MSI used as PLL clock source */
           pllvco = (msirange / pllm);
- 8000800:	697a      	ldr	r2, [r7, #20]
- 8000802:	683b      	ldr	r3, [r7, #0]
- 8000804:	fbb2 f3f3 	udiv	r3, r2, r3
- 8000808:	613b      	str	r3, [r7, #16]
+ 8000834:	697a      	ldr	r2, [r7, #20]
+ 8000836:	683b      	ldr	r3, [r7, #0]
+ 8000838:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800083c:	613b      	str	r3, [r7, #16]
           break;
- 800080a:	bf00      	nop
+ 800083e:	bf00      	nop
       }
       pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
- 800080c:	4b18      	ldr	r3, [pc, #96]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 800080e:	68db      	ldr	r3, [r3, #12]
- 8000810:	0a1b      	lsrs	r3, r3, #8
- 8000812:	f003 027f 	and.w	r2, r3, #127	; 0x7f
- 8000816:	693b      	ldr	r3, [r7, #16]
- 8000818:	fb02 f303 	mul.w	r3, r2, r3
- 800081c:	613b      	str	r3, [r7, #16]
+ 8000840:	4b18      	ldr	r3, [pc, #96]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000842:	68db      	ldr	r3, [r3, #12]
+ 8000844:	0a1b      	lsrs	r3, r3, #8
+ 8000846:	f003 027f 	and.w	r2, r3, #127	; 0x7f
+ 800084a:	693b      	ldr	r3, [r7, #16]
+ 800084c:	fb02 f303 	mul.w	r3, r2, r3
+ 8000850:	613b      	str	r3, [r7, #16]
       pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
- 800081e:	4b14      	ldr	r3, [pc, #80]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000820:	68db      	ldr	r3, [r3, #12]
- 8000822:	0e5b      	lsrs	r3, r3, #25
- 8000824:	f003 0303 	and.w	r3, r3, #3
- 8000828:	3301      	adds	r3, #1
- 800082a:	005b      	lsls	r3, r3, #1
- 800082c:	60bb      	str	r3, [r7, #8]
+ 8000852:	4b14      	ldr	r3, [pc, #80]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 8000854:	68db      	ldr	r3, [r3, #12]
+ 8000856:	0e5b      	lsrs	r3, r3, #25
+ 8000858:	f003 0303 	and.w	r3, r3, #3
+ 800085c:	3301      	adds	r3, #1
+ 800085e:	005b      	lsls	r3, r3, #1
+ 8000860:	60bb      	str	r3, [r7, #8]
       SystemCoreClock = pllvco/pllr;
- 800082e:	693a      	ldr	r2, [r7, #16]
- 8000830:	68bb      	ldr	r3, [r7, #8]
- 8000832:	fbb2 f3f3 	udiv	r3, r2, r3
- 8000836:	4a10      	ldr	r2, [pc, #64]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 8000838:	6013      	str	r3, [r2, #0]
+ 8000862:	693a      	ldr	r2, [r7, #16]
+ 8000864:	68bb      	ldr	r3, [r7, #8]
+ 8000866:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800086a:	4a10      	ldr	r2, [pc, #64]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 800086c:	6013      	str	r3, [r2, #0]
       break;
- 800083a:	e003      	b.n	8000844 <SystemCoreClockUpdate+0x130>
+ 800086e:	e003      	b.n	8000878 <SystemCoreClockUpdate+0x130>
 
     default:
       SystemCoreClock = msirange;
- 800083c:	4a0e      	ldr	r2, [pc, #56]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 800083e:	697b      	ldr	r3, [r7, #20]
- 8000840:	6013      	str	r3, [r2, #0]
+ 8000870:	4a0e      	ldr	r2, [pc, #56]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 8000872:	697b      	ldr	r3, [r7, #20]
+ 8000874:	6013      	str	r3, [r2, #0]
       break;
- 8000842:	bf00      	nop
+ 8000876:	bf00      	nop
   }
   /* Compute HCLK clock frequency --------------------------------------------*/
   /* Get HCLK prescaler */
   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
- 8000844:	4b0a      	ldr	r3, [pc, #40]	; (8000870 <SystemCoreClockUpdate+0x15c>)
- 8000846:	689b      	ldr	r3, [r3, #8]
- 8000848:	091b      	lsrs	r3, r3, #4
- 800084a:	f003 030f 	and.w	r3, r3, #15
- 800084e:	4a0d      	ldr	r2, [pc, #52]	; (8000884 <SystemCoreClockUpdate+0x170>)
- 8000850:	5cd3      	ldrb	r3, [r2, r3]
- 8000852:	60fb      	str	r3, [r7, #12]
+ 8000878:	4b0a      	ldr	r3, [pc, #40]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
+ 800087a:	689b      	ldr	r3, [r3, #8]
+ 800087c:	091b      	lsrs	r3, r3, #4
+ 800087e:	f003 030f 	and.w	r3, r3, #15
+ 8000882:	4a0d      	ldr	r2, [pc, #52]	; (80008b8 <SystemCoreClockUpdate+0x170>)
+ 8000884:	5cd3      	ldrb	r3, [r2, r3]
+ 8000886:	60fb      	str	r3, [r7, #12]
   /* HCLK clock frequency */
   SystemCoreClock >>= tmp;
- 8000854:	4b08      	ldr	r3, [pc, #32]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 8000856:	681a      	ldr	r2, [r3, #0]
- 8000858:	68fb      	ldr	r3, [r7, #12]
- 800085a:	fa22 f303 	lsr.w	r3, r2, r3
- 800085e:	4a06      	ldr	r2, [pc, #24]	; (8000878 <SystemCoreClockUpdate+0x164>)
- 8000860:	6013      	str	r3, [r2, #0]
+ 8000888:	4b08      	ldr	r3, [pc, #32]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 800088a:	681a      	ldr	r2, [r3, #0]
+ 800088c:	68fb      	ldr	r3, [r7, #12]
+ 800088e:	fa22 f303 	lsr.w	r3, r2, r3
+ 8000892:	4a06      	ldr	r2, [pc, #24]	; (80008ac <SystemCoreClockUpdate+0x164>)
+ 8000894:	6013      	str	r3, [r2, #0]
 }
- 8000862:	bf00      	nop
- 8000864:	371c      	adds	r7, #28
- 8000866:	46bd      	mov	sp, r7
- 8000868:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800086c:	4770      	bx	lr
- 800086e:	bf00      	nop
- 8000870:	40021000 	.word	0x40021000
- 8000874:	0800099c 	.word	0x0800099c
- 8000878:	20000000 	.word	0x20000000
- 800087c:	00f42400 	.word	0x00f42400
- 8000880:	007a1200 	.word	0x007a1200
- 8000884:	0800098c 	.word	0x0800098c
+ 8000896:	bf00      	nop
+ 8000898:	371c      	adds	r7, #28
+ 800089a:	46bd      	mov	sp, r7
+ 800089c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80008a0:	4770      	bx	lr
+ 80008a2:	bf00      	nop
+ 80008a4:	40021000 	.word	0x40021000
+ 80008a8:	080009cc 	.word	0x080009cc
+ 80008ac:	20000000 	.word	0x20000000
+ 80008b0:	00f42400 	.word	0x00f42400
+ 80008b4:	007a1200 	.word	0x007a1200
+ 80008b8:	080009bc 	.word	0x080009bc
 
-08000888 <Reset_Handler>:
+080008bc <Reset_Handler>:
 
     .section	.text.Reset_Handler
 	.weak	Reset_Handler
 	.type	Reset_Handler, %function
 Reset_Handler:
   ldr   sp, =_estack    /* Set stack pointer */
- 8000888:	f8df d034 	ldr.w	sp, [pc, #52]	; 80008c0 <LoopForever+0x2>
+ 80008bc:	f8df d034 	ldr.w	sp, [pc, #52]	; 80008f4 <LoopForever+0x2>
 
 /* Call the clock system initialization function.*/
     bl  SystemInit
- 800088c:	f7ff ff0c 	bl	80006a8 <SystemInit>
+ 80008c0:	f7ff ff0c 	bl	80006dc <SystemInit>
 
 /* Copy the data segment initializers from flash to SRAM */
   movs	r1, #0
- 8000890:	2100      	movs	r1, #0
+ 80008c4:	2100      	movs	r1, #0
   b	LoopCopyDataInit
- 8000892:	e003      	b.n	800089c <LoopCopyDataInit>
+ 80008c6:	e003      	b.n	80008d0 <LoopCopyDataInit>
 
-08000894 <CopyDataInit>:
+080008c8 <CopyDataInit>:
 
 CopyDataInit:
 	ldr	r3, =_sidata
- 8000894:	4b0b      	ldr	r3, [pc, #44]	; (80008c4 <LoopForever+0x6>)
+ 80008c8:	4b0b      	ldr	r3, [pc, #44]	; (80008f8 <LoopForever+0x6>)
 	ldr	r3, [r3, r1]
- 8000896:	585b      	ldr	r3, [r3, r1]
+ 80008ca:	585b      	ldr	r3, [r3, r1]
 	str	r3, [r0, r1]
- 8000898:	5043      	str	r3, [r0, r1]
+ 80008cc:	5043      	str	r3, [r0, r1]
 	adds	r1, r1, #4
- 800089a:	3104      	adds	r1, #4
+ 80008ce:	3104      	adds	r1, #4
 
-0800089c <LoopCopyDataInit>:
+080008d0 <LoopCopyDataInit>:
 
 LoopCopyDataInit:
 	ldr	r0, =_sdata
- 800089c:	480a      	ldr	r0, [pc, #40]	; (80008c8 <LoopForever+0xa>)
+ 80008d0:	480a      	ldr	r0, [pc, #40]	; (80008fc <LoopForever+0xa>)
 	ldr	r3, =_edata
- 800089e:	4b0b      	ldr	r3, [pc, #44]	; (80008cc <LoopForever+0xe>)
+ 80008d2:	4b0b      	ldr	r3, [pc, #44]	; (8000900 <LoopForever+0xe>)
 	adds	r2, r0, r1
- 80008a0:	1842      	adds	r2, r0, r1
+ 80008d4:	1842      	adds	r2, r0, r1
 	cmp	r2, r3
- 80008a2:	429a      	cmp	r2, r3
+ 80008d6:	429a      	cmp	r2, r3
 	bcc	CopyDataInit
- 80008a4:	d3f6      	bcc.n	8000894 <CopyDataInit>
+ 80008d8:	d3f6      	bcc.n	80008c8 <CopyDataInit>
 	ldr	r2, =_sbss
- 80008a6:	4a0a      	ldr	r2, [pc, #40]	; (80008d0 <LoopForever+0x12>)
+ 80008da:	4a0a      	ldr	r2, [pc, #40]	; (8000904 <LoopForever+0x12>)
 	b	LoopFillZerobss
- 80008a8:	e002      	b.n	80008b0 <LoopFillZerobss>
+ 80008dc:	e002      	b.n	80008e4 <LoopFillZerobss>
 
-080008aa <FillZerobss>:
+080008de <FillZerobss>:
 /* Zero fill the bss segment. */
 FillZerobss:
 	movs	r3, #0
- 80008aa:	2300      	movs	r3, #0
+ 80008de:	2300      	movs	r3, #0
 	str	r3, [r2], #4
- 80008ac:	f842 3b04 	str.w	r3, [r2], #4
+ 80008e0:	f842 3b04 	str.w	r3, [r2], #4
 
-080008b0 <LoopFillZerobss>:
+080008e4 <LoopFillZerobss>:
 
 LoopFillZerobss:
 	ldr	r3, = _ebss
- 80008b0:	4b08      	ldr	r3, [pc, #32]	; (80008d4 <LoopForever+0x16>)
+ 80008e4:	4b08      	ldr	r3, [pc, #32]	; (8000908 <LoopForever+0x16>)
 	cmp	r2, r3
- 80008b2:	429a      	cmp	r2, r3
+ 80008e6:	429a      	cmp	r2, r3
 	bcc	FillZerobss
- 80008b4:	d3f9      	bcc.n	80008aa <FillZerobss>
+ 80008e8:	d3f9      	bcc.n	80008de <FillZerobss>
 
 /* Call static constructors */
     bl __libc_init_array
- 80008b6:	f000 f839 	bl	800092c <__libc_init_array>
+ 80008ea:	f000 f837 	bl	800095c <__libc_init_array>
 /* Call the application's entry point.*/
 	bl	main
- 80008ba:	f7ff fe7f 	bl	80005bc <main>
+ 80008ee:	f7ff fe7f 	bl	80005f0 <main>
 
-080008be <LoopForever>:
+080008f2 <LoopForever>:
 
 LoopForever:
     b LoopForever
- 80008be:	e7fe      	b.n	80008be <LoopForever>
+ 80008f2:	e7fe      	b.n	80008f2 <LoopForever>
   ldr   sp, =_estack    /* Set stack pointer */
- 80008c0:	20018000 	.word	0x20018000
+ 80008f4:	20018000 	.word	0x20018000
 	ldr	r3, =_sidata
- 80008c4:	080009d4 	.word	0x080009d4
+ 80008f8:	08000a04 	.word	0x08000a04
 	ldr	r0, =_sdata
- 80008c8:	20000000 	.word	0x20000000
+ 80008fc:	20000000 	.word	0x20000000
 	ldr	r3, =_edata
- 80008cc:	20000004 	.word	0x20000004
+ 8000900:	20000004 	.word	0x20000004
 	ldr	r2, =_sbss
- 80008d0:	20000004 	.word	0x20000004
+ 8000904:	20000004 	.word	0x20000004
 	ldr	r3, = _ebss
- 80008d4:	20000028 	.word	0x20000028
+ 8000908:	20000028 	.word	0x20000028
 
-080008d8 <ADC1_2_IRQHandler>:
+0800090c <ADC1_2_IRQHandler>:
  * @retval : None
 */
     .section	.text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
 	b	Infinite_Loop
- 80008d8:	e7fe      	b.n	80008d8 <ADC1_2_IRQHandler>
+ 800090c:	e7fe      	b.n	800090c <ADC1_2_IRQHandler>
 	...
 
-080008dc <LL_InitTick>:
+08000910 <LL_InitTick>:
   *         configuration by calling this function, for a delay use rather osDelay RTOS service.
   * @param  Ticks Number of ticks
   * @retval None
   */
 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 {
- 80008dc:	b480      	push	{r7}
- 80008de:	b083      	sub	sp, #12
- 80008e0:	af00      	add	r7, sp, #0
- 80008e2:	6078      	str	r0, [r7, #4]
- 80008e4:	6039      	str	r1, [r7, #0]
+ 8000910:	b480      	push	{r7}
+ 8000912:	b083      	sub	sp, #12
+ 8000914:	af00      	add	r7, sp, #0
+ 8000916:	6078      	str	r0, [r7, #4]
+ 8000918:	6039      	str	r1, [r7, #0]
   /* Configure the SysTick to have interrupt in 1ms time base */
   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
- 80008e6:	687a      	ldr	r2, [r7, #4]
- 80008e8:	683b      	ldr	r3, [r7, #0]
- 80008ea:	fbb2 f3f3 	udiv	r3, r2, r3
- 80008ee:	4a07      	ldr	r2, [pc, #28]	; (800090c <LL_InitTick+0x30>)
- 80008f0:	3b01      	subs	r3, #1
- 80008f2:	6053      	str	r3, [r2, #4]
+ 800091a:	687a      	ldr	r2, [r7, #4]
+ 800091c:	683b      	ldr	r3, [r7, #0]
+ 800091e:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8000922:	4a07      	ldr	r2, [pc, #28]	; (8000940 <LL_InitTick+0x30>)
+ 8000924:	3b01      	subs	r3, #1
+ 8000926:	6053      	str	r3, [r2, #4]
   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
- 80008f4:	4b05      	ldr	r3, [pc, #20]	; (800090c <LL_InitTick+0x30>)
- 80008f6:	2200      	movs	r2, #0
- 80008f8:	609a      	str	r2, [r3, #8]
+ 8000928:	4b05      	ldr	r3, [pc, #20]	; (8000940 <LL_InitTick+0x30>)
+ 800092a:	2200      	movs	r2, #0
+ 800092c:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 80008fa:	4b04      	ldr	r3, [pc, #16]	; (800090c <LL_InitTick+0x30>)
- 80008fc:	2205      	movs	r2, #5
- 80008fe:	601a      	str	r2, [r3, #0]
+ 800092e:	4b04      	ldr	r3, [pc, #16]	; (8000940 <LL_InitTick+0x30>)
+ 8000930:	2205      	movs	r2, #5
+ 8000932:	601a      	str	r2, [r3, #0]
                    SysTick_CTRL_ENABLE_Msk;
 }
- 8000900:	bf00      	nop
- 8000902:	370c      	adds	r7, #12
- 8000904:	46bd      	mov	sp, r7
- 8000906:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800090a:	4770      	bx	lr
- 800090c:	e000e010 	.word	0xe000e010
+ 8000934:	bf00      	nop
+ 8000936:	370c      	adds	r7, #12
+ 8000938:	46bd      	mov	sp, r7
+ 800093a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800093e:	4770      	bx	lr
+ 8000940:	e000e010 	.word	0xe000e010
 
-08000910 <LL_Init1msTick>:
+08000944 <LL_Init1msTick>:
   * @param  HCLKFrequency HCLK frequency in Hz
   * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
   * @retval None
   */
 void LL_Init1msTick(uint32_t HCLKFrequency)
 {
- 8000910:	b580      	push	{r7, lr}
- 8000912:	b082      	sub	sp, #8
- 8000914:	af00      	add	r7, sp, #0
- 8000916:	6078      	str	r0, [r7, #4]
+ 8000944:	b580      	push	{r7, lr}
+ 8000946:	b082      	sub	sp, #8
+ 8000948:	af00      	add	r7, sp, #0
+ 800094a:	6078      	str	r0, [r7, #4]
   /* Use frequency provided in argument */
-  LL_InitTick(HCLKFrequency, 1000U);
- 8000918:	f44f 717a 	mov.w	r1, #1000	; 0x3e8
- 800091c:	6878      	ldr	r0, [r7, #4]
- 800091e:	f7ff ffdd 	bl	80008dc <LL_InitTick>
+  LL_InitTick(HCLKFrequency, 100U);
+ 800094c:	2164      	movs	r1, #100	; 0x64
+ 800094e:	6878      	ldr	r0, [r7, #4]
+ 8000950:	f7ff ffde 	bl	8000910 <LL_InitTick>
 }
- 8000922:	bf00      	nop
- 8000924:	3708      	adds	r7, #8
- 8000926:	46bd      	mov	sp, r7
- 8000928:	bd80      	pop	{r7, pc}
-	...
+ 8000954:	bf00      	nop
+ 8000956:	3708      	adds	r7, #8
+ 8000958:	46bd      	mov	sp, r7
+ 800095a:	bd80      	pop	{r7, pc}
 
-0800092c <__libc_init_array>:
- 800092c:	b570      	push	{r4, r5, r6, lr}
- 800092e:	4e0d      	ldr	r6, [pc, #52]	; (8000964 <__libc_init_array+0x38>)
- 8000930:	4c0d      	ldr	r4, [pc, #52]	; (8000968 <__libc_init_array+0x3c>)
- 8000932:	1ba4      	subs	r4, r4, r6
- 8000934:	10a4      	asrs	r4, r4, #2
- 8000936:	2500      	movs	r5, #0
- 8000938:	42a5      	cmp	r5, r4
- 800093a:	d109      	bne.n	8000950 <__libc_init_array+0x24>
- 800093c:	4e0b      	ldr	r6, [pc, #44]	; (800096c <__libc_init_array+0x40>)
- 800093e:	4c0c      	ldr	r4, [pc, #48]	; (8000970 <__libc_init_array+0x44>)
- 8000940:	f000 f818 	bl	8000974 <_init>
- 8000944:	1ba4      	subs	r4, r4, r6
- 8000946:	10a4      	asrs	r4, r4, #2
- 8000948:	2500      	movs	r5, #0
- 800094a:	42a5      	cmp	r5, r4
- 800094c:	d105      	bne.n	800095a <__libc_init_array+0x2e>
- 800094e:	bd70      	pop	{r4, r5, r6, pc}
- 8000950:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 8000954:	4798      	blx	r3
- 8000956:	3501      	adds	r5, #1
- 8000958:	e7ee      	b.n	8000938 <__libc_init_array+0xc>
- 800095a:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 800095e:	4798      	blx	r3
- 8000960:	3501      	adds	r5, #1
- 8000962:	e7f2      	b.n	800094a <__libc_init_array+0x1e>
- 8000964:	080009cc 	.word	0x080009cc
- 8000968:	080009cc 	.word	0x080009cc
- 800096c:	080009cc 	.word	0x080009cc
- 8000970:	080009d0 	.word	0x080009d0
+0800095c <__libc_init_array>:
+ 800095c:	b570      	push	{r4, r5, r6, lr}
+ 800095e:	4e0d      	ldr	r6, [pc, #52]	; (8000994 <__libc_init_array+0x38>)
+ 8000960:	4c0d      	ldr	r4, [pc, #52]	; (8000998 <__libc_init_array+0x3c>)
+ 8000962:	1ba4      	subs	r4, r4, r6
+ 8000964:	10a4      	asrs	r4, r4, #2
+ 8000966:	2500      	movs	r5, #0
+ 8000968:	42a5      	cmp	r5, r4
+ 800096a:	d109      	bne.n	8000980 <__libc_init_array+0x24>
+ 800096c:	4e0b      	ldr	r6, [pc, #44]	; (800099c <__libc_init_array+0x40>)
+ 800096e:	4c0c      	ldr	r4, [pc, #48]	; (80009a0 <__libc_init_array+0x44>)
+ 8000970:	f000 f818 	bl	80009a4 <_init>
+ 8000974:	1ba4      	subs	r4, r4, r6
+ 8000976:	10a4      	asrs	r4, r4, #2
+ 8000978:	2500      	movs	r5, #0
+ 800097a:	42a5      	cmp	r5, r4
+ 800097c:	d105      	bne.n	800098a <__libc_init_array+0x2e>
+ 800097e:	bd70      	pop	{r4, r5, r6, pc}
+ 8000980:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 8000984:	4798      	blx	r3
+ 8000986:	3501      	adds	r5, #1
+ 8000988:	e7ee      	b.n	8000968 <__libc_init_array+0xc>
+ 800098a:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 800098e:	4798      	blx	r3
+ 8000990:	3501      	adds	r5, #1
+ 8000992:	e7f2      	b.n	800097a <__libc_init_array+0x1e>
+ 8000994:	080009fc 	.word	0x080009fc
+ 8000998:	080009fc 	.word	0x080009fc
+ 800099c:	080009fc 	.word	0x080009fc
+ 80009a0:	08000a00 	.word	0x08000a00
 
-08000974 <_init>:
- 8000974:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8000976:	bf00      	nop
- 8000978:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800097a:	bc08      	pop	{r3}
- 800097c:	469e      	mov	lr, r3
- 800097e:	4770      	bx	lr
+080009a4 <_init>:
+ 80009a4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80009a6:	bf00      	nop
+ 80009a8:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80009aa:	bc08      	pop	{r3}
+ 80009ac:	469e      	mov	lr, r3
+ 80009ae:	4770      	bx	lr
 
-08000980 <_fini>:
- 8000980:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8000982:	bf00      	nop
- 8000984:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8000986:	bc08      	pop	{r3}
- 8000988:	469e      	mov	lr, r3
- 800098a:	4770      	bx	lr
+080009b0 <_fini>:
+ 80009b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80009b2:	bf00      	nop
+ 80009b4:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80009b6:	bc08      	pop	{r3}
+ 80009b8:	469e      	mov	lr, r3
+ 80009ba:	4770      	bx	lr
diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.map b/L476_ats_blink-master/Debug/L476_ats_blink-master.map
index f792f5d..c8907a6 100644
--- a/L476_ats_blink-master/Debug/L476_ats_blink-master.map
+++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.map
@@ -788,7 +788,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000000                g_pfnVectors
                 0x0000000008000188                . = ALIGN (0x4)
 
-.text           0x0000000008000188      0x804
+.text           0x0000000008000188      0x834
                 0x0000000008000188                . = ALIGN (0x4)
  *(.text)
  .text          0x0000000008000188       0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
@@ -840,222 +840,223 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000538       0x28 Core/Src/main.o
  .text.LL_SYSTICK_EnableIT
                 0x0000000008000560       0x20 Core/Src/main.o
+ .text.LL_LPM_EnableSleep
+                0x0000000008000580       0x20 Core/Src/main.o
  .text.SysTick_Handler
-                0x0000000008000580       0x3c Core/Src/main.o
-                0x0000000008000580                SysTick_Handler
- .text.main     0x00000000080005bc       0x34 Core/Src/main.o
-                0x00000000080005bc                main
+                0x00000000080005a0       0x50 Core/Src/main.o
+                0x00000000080005a0                SysTick_Handler
+ .text.main     0x00000000080005f0       0x34 Core/Src/main.o
+                0x00000000080005f0                main
  .text.SystemClock_Config
-                0x00000000080005f0       0x66 Core/Src/main.o
-                0x00000000080005f0                SystemClock_Config
+                0x0000000008000624       0x66 Core/Src/main.o
+                0x0000000008000624                SystemClock_Config
  .text.NMI_Handler
-                0x0000000008000656        0xe Core/Src/stm32l4xx_it.o
-                0x0000000008000656                NMI_Handler
- .text.HardFault_Handler
-                0x0000000008000664        0x6 Core/Src/stm32l4xx_it.o
-                0x0000000008000664                HardFault_Handler
- .text.MemManage_Handler
-                0x000000000800066a        0x6 Core/Src/stm32l4xx_it.o
-                0x000000000800066a                MemManage_Handler
- .text.BusFault_Handler
-                0x0000000008000670        0x6 Core/Src/stm32l4xx_it.o
-                0x0000000008000670                BusFault_Handler
- .text.UsageFault_Handler
-                0x0000000008000676        0x6 Core/Src/stm32l4xx_it.o
-                0x0000000008000676                UsageFault_Handler
- .text.SVC_Handler
-                0x000000000800067c        0xe Core/Src/stm32l4xx_it.o
-                0x000000000800067c                SVC_Handler
- .text.DebugMon_Handler
                 0x000000000800068a        0xe Core/Src/stm32l4xx_it.o
-                0x000000000800068a                DebugMon_Handler
+                0x000000000800068a                NMI_Handler
+ .text.HardFault_Handler
+                0x0000000008000698        0x6 Core/Src/stm32l4xx_it.o
+                0x0000000008000698                HardFault_Handler
+ .text.MemManage_Handler
+                0x000000000800069e        0x6 Core/Src/stm32l4xx_it.o
+                0x000000000800069e                MemManage_Handler
+ .text.BusFault_Handler
+                0x00000000080006a4        0x6 Core/Src/stm32l4xx_it.o
+                0x00000000080006a4                BusFault_Handler
+ .text.UsageFault_Handler
+                0x00000000080006aa        0x6 Core/Src/stm32l4xx_it.o
+                0x00000000080006aa                UsageFault_Handler
+ .text.SVC_Handler
+                0x00000000080006b0        0xe Core/Src/stm32l4xx_it.o
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  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x00000000080009d0        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .fini_array    0x0000000008000a00        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x00000000080009d4                . = ALIGN (0x4)
-                0x00000000080009d4                _sidata = LOADADDR (.data)
+                0x0000000008000a04                . = ALIGN (0x4)
+                0x0000000008000a04                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000        0x4 load address 0x00000000080009d4
+.data           0x0000000020000000        0x4 load address 0x0000000008000a04
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -1066,11 +1067,11 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000020000004                . = ALIGN (0x4)
                 0x0000000020000004                _edata = .
 
-.igot.plt       0x0000000020000004        0x0 load address 0x00000000080009d8
+.igot.plt       0x0000000020000004        0x0 load address 0x0000000008000a08
  .igot.plt      0x0000000020000004        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
                 0x0000000020000004                . = ALIGN (0x4)
 
-.bss            0x0000000020000004       0x24 load address 0x00000000080009d8
+.bss            0x0000000020000004       0x24 load address 0x0000000008000a08
                 0x0000000020000004                _sbss = .
                 0x0000000020000004                __bss_start__ = _sbss
  *(.bss)
@@ -1088,7 +1089,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000020000028                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000028      0x600 load address 0x00000000080009d8
+                0x0000000020000028      0x600 load address 0x0000000008000a08
                 0x0000000020000028                . = ALIGN (0x8)
                 [!provide]                        PROVIDE (end = .)
                 0x0000000020000028                PROVIDE (_end = .)
@@ -1128,13 +1129,13 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x00000000000001c8       0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
 OUTPUT(L476_ats_blink-master.elf elf32-littlearm)
 
-.debug_info     0x0000000000000000     0x2106
+.debug_info     0x0000000000000000     0x22b2
  .debug_info    0x0000000000000000      0x682 Core/Src/gpio.o
- .debug_info    0x0000000000000682      0x6a7 Core/Src/main.o
- .debug_info    0x0000000000000d29      0x1e6 Core/Src/stm32l4xx_it.o
- .debug_info    0x0000000000000f0f      0x5b4 Core/Src/system_stm32l4xx.o
- .debug_info    0x00000000000014c3       0x22 Core/Startup/startup_stm32l476rgtx.o
- .debug_info    0x00000000000014e5      0xc21 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_info    0x0000000000000682      0x853 Core/Src/main.o
+ .debug_info    0x0000000000000ed5      0x1e6 Core/Src/stm32l4xx_it.o
+ .debug_info    0x00000000000010bb      0x5b4 Core/Src/system_stm32l4xx.o
+ .debug_info    0x000000000000166f       0x22 Core/Startup/startup_stm32l476rgtx.o
+ .debug_info    0x0000000000001691      0xc21 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
 .debug_abbrev   0x0000000000000000      0x771
  .debug_abbrev  0x0000000000000000      0x1ee Core/Src/gpio.o
@@ -1144,27 +1145,27 @@ OUTPUT(L476_ats_blink-master.elf elf32-littlearm)
  .debug_abbrev  0x0000000000000527       0x12 Core/Startup/startup_stm32l476rgtx.o
  .debug_abbrev  0x0000000000000539      0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_aranges  0x0000000000000000      0x2d8
+.debug_aranges  0x0000000000000000      0x2e0
  .debug_aranges
                 0x0000000000000000       0x60 Core/Src/gpio.o
  .debug_aranges
-                0x0000000000000060       0x98 Core/Src/main.o
+                0x0000000000000060       0xa0 Core/Src/main.o
  .debug_aranges
-                0x00000000000000f8       0x58 Core/Src/stm32l4xx_it.o
+                0x0000000000000100       0x58 Core/Src/stm32l4xx_it.o
  .debug_aranges
-                0x0000000000000150       0x28 Core/Src/system_stm32l4xx.o
+                0x0000000000000158       0x28 Core/Src/system_stm32l4xx.o
  .debug_aranges
-                0x0000000000000178       0x28 Core/Startup/startup_stm32l476rgtx.o
+                0x0000000000000180       0x28 Core/Startup/startup_stm32l476rgtx.o
  .debug_aranges
-                0x00000000000001a0      0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+                0x00000000000001a8      0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_ranges   0x0000000000000000      0x280
+.debug_ranges   0x0000000000000000      0x288
  .debug_ranges  0x0000000000000000       0x50 Core/Src/gpio.o
- .debug_ranges  0x0000000000000050       0x88 Core/Src/main.o
- .debug_ranges  0x00000000000000d8       0x48 Core/Src/stm32l4xx_it.o
- .debug_ranges  0x0000000000000120       0x18 Core/Src/system_stm32l4xx.o
- .debug_ranges  0x0000000000000138       0x20 Core/Startup/startup_stm32l476rgtx.o
- .debug_ranges  0x0000000000000158      0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_ranges  0x0000000000000050       0x90 Core/Src/main.o
+ .debug_ranges  0x00000000000000e0       0x48 Core/Src/stm32l4xx_it.o
+ .debug_ranges  0x0000000000000128       0x18 Core/Src/system_stm32l4xx.o
+ .debug_ranges  0x0000000000000140       0x20 Core/Startup/startup_stm32l476rgtx.o
+ .debug_ranges  0x0000000000000160      0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
 .debug_macro    0x0000000000000000    0x1e120
  .debug_macro   0x0000000000000000      0x102 Core/Src/gpio.o
@@ -1201,26 +1202,26 @@ OUTPUT(L476_ats_blink-master.elf elf32-littlearm)
  .debug_macro   0x000000000001dee0      0x19f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
  .debug_macro   0x000000000001e07f       0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_line     0x0000000000000000     0x201e
+.debug_line     0x0000000000000000     0x2035
  .debug_line    0x0000000000000000      0x58c Core/Src/gpio.o
- .debug_line    0x000000000000058c      0x670 Core/Src/main.o
- .debug_line    0x0000000000000bfc      0x613 Core/Src/stm32l4xx_it.o
- .debug_line    0x000000000000120f      0x496 Core/Src/system_stm32l4xx.o
- .debug_line    0x00000000000016a5       0x87 Core/Startup/startup_stm32l476rgtx.o
- .debug_line    0x000000000000172c      0x8f2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_line    0x000000000000058c      0x687 Core/Src/main.o
+ .debug_line    0x0000000000000c13      0x613 Core/Src/stm32l4xx_it.o
+ .debug_line    0x0000000000001226      0x496 Core/Src/system_stm32l4xx.o
+ .debug_line    0x00000000000016bc       0x87 Core/Startup/startup_stm32l476rgtx.o
+ .debug_line    0x0000000000001743      0x8f2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_str      0x0000000000000000    0xa94ae
+.debug_str      0x0000000000000000    0xa94c1
  .debug_str     0x0000000000000000    0x9f87a Core/Src/gpio.o
                                       0x9fa3d (size before relaxing)
- .debug_str     0x000000000009f87a     0x601b Core/Src/main.o
-                                      0xa58f3 (size before relaxing)
- .debug_str     0x00000000000a5895     0x2c92 Core/Src/stm32l4xx_it.o
+ .debug_str     0x000000000009f87a     0x6082 Core/Src/main.o
+                                      0xa595a (size before relaxing)
+ .debug_str     0x00000000000a58fc     0x2c92 Core/Src/stm32l4xx_it.o
                                       0xa821a (size before relaxing)
- .debug_str     0x00000000000a8527       0xd3 Core/Src/system_stm32l4xx.o
+ .debug_str     0x00000000000a858e       0x7f Core/Src/system_stm32l4xx.o
                                       0x9e61f (size before relaxing)
- .debug_str     0x00000000000a85fa       0x36 Core/Startup/startup_stm32l476rgtx.o
+ .debug_str     0x00000000000a860d       0x36 Core/Startup/startup_stm32l476rgtx.o
                                          0x70 (size before relaxing)
- .debug_str     0x00000000000a8630      0xe7e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_str     0x00000000000a8643      0xe7e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
                                       0xa52e5 (size before relaxing)
 
 .comment        0x0000000000000000       0x7b
@@ -1231,10 +1232,10 @@ OUTPUT(L476_ats_blink-master.elf elf32-littlearm)
  .comment       0x000000000000007b       0x7c Core/Src/system_stm32l4xx.o
  .comment       0x000000000000007b       0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_frame    0x0000000000000000      0xa00
+.debug_frame    0x0000000000000000      0xa20
  .debug_frame   0x0000000000000000      0x15c Core/Src/gpio.o
- .debug_frame   0x000000000000015c      0x234 Core/Src/main.o
- .debug_frame   0x0000000000000390       0xf0 Core/Src/stm32l4xx_it.o
- .debug_frame   0x0000000000000480       0x58 Core/Src/system_stm32l4xx.o
- .debug_frame   0x00000000000004d8      0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
- .debug_frame   0x00000000000009d4       0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .debug_frame   0x000000000000015c      0x254 Core/Src/main.o
+ .debug_frame   0x00000000000003b0       0xf0 Core/Src/stm32l4xx_it.o
+ .debug_frame   0x00000000000004a0       0x58 Core/Src/system_stm32l4xx.o
+ .debug_frame   0x00000000000004f8      0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_frame   0x00000000000009f4       0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
diff --git a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h
index c50e827..eedac72 100644
--- a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h
+++ b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h
@@ -282,7 +282,7 @@ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_ENABLE_Msk;
+                   SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
 }
 
 void        LL_Init1msTick(uint32_t HCLKFrequency);
diff --git a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c
deleted file mode 100644
index b1aef8d..0000000
--- a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c
+++ /dev/null
@@ -1,298 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l4xx_ll_gpio.c
-  * @author  MCD Application Team
-  * @brief   GPIO LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l4xx_ll_gpio.h"
-#include "stm32l4xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L4xx_LL_Driver
-  * @{
-  */
-
-#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI)
-
-/** @addtogroup GPIO_LL
-  * @{
-  */
-/** MISRA C:2012 deviation rule has been granted for following rules:
-  * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of
-  * range of the shift operator in following API :
-  * LL_GPIO_Init
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_GPIO_PIN(__VALUE__)          (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
-
-#define IS_LL_GPIO_MODE(__VALUE__)         (((__VALUE__) == LL_GPIO_MODE_INPUT)     ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_OUTPUT)    ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ANALOG))
-
-#define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__)  (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL)  ||\
-                                            ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
-
-#define IS_LL_GPIO_SPEED(__VALUE__)        (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW)       ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM)    ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH)      ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH))
-
-#define IS_LL_GPIO_PULL(__VALUE__)         (((__VALUE__) == LL_GPIO_PULL_NO)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_UP)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_DOWN))
-
-#define IS_LL_GPIO_ALTERNATE(__VALUE__)    (((__VALUE__) == LL_GPIO_AF_0  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_1  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_2  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_3  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_4  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_5  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_6  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_7  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_8  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_9  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_10 )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_11 )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_12 )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_13 )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_14 )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_15 ))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup GPIO_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize GPIO registers (Registers restored to their default values).
-  * @param  GPIOx GPIO Port
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are de-initialized
-  *          - ERROR:   Wrong GPIO Port
-  */
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-
-  /* Force and Release reset on clock of GPIOx Port */
-  if (GPIOx == GPIOA)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOA);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOA);
-  }
-  else if (GPIOx == GPIOB)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOB);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOB);
-  }
-  else if (GPIOx == GPIOC)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOC);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOC);
-  }
-#if defined(GPIOD)
-  else if (GPIOx == GPIOD)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOD);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOD);
-  }
-#endif /* GPIOD */
-#if defined(GPIOE)
-  else if (GPIOx == GPIOE)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOE);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOE);
-  }
-#endif /* GPIOE */
-#if defined(GPIOF)
-  else if (GPIOx == GPIOF)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOF);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOF);
-  }
-#endif /* GPIOF */
-#if defined(GPIOG)
-  else if (GPIOx == GPIOG)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOG);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOG);
-  }
-#endif /* GPIOG */
-#if defined(GPIOH)
-  else if (GPIOx == GPIOH)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH);
-  }
-#endif /* GPIOH */
-#if defined(GPIOI)
-  else if (GPIOx == GPIOI)
-  {
-    LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOI);
-    LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOI);
-  }
-#endif /* GPIOI */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
-  * @param  GPIOx GPIO Port
-  * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
-  *         that contains the configuration information for the specified GPIO peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
-  *          - ERROR:   Not applicable
-  */
-ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  uint32_t pinpos;
-  uint32_t currentpin;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-  assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
-  assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
-  assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
-
-  /* ------------------------- Configure the port pins ---------------- */
-  /* Initialize  pinpos on first pin set */
-  pinpos = POSITION_VAL(GPIO_InitStruct->Pin);
-
-  /* Configure the port pins */
-  while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u)
-  {
-    /* Get current io position */
-    currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos);
-
-    if (currentpin != 0x00u)
-    {
-      /* Pin Mode configuration */
-      LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
-
-      if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-      {
-        /* Check Speed mode parameters */
-        assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
-
-        /* Speed mode configuration */
-        LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
-      }
-
-      /* Pull-up Pull down resistor configuration*/
-      LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
-
-      if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
-      {
-        /* Check Alternate parameter */
-        assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
-
-        /* Speed mode configuration */
-        if (currentpin < LL_GPIO_PIN_8)
-        {
-          LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-        else
-        {
-          LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-      }
-    }
-    pinpos++;
-  }
-
-  if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-  {
-    /* Check Output mode parameters */
-    assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
-
-    /* Output mode configuration*/
-    LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
-
-  }
-  return (SUCCESS);
-}
-
-/**
-  * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
-  * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  /* Reset GPIO init structure parameters values */
-  GPIO_InitStruct->Pin        = LL_GPIO_PIN_ALL;
-  GPIO_InitStruct->Mode       = LL_GPIO_MODE_ANALOG;
-  GPIO_InitStruct->Speed      = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct->Pull       = LL_GPIO_PULL_NO;
-  GPIO_InitStruct->Alternate  = LL_GPIO_AF_0;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c
deleted file mode 100644
index 7b12da7..0000000
--- a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l4xx_ll_pwr.c
-  * @author  MCD Application Team
-  * @brief   PWR LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l4xx_ll_pwr.h"
-#include "stm32l4xx_ll_bus.h"
-
-/** @addtogroup STM32L4xx_LL_Driver
-  * @{
-  */
-
-#if defined(PWR)
-
-/** @defgroup PWR_LL PWR
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup PWR_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup PWR_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the PWR registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: PWR registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_PWR_DeInit(void)
-{
-  /* Force reset of PWR clock */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  /* Release reset of PWR clock */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  return SUCCESS;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* defined(PWR) */
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/L476_ats_blink-master/L476_ats_blink-master.ioc b/L476_ats_blink-master/L476_ats_blink-master.ioc
index f01d8da..aaace26 100644
--- a/L476_ats_blink-master/L476_ats_blink-master.ioc
+++ b/L476_ats_blink-master/L476_ats_blink-master.ioc
@@ -8,8 +8,12 @@ Mcu.IP2=SYS
 Mcu.IPNb=3
 Mcu.Name=STM32L476R(C-E-G)Tx
 Mcu.Package=LQFP64
-Mcu.Pin0=VP_SYS_VS_Systick
-Mcu.PinsNb=1
+Mcu.Pin0=PA13 (JTMS-SWDIO)
+Mcu.Pin1=PA14 (JTCK-SWCLK)
+Mcu.Pin2=PA15 (JTDI)
+Mcu.Pin3=PB3 (JTDO-TRACESWO)
+Mcu.Pin4=VP_SYS_VS_Systick
+Mcu.PinsNb=5
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32L476RGTx
@@ -26,6 +30,14 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+PA13\ (JTMS-SWDIO).Mode=JTAG_4_pins
+PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO
+PA14\ (JTCK-SWCLK).Mode=JTAG_4_pins
+PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK
+PA15\ (JTDI).Mode=JTAG_4_pins
+PA15\ (JTDI).Signal=SYS_JTDI
+PB3\ (JTDO-TRACESWO).Mode=JTAG_4_pins
+PB3\ (JTDO-TRACESWO).Signal=SYS_JTDO-SWO
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
@@ -54,53 +66,54 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=STM32CubeIDE
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false
-RCC.AHBFreq_Value=80000000
-RCC.APB1Freq_Value=80000000
-RCC.APB1TimFreq_Value=80000000
-RCC.APB2Freq_Value=80000000
-RCC.APB2TimFreq_Value=80000000
-RCC.CortexFreq_Value=80000000
-RCC.DFSDMFreq_Value=80000000
-RCC.FCLKCortexFreq_Value=80000000
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-LL-false
+RCC.AHBFreq_Value=24000000
+RCC.APB1Freq_Value=24000000
+RCC.APB1TimFreq_Value=24000000
+RCC.APB2Freq_Value=24000000
+RCC.APB2TimFreq_Value=24000000
+RCC.CortexFreq_Value=24000000
+RCC.DFSDMFreq_Value=24000000
+RCC.FCLKCortexFreq_Value=24000000
 RCC.FamilyName=M
-RCC.HCLKFreq_Value=80000000
+RCC.HCLKFreq_Value=24000000
 RCC.HSE_VALUE=8000000
 RCC.HSI_VALUE=16000000
-RCC.I2C1Freq_Value=80000000
-RCC.I2C2Freq_Value=80000000
-RCC.I2C3Freq_Value=80000000
-RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
-RCC.LPTIM1Freq_Value=80000000
-RCC.LPTIM2Freq_Value=80000000
-RCC.LPUART1Freq_Value=80000000
+RCC.I2C1Freq_Value=24000000
+RCC.I2C2Freq_Value=24000000
+RCC.I2C3Freq_Value=24000000
+RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.LPTIM1Freq_Value=24000000
+RCC.LPTIM2Freq_Value=24000000
+RCC.LPUART1Freq_Value=24000000
 RCC.LSCOPinFreq_Value=32000
 RCC.LSE_VALUE=32768
 RCC.LSI_VALUE=32000
-RCC.MCO1PinFreq_Value=80000000
+RCC.MCO1PinFreq_Value=24000000
 RCC.MSI_VALUE=4000000
-RCC.PLLN=40
-RCC.PLLPoutputFreq_Value=22857142.85714286
-RCC.PLLQoutputFreq_Value=80000000
-RCC.PLLRCLKFreq_Value=80000000
+RCC.PLLN=24
+RCC.PLLPoutputFreq_Value=13714285.714285715
+RCC.PLLQoutputFreq_Value=48000000
+RCC.PLLR=RCC_PLLR_DIV4
+RCC.PLLRCLKFreq_Value=24000000
 RCC.PLLSAI1PoutputFreq_Value=4571428.571428572
 RCC.PLLSAI1QoutputFreq_Value=16000000
 RCC.PLLSAI1RoutputFreq_Value=16000000
 RCC.PLLSAI2PoutputFreq_Value=4571428.571428572
 RCC.PLLSAI2RoutputFreq_Value=16000000
-RCC.PWRFreq_Value=80000000
+RCC.PWRFreq_Value=24000000
 RCC.SAI1Freq_Value=4571428.571428572
 RCC.SAI2Freq_Value=4571428.571428572
-RCC.SWPMI1Freq_Value=80000000
-RCC.SYSCLKFreq_VALUE=80000000
+RCC.SWPMI1Freq_Value=24000000
+RCC.SYSCLKFreq_VALUE=24000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.UART4Freq_Value=80000000
-RCC.UART5Freq_Value=80000000
-RCC.USART1Freq_Value=80000000
-RCC.USART2Freq_Value=80000000
-RCC.USART3Freq_Value=80000000
+RCC.UART4Freq_Value=24000000
+RCC.UART5Freq_Value=24000000
+RCC.USART1Freq_Value=24000000
+RCC.USART2Freq_Value=24000000
+RCC.USART3Freq_Value=24000000
 RCC.VCOInputFreq_Value=4000000
-RCC.VCOOutputFreq_Value=160000000
+RCC.VCOOutputFreq_Value=96000000
 RCC.VCOSAI1OutputFreq_Value=32000000
 RCC.VCOSAI2OutputFreq_Value=32000000
 VP_SYS_VS_Systick.Mode=SysTick