diff --git a/L476_ats_blink-master/.settings/language.settings.xml b/L476_ats_blink-master/.settings/language.settings.xml index 2244f09..0ec0cb0 100644 --- a/L476_ats_blink-master/.settings/language.settings.xml +++ b/L476_ats_blink-master/.settings/language.settings.xml @@ -6,7 +6,7 @@ - + @@ -18,7 +18,7 @@ - + diff --git a/L476_ats_blink-master/Core/Src/main.c b/L476_ats_blink-master/Core/Src/main.c index c1dad82..7a03724 100644 --- a/L476_ats_blink-master/Core/Src/main.c +++ b/L476_ats_blink-master/Core/Src/main.c @@ -10,6 +10,7 @@ #include "stm32l4xx_ll_system.h" #include "stm32l4xx_ll_utils.h" #include "stm32l4xx_ll_gpio.h" +#include "stm32l4xx_ll_cortex.h" // #if defined(USE_FULL_ASSERT) // #include "stm32_assert.h" // #endif /* USE_FULL_ASSERT */ @@ -17,10 +18,21 @@ #include "gpio.h" // systick interrupt handler -//void SysTick_Handler() -//{ - //to be defined if systick interrupt is enabled. -//} +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + if (msTicks == 50){ + LED_GREEN(0); + }else if(msTicks >= 1000){ + msTicks = 0; + LED_GREEN(1); + } +} void SystemClock_Config(void); @@ -34,16 +46,19 @@ GPIO_init(); // init systick timer (tick period at 1 ms) LL_Init1msTick( SystemCoreClock ); +LL_SYSTICK_EnableIT(); + while (1) { - if ( BLUE_BUTTON() ) - LED_GREEN(1); - else { - LED_GREEN(0); - LL_mDelay(950); - LED_GREEN(1); - LL_mDelay(50); - } + if ( BLUE_BUTTON() ){ + blue_mode = 1; + } +// else { +// LED_GREEN(0); +// LL_mDelay(950); +// LED_GREEN(1); +// LL_mDelay(50); +// } } } diff --git a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c index 84c6b1f..613bc7a 100644 --- a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c +++ b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c @@ -179,16 +179,16 @@ void PendSV_Handler(void) /** * @brief This function handles System tick timer. */ -void SysTick_Handler(void) -{ - /* USER CODE BEGIN SysTick_IRQn 0 */ - - /* USER CODE END SysTick_IRQn 0 */ - - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} +//void SysTick_Handler(void) +//{ +// /* USER CODE BEGIN SysTick_IRQn 0 */ +// +// /* USER CODE END SysTick_IRQn 0 */ +// +// /* USER CODE BEGIN SysTick_IRQn 1 */ +// +// /* USER CODE END SysTick_IRQn 1 */ +//} /******************************************************************************/ /* STM32L4xx Peripheral Interrupt Handlers */ diff --git a/L476_ats_blink-master/Debug/Core/Src/gpio.o b/L476_ats_blink-master/Debug/Core/Src/gpio.o index f505bb7..ade0c3d 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/gpio.o and b/L476_ats_blink-master/Debug/Core/Src/gpio.o differ diff --git a/L476_ats_blink-master/Debug/Core/Src/main.d b/L476_ats_blink-master/Debug/Core/Src/main.d index fa16f3f..e18fc88 100644 --- a/L476_ats_blink-master/Debug/Core/Src/main.d +++ b/L476_ats_blink-master/Debug/Core/Src/main.d @@ -12,6 +12,7 @@ Core/Src/main.o: ../Core/Src/main.c \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h \ + ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h \ ../Core/Src/gpio.h ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h: @@ -40,4 +41,6 @@ Core/Src/main.o: ../Core/Src/main.c \ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h: +../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h: + ../Core/Src/gpio.h: diff --git a/L476_ats_blink-master/Debug/Core/Src/main.o b/L476_ats_blink-master/Debug/Core/Src/main.o index 6a588c3..a25367f 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/main.o and b/L476_ats_blink-master/Debug/Core/Src/main.o differ diff --git a/L476_ats_blink-master/Debug/Core/Src/main.su b/L476_ats_blink-master/Debug/Core/Src/main.su index 17db45a..70c16be 100644 --- a/L476_ats_blink-master/Debug/Core/Src/main.su +++ b/L476_ats_blink-master/Debug/Core/Src/main.su @@ -10,5 +10,7 @@ stm32l4xx_ll_rcc.h:3754:26:LL_RCC_PLL_IsReady 4 static stm32l4xx_ll_rcc.h:3800:22:LL_RCC_PLL_ConfigDomain_SYS 24 static stm32l4xx_ll_rcc.h:4178:22:LL_RCC_PLL_EnableDomain_SYS 4 static stm32l4xx_ll_system.h:1400:22:LL_FLASH_SetLatency 16 static -main.c:27:5:main 8 static -main.c:67:6:SystemClock_Config 8 static +stm32l4xx_ll_cortex.h:272:22:LL_SYSTICK_EnableIT 4 static +main.c:25:6:SysTick_Handler 8 static +main.c:39:5:main 8 static +main.c:82:6:SystemClock_Config 8 static diff --git a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o index 81f4a53..82aae56 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o and b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o differ diff --git a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su index 144f9eb..e1f3ef5 100644 --- a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su +++ b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su @@ -6,4 +6,3 @@ stm32l4xx_it.c:128:6:UsageFault_Handler 4 static stm32l4xx_it.c:143:6:SVC_Handler 4 static stm32l4xx_it.c:156:6:DebugMon_Handler 4 static stm32l4xx_it.c:169:6:PendSV_Handler 4 static -stm32l4xx_it.c:182:6:SysTick_Handler 4 static diff --git a/L476_ats_blink-master/Debug/Core/Src/syscalls.o b/L476_ats_blink-master/Debug/Core/Src/syscalls.o index ebea51d..74ed8a7 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/syscalls.o and b/L476_ats_blink-master/Debug/Core/Src/syscalls.o differ diff --git a/L476_ats_blink-master/Debug/Core/Src/sysmem.o b/L476_ats_blink-master/Debug/Core/Src/sysmem.o index 1d0d89f..b0d1a82 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/sysmem.o and b/L476_ats_blink-master/Debug/Core/Src/sysmem.o differ diff --git a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o index 31689d8..ef552d7 100644 Binary files a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o and b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o differ diff --git a/L476_ats_blink-master/Debug/Core/Startup/startup_stm32l476rgtx.o b/L476_ats_blink-master/Debug/Core/Startup/startup_stm32l476rgtx.o index d4aced9..2e89d95 100644 Binary files a/L476_ats_blink-master/Debug/Core/Startup/startup_stm32l476rgtx.o and b/L476_ats_blink-master/Debug/Core/Startup/startup_stm32l476rgtx.o differ diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o index a057ee4..df5e452 100644 Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o differ diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o index bccac64..513a8ea 100644 Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o differ diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o index 48384fa..9a66095 100644 Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o differ diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o index 68001ce..501c2d7 100644 Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o differ diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.bin b/L476_ats_blink-master/Debug/L476_ats_blink-master.bin index 8bf3860..6afe729 100644 Binary files a/L476_ats_blink-master/Debug/L476_ats_blink-master.bin and b/L476_ats_blink-master/Debug/L476_ats_blink-master.bin differ diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.elf b/L476_ats_blink-master/Debug/L476_ats_blink-master.elf index 02e303d..ecbc6bf 100644 Binary files a/L476_ats_blink-master/Debug/L476_ats_blink-master.elf and b/L476_ats_blink-master/Debug/L476_ats_blink-master.elf differ diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.list b/L476_ats_blink-master/Debug/L476_ats_blink-master.list index 6afdb85..8ca194f 100644 --- a/L476_ats_blink-master/Debug/L476_ats_blink-master.list +++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000188 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00000814 08000188 08000188 00010188 2**2 + 1 .text 00000804 08000188 08000188 00010188 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000040 0800099c 0800099c 0001099c 2**2 + 2 .rodata 00000040 0800098c 0800098c 0001098c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080009dc 080009dc 00020004 2**0 + 3 .ARM.extab 00000000 080009cc 080009cc 00020004 2**0 CONTENTS - 4 .ARM 00000000 080009dc 080009dc 00020004 2**0 + 4 .ARM 00000000 080009cc 080009cc 00020004 2**0 CONTENTS - 5 .preinit_array 00000000 080009dc 080009dc 00020004 2**0 + 5 .preinit_array 00000000 080009cc 080009cc 00020004 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 080009dc 080009dc 000109dc 2**2 + 6 .init_array 00000004 080009cc 080009cc 000109cc 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 080009e0 080009e0 000109e0 2**2 + 7 .fini_array 00000004 080009d0 080009d0 000109d0 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000004 20000000 080009e4 00020000 2**2 + 8 .data 00000004 20000000 080009d4 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 0000001c 20000004 080009e8 00020004 2**2 + 9 .bss 00000024 20000004 080009d8 00020004 2**2 ALLOC - 10 ._user_heap_stack 00000600 20000020 080009e8 00020020 2**0 + 10 ._user_heap_stack 00000600 20000028 080009d8 00020028 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 00020004 2**0 CONTENTS, READONLY - 12 .debug_info 0000206d 00000000 00000000 00020034 2**0 + 12 .debug_info 00002106 00000000 00000000 00020034 2**0 CONTENTS, READONLY, DEBUGGING - 13 .debug_abbrev 0000074a 00000000 00000000 000220a1 2**0 + 13 .debug_abbrev 00000771 00000000 00000000 0002213a 2**0 CONTENTS, READONLY, DEBUGGING - 14 .debug_aranges 000002d0 00000000 00000000 000227f0 2**3 + 14 .debug_aranges 000002d8 00000000 00000000 000228b0 2**3 CONTENTS, READONLY, DEBUGGING - 15 .debug_ranges 00000278 00000000 00000000 00022ac0 2**3 + 15 .debug_ranges 00000280 00000000 00000000 00022b88 2**3 CONTENTS, READONLY, DEBUGGING - 16 .debug_macro 0001e117 00000000 00000000 00022d38 2**0 + 16 .debug_macro 0001e120 00000000 00000000 00022e08 2**0 CONTENTS, READONLY, DEBUGGING - 17 .debug_line 00001fee 00000000 00000000 00040e4f 2**0 + 17 .debug_line 0000201e 00000000 00000000 00040f28 2**0 CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000a94c9 00000000 00000000 00042e3d 2**0 + 18 .debug_str 000a94ae 00000000 00000000 00042f46 2**0 CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 000ec306 2**0 + 19 .comment 0000007b 00000000 00000000 000ec3f4 2**0 CONTENTS, READONLY - 20 .debug_frame 000009e4 00000000 00000000 000ec384 2**2 + 20 .debug_frame 00000a00 00000000 00000000 000ec470 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -62,7 +62,7 @@ Disassembly of section .text: 800019e: bd10 pop {r4, pc} 80001a0: 20000004 .word 0x20000004 80001a4: 00000000 .word 0x00000000 - 80001a8: 08000984 .word 0x08000984 + 80001a8: 08000974 .word 0x08000974 080001ac : 80001ac: b508 push {r3, lr} @@ -74,7 +74,7 @@ Disassembly of section .text: 80001ba: bd08 pop {r3, pc} 80001bc: 00000000 .word 0x00000000 80001c0: 20000008 .word 0x20000008 - 80001c4: 08000984 .word 0x08000984 + 80001c4: 08000974 .word 0x08000974 080001c8 : * @@ -719,859 +719,837 @@ __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) 800055a: 4770 bx lr 800055c: 40022000 .word 0x40022000 -08000560
: -//} +08000560 : + * @brief Enable SysTick exception request + * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT + * @retval None + */ +__STATIC_INLINE void LL_SYSTICK_EnableIT(void) +{ + 8000560: b480 push {r7} + 8000562: af00 add r7, sp, #0 + SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); + 8000564: 4b05 ldr r3, [pc, #20] ; (800057c ) + 8000566: 681b ldr r3, [r3, #0] + 8000568: 4a04 ldr r2, [pc, #16] ; (800057c ) + 800056a: f043 0302 orr.w r3, r3, #2 + 800056e: 6013 str r3, [r2, #0] +} + 8000570: bf00 nop + 8000572: 46bd mov sp, r7 + 8000574: f85d 7b04 ldr.w r7, [sp], #4 + 8000578: 4770 bx lr + 800057a: bf00 nop + 800057c: e000e010 .word 0xe000e010 + +08000580 : +volatile uint32_t msTicks = 0; +volatile uint8_t expe = 0; +volatile uint8_t blue_mode = 0; + +void SysTick_Handler() +{ + 8000580: b580 push {r7, lr} + 8000582: af00 add r7, sp, #0 + + msTicks++; /* See startup file startup_LPC17xx.s for SysTick vector */ + 8000584: 4b0c ldr r3, [pc, #48] ; (80005b8 ) + 8000586: 681b ldr r3, [r3, #0] + 8000588: 3301 adds r3, #1 + 800058a: 4a0b ldr r2, [pc, #44] ; (80005b8 ) + 800058c: 6013 str r3, [r2, #0] + if (msTicks == 50){ + 800058e: 4b0a ldr r3, [pc, #40] ; (80005b8 ) + 8000590: 681b ldr r3, [r3, #0] + 8000592: 2b32 cmp r3, #50 ; 0x32 + 8000594: d103 bne.n 800059e + LED_GREEN(0); + 8000596: 2000 movs r0, #0 + 8000598: f7ff fed2 bl 8000340 + }else if(msTicks >= 1000){ + msTicks = 0; + LED_GREEN(1); + } +} + 800059c: e00a b.n 80005b4 + }else if(msTicks >= 1000){ + 800059e: 4b06 ldr r3, [pc, #24] ; (80005b8 ) + 80005a0: 681b ldr r3, [r3, #0] + 80005a2: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 80005a6: d305 bcc.n 80005b4 + msTicks = 0; + 80005a8: 4b03 ldr r3, [pc, #12] ; (80005b8 ) + 80005aa: 2200 movs r2, #0 + 80005ac: 601a str r2, [r3, #0] + LED_GREEN(1); + 80005ae: 2001 movs r0, #1 + 80005b0: f7ff fec6 bl 8000340 +} + 80005b4: bf00 nop + 80005b6: bd80 pop {r7, pc} + 80005b8: 20000020 .word 0x20000020 + +080005bc
: void SystemClock_Config(void); int main(void) { - 8000560: b580 push {r7, lr} - 8000562: af00 add r7, sp, #0 + 80005bc: b580 push {r7, lr} + 80005be: af00 add r7, sp, #0 /* Configure the system clock */ SystemClock_Config(); - 8000564: f000 f820 bl 80005a8 + 80005c0: f000 f816 bl 80005f0 // config GPIO GPIO_init(); - 8000568: f7ff fecc bl 8000304 + 80005c4: f7ff fe9e bl 8000304 // init systick timer (tick period at 1 ms) LL_Init1msTick( SystemCoreClock ); - 800056c: 4b0d ldr r3, [pc, #52] ; (80005a4 ) - 800056e: 681b ldr r3, [r3, #0] - 8000570: 4618 mov r0, r3 - 8000572: f000 f9af bl 80008d4 + 80005c8: 4b07 ldr r3, [pc, #28] ; (80005e8 ) + 80005ca: 681b ldr r3, [r3, #0] + 80005cc: 4618 mov r0, r3 + 80005ce: f000 f99f bl 8000910 +LL_SYSTICK_EnableIT(); + 80005d2: f7ff ffc5 bl 8000560 + while (1) { - if ( BLUE_BUTTON() ) - 8000576: f7ff fef9 bl 800036c - 800057a: 4603 mov r3, r0 - 800057c: 2b00 cmp r3, #0 - 800057e: d003 beq.n 8000588 - LED_GREEN(1); - 8000580: 2001 movs r0, #1 - 8000582: f7ff fedd bl 8000340 - 8000586: e7f6 b.n 8000576 - else { - LED_GREEN(0); - 8000588: 2000 movs r0, #0 - 800058a: f7ff fed9 bl 8000340 - LL_mDelay(950); - 800058e: f240 30b6 movw r0, #950 ; 0x3b6 - 8000592: f000 f9ad bl 80008f0 - LED_GREEN(1); - 8000596: 2001 movs r0, #1 - 8000598: f7ff fed2 bl 8000340 - LL_mDelay(50); - 800059c: 2032 movs r0, #50 ; 0x32 - 800059e: f000 f9a7 bl 80008f0 - if ( BLUE_BUTTON() ) - 80005a2: e7e8 b.n 8000576 - 80005a4: 20000000 .word 0x20000000 + if ( BLUE_BUTTON() ){ + 80005d6: f7ff fec9 bl 800036c + 80005da: 4603 mov r3, r0 + 80005dc: 2b00 cmp r3, #0 + 80005de: d0fa beq.n 80005d6 + blue_mode = 1; + 80005e0: 4b02 ldr r3, [pc, #8] ; (80005ec ) + 80005e2: 2201 movs r2, #1 + 80005e4: 701a strb r2, [r3, #0] + if ( BLUE_BUTTON() ){ + 80005e6: e7f6 b.n 80005d6 + 80005e8: 20000000 .word 0x20000000 + 80005ec: 20000024 .word 0x20000024 -080005a8 : +080005f0 : * PLL_R = 2 * Flash Latency(WS) = 4 * @param None * @retval None */ void SystemClock_Config(void) { - 80005a8: b580 push {r7, lr} - 80005aa: af00 add r7, sp, #0 + 80005f0: b580 push {r7, lr} + 80005f2: af00 add r7, sp, #0 /* MSI configuration and activation */ LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); - 80005ac: 2004 movs r0, #4 - 80005ae: f7ff ffc3 bl 8000538 + 80005f4: 2004 movs r0, #4 + 80005f6: f7ff ff9f bl 8000538 LL_RCC_MSI_Enable(); - 80005b2: f7ff feed bl 8000390 + 80005fa: f7ff fec9 bl 8000390 while (LL_RCC_MSI_IsReady() != 1) - 80005b6: bf00 nop - 80005b8: f7ff fefa bl 80003b0 - 80005bc: 4603 mov r3, r0 - 80005be: 2b01 cmp r3, #1 - 80005c0: d1fa bne.n 80005b8 + 80005fe: bf00 nop + 8000600: f7ff fed6 bl 80003b0 + 8000604: 4603 mov r3, r0 + 8000606: 2b01 cmp r3, #1 + 8000608: d1fa bne.n 8000600 { }; /* Main PLL configuration and activation */ LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2); - 80005c2: 2300 movs r3, #0 - 80005c4: 2228 movs r2, #40 ; 0x28 - 80005c6: 2100 movs r1, #0 - 80005c8: 2001 movs r0, #1 - 80005ca: f7ff ff85 bl 80004d8 + 800060a: 2300 movs r3, #0 + 800060c: 2228 movs r2, #40 ; 0x28 + 800060e: 2100 movs r1, #0 + 8000610: 2001 movs r0, #1 + 8000612: f7ff ff61 bl 80004d8 LL_RCC_PLL_Enable(); - 80005ce: f7ff ff5f bl 8000490 + 8000616: f7ff ff3b bl 8000490 LL_RCC_PLL_EnableDomain_SYS(); - 80005d2: f7ff ffa1 bl 8000518 + 800061a: f7ff ff7d bl 8000518 while(LL_RCC_PLL_IsReady() != 1) - 80005d6: bf00 nop - 80005d8: f7ff ff6a bl 80004b0 - 80005dc: 4603 mov r3, r0 - 80005de: 2b01 cmp r3, #1 - 80005e0: d1fa bne.n 80005d8 + 800061e: bf00 nop + 8000620: f7ff ff46 bl 80004b0 + 8000624: 4603 mov r3, r0 + 8000626: 2b01 cmp r3, #1 + 8000628: d1fa bne.n 8000620 { }; /* Sysclk activation on the main PLL */ LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 80005e2: 2000 movs r0, #0 - 80005e4: f7ff ff18 bl 8000418 + 800062a: 2000 movs r0, #0 + 800062c: f7ff fef4 bl 8000418 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 80005e8: 2003 movs r0, #3 - 80005ea: f7ff fef3 bl 80003d4 + 8000630: 2003 movs r0, #3 + 8000632: f7ff fecf bl 80003d4 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 80005ee: bf00 nop - 80005f0: f7ff ff04 bl 80003fc - 80005f4: 4603 mov r3, r0 - 80005f6: 2b0c cmp r3, #12 - 80005f8: d1fa bne.n 80005f0 + 8000636: bf00 nop + 8000638: f7ff fee0 bl 80003fc + 800063c: 4603 mov r3, r0 + 800063e: 2b0c cmp r3, #12 + 8000640: d1fa bne.n 8000638 { }; /* Set APB1 & APB2 prescaler*/ LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 80005fa: 2000 movs r0, #0 - 80005fc: f7ff ff20 bl 8000440 + 8000642: 2000 movs r0, #0 + 8000644: f7ff fefc bl 8000440 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 8000600: 2000 movs r0, #0 - 8000602: f7ff ff31 bl 8000468 + 8000648: 2000 movs r0, #0 + 800064a: f7ff ff0d bl 8000468 /* Update the global variable called SystemCoreClock */ SystemCoreClockUpdate(); - 8000606: f000 f867 bl 80006d8 + 800064e: f000 f861 bl 8000714 } - 800060a: bf00 nop - 800060c: bd80 pop {r7, pc} + 8000652: bf00 nop + 8000654: bd80 pop {r7, pc} -0800060e : +08000656 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 800060e: b480 push {r7} - 8000610: af00 add r7, sp, #0 + 8000656: b480 push {r7} + 8000658: af00 add r7, sp, #0 /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ /* USER CODE END NonMaskableInt_IRQn 1 */ } - 8000612: bf00 nop - 8000614: 46bd mov sp, r7 - 8000616: f85d 7b04 ldr.w r7, [sp], #4 - 800061a: 4770 bx lr + 800065a: bf00 nop + 800065c: 46bd mov sp, r7 + 800065e: f85d 7b04 ldr.w r7, [sp], #4 + 8000662: 4770 bx lr -0800061c : +08000664 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 800061c: b480 push {r7} - 800061e: af00 add r7, sp, #0 + 8000664: b480 push {r7} + 8000666: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8000620: e7fe b.n 8000620 + 8000668: e7fe b.n 8000668 -08000622 : +0800066a : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8000622: b480 push {r7} - 8000624: af00 add r7, sp, #0 + 800066a: b480 push {r7} + 800066c: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8000626: e7fe b.n 8000626 + 800066e: e7fe b.n 800066e -08000628 : +08000670 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 8000628: b480 push {r7} - 800062a: af00 add r7, sp, #0 + 8000670: b480 push {r7} + 8000672: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 800062c: e7fe b.n 800062c + 8000674: e7fe b.n 8000674 -0800062e : +08000676 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 800062e: b480 push {r7} - 8000630: af00 add r7, sp, #0 + 8000676: b480 push {r7} + 8000678: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8000632: e7fe b.n 8000632 + 800067a: e7fe b.n 800067a -08000634 : +0800067c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8000634: b480 push {r7} - 8000636: af00 add r7, sp, #0 + 800067c: b480 push {r7} + 800067e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8000638: bf00 nop - 800063a: 46bd mov sp, r7 - 800063c: f85d 7b04 ldr.w r7, [sp], #4 - 8000640: 4770 bx lr + 8000680: bf00 nop + 8000682: 46bd mov sp, r7 + 8000684: f85d 7b04 ldr.w r7, [sp], #4 + 8000688: 4770 bx lr -08000642 : +0800068a : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8000642: b480 push {r7} - 8000644: af00 add r7, sp, #0 + 800068a: b480 push {r7} + 800068c: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8000646: bf00 nop - 8000648: 46bd mov sp, r7 - 800064a: f85d 7b04 ldr.w r7, [sp], #4 - 800064e: 4770 bx lr + 800068e: bf00 nop + 8000690: 46bd mov sp, r7 + 8000692: f85d 7b04 ldr.w r7, [sp], #4 + 8000696: 4770 bx lr -08000650 : +08000698 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8000650: b480 push {r7} - 8000652: af00 add r7, sp, #0 + 8000698: b480 push {r7} + 800069a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8000654: bf00 nop - 8000656: 46bd mov sp, r7 - 8000658: f85d 7b04 ldr.w r7, [sp], #4 - 800065c: 4770 bx lr + 800069c: bf00 nop + 800069e: 46bd mov sp, r7 + 80006a0: f85d 7b04 ldr.w r7, [sp], #4 + 80006a4: 4770 bx lr + ... -0800065e : - -/** - * @brief This function handles System tick timer. - */ -void SysTick_Handler(void) -{ - 800065e: b480 push {r7} - 8000660: af00 add r7, sp, #0 - /* USER CODE END SysTick_IRQn 0 */ - - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} - 8000662: bf00 nop - 8000664: 46bd mov sp, r7 - 8000666: f85d 7b04 ldr.w r7, [sp], #4 - 800066a: 4770 bx lr - -0800066c : +080006a8 : * @param None * @retval None */ void SystemInit(void) { - 800066c: b480 push {r7} - 800066e: af00 add r7, sp, #0 + 80006a8: b480 push {r7} + 80006aa: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8000670: 4b17 ldr r3, [pc, #92] ; (80006d0 ) - 8000672: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8000676: 4a16 ldr r2, [pc, #88] ; (80006d0 ) - 8000678: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 800067c: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 80006ac: 4b17 ldr r3, [pc, #92] ; (800070c ) + 80006ae: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 80006b2: 4a16 ldr r2, [pc, #88] ; (800070c ) + 80006b4: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 80006b8: f8c2 3088 str.w r3, [r2, #136] ; 0x88 #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set MSION bit */ RCC->CR |= RCC_CR_MSION; - 8000680: 4b14 ldr r3, [pc, #80] ; (80006d4 ) - 8000682: 681b ldr r3, [r3, #0] - 8000684: 4a13 ldr r2, [pc, #76] ; (80006d4 ) - 8000686: f043 0301 orr.w r3, r3, #1 - 800068a: 6013 str r3, [r2, #0] + 80006bc: 4b14 ldr r3, [pc, #80] ; (8000710 ) + 80006be: 681b ldr r3, [r3, #0] + 80006c0: 4a13 ldr r2, [pc, #76] ; (8000710 ) + 80006c2: f043 0301 orr.w r3, r3, #1 + 80006c6: 6013 str r3, [r2, #0] /* Reset CFGR register */ RCC->CFGR = 0x00000000U; - 800068c: 4b11 ldr r3, [pc, #68] ; (80006d4 ) - 800068e: 2200 movs r2, #0 - 8000690: 609a str r2, [r3, #8] + 80006c8: 4b11 ldr r3, [pc, #68] ; (8000710 ) + 80006ca: 2200 movs r2, #0 + 80006cc: 609a str r2, [r3, #8] /* Reset HSEON, CSSON , HSION, and PLLON bits */ RCC->CR &= 0xEAF6FFFFU; - 8000692: 4b10 ldr r3, [pc, #64] ; (80006d4 ) - 8000694: 681b ldr r3, [r3, #0] - 8000696: 4a0f ldr r2, [pc, #60] ; (80006d4 ) - 8000698: f023 53a8 bic.w r3, r3, #352321536 ; 0x15000000 - 800069c: f423 2310 bic.w r3, r3, #589824 ; 0x90000 - 80006a0: 6013 str r3, [r2, #0] + 80006ce: 4b10 ldr r3, [pc, #64] ; (8000710 ) + 80006d0: 681b ldr r3, [r3, #0] + 80006d2: 4a0f ldr r2, [pc, #60] ; (8000710 ) + 80006d4: f023 53a8 bic.w r3, r3, #352321536 ; 0x15000000 + 80006d8: f423 2310 bic.w r3, r3, #589824 ; 0x90000 + 80006dc: 6013 str r3, [r2, #0] /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x00001000U; - 80006a2: 4b0c ldr r3, [pc, #48] ; (80006d4 ) - 80006a4: f44f 5280 mov.w r2, #4096 ; 0x1000 - 80006a8: 60da str r2, [r3, #12] + 80006de: 4b0c ldr r3, [pc, #48] ; (8000710 ) + 80006e0: f44f 5280 mov.w r2, #4096 ; 0x1000 + 80006e4: 60da str r2, [r3, #12] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; - 80006aa: 4b0a ldr r3, [pc, #40] ; (80006d4 ) - 80006ac: 681b ldr r3, [r3, #0] - 80006ae: 4a09 ldr r2, [pc, #36] ; (80006d4 ) - 80006b0: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 80006b4: 6013 str r3, [r2, #0] + 80006e6: 4b0a ldr r3, [pc, #40] ; (8000710 ) + 80006e8: 681b ldr r3, [r3, #0] + 80006ea: 4a09 ldr r2, [pc, #36] ; (8000710 ) + 80006ec: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 80006f0: 6013 str r3, [r2, #0] /* Disable all interrupts */ RCC->CIER = 0x00000000U; - 80006b6: 4b07 ldr r3, [pc, #28] ; (80006d4 ) - 80006b8: 2200 movs r2, #0 - 80006ba: 619a str r2, [r3, #24] + 80006f2: 4b07 ldr r3, [pc, #28] ; (8000710 ) + 80006f4: 2200 movs r2, #0 + 80006f6: 619a str r2, [r3, #24] /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 80006bc: 4b04 ldr r3, [pc, #16] ; (80006d0 ) - 80006be: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 80006c2: 609a str r2, [r3, #8] + 80006f8: 4b04 ldr r3, [pc, #16] ; (800070c ) + 80006fa: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 80006fe: 609a str r2, [r3, #8] #endif } - 80006c4: bf00 nop - 80006c6: 46bd mov sp, r7 - 80006c8: f85d 7b04 ldr.w r7, [sp], #4 - 80006cc: 4770 bx lr - 80006ce: bf00 nop - 80006d0: e000ed00 .word 0xe000ed00 - 80006d4: 40021000 .word 0x40021000 + 8000700: bf00 nop + 8000702: 46bd mov sp, r7 + 8000704: f85d 7b04 ldr.w r7, [sp], #4 + 8000708: 4770 bx lr + 800070a: bf00 nop + 800070c: e000ed00 .word 0xe000ed00 + 8000710: 40021000 .word 0x40021000 -080006d8 : +08000714 : * * @param None * @retval None */ void SystemCoreClockUpdate(void) { - 80006d8: b480 push {r7} - 80006da: b087 sub sp, #28 - 80006dc: af00 add r7, sp, #0 + 8000714: b480 push {r7} + 8000716: b087 sub sp, #28 + 8000718: af00 add r7, sp, #0 uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; - 80006de: 2300 movs r3, #0 - 80006e0: 60fb str r3, [r7, #12] - 80006e2: 2300 movs r3, #0 - 80006e4: 617b str r3, [r7, #20] - 80006e6: 2300 movs r3, #0 - 80006e8: 613b str r3, [r7, #16] - 80006ea: 2302 movs r3, #2 - 80006ec: 60bb str r3, [r7, #8] - 80006ee: 2300 movs r3, #0 - 80006f0: 607b str r3, [r7, #4] - 80006f2: 2302 movs r3, #2 - 80006f4: 603b str r3, [r7, #0] + 800071a: 2300 movs r3, #0 + 800071c: 60fb str r3, [r7, #12] + 800071e: 2300 movs r3, #0 + 8000720: 617b str r3, [r7, #20] + 8000722: 2300 movs r3, #0 + 8000724: 613b str r3, [r7, #16] + 8000726: 2302 movs r3, #2 + 8000728: 60bb str r3, [r7, #8] + 800072a: 2300 movs r3, #0 + 800072c: 607b str r3, [r7, #4] + 800072e: 2302 movs r3, #2 + 8000730: 603b str r3, [r7, #0] /* Get MSI Range frequency--------------------------------------------------*/ if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) - 80006f6: 4b4f ldr r3, [pc, #316] ; (8000834 ) - 80006f8: 681b ldr r3, [r3, #0] - 80006fa: f003 0308 and.w r3, r3, #8 - 80006fe: 2b00 cmp r3, #0 - 8000700: d107 bne.n 8000712 + 8000732: 4b4f ldr r3, [pc, #316] ; (8000870 ) + 8000734: 681b ldr r3, [r3, #0] + 8000736: f003 0308 and.w r3, r3, #8 + 800073a: 2b00 cmp r3, #0 + 800073c: d107 bne.n 800074e { /* MSISRANGE from RCC_CSR applies */ msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; - 8000702: 4b4c ldr r3, [pc, #304] ; (8000834 ) - 8000704: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 8000708: 0a1b lsrs r3, r3, #8 - 800070a: f003 030f and.w r3, r3, #15 - 800070e: 617b str r3, [r7, #20] - 8000710: e005 b.n 800071e + 800073e: 4b4c ldr r3, [pc, #304] ; (8000870 ) + 8000740: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 + 8000744: 0a1b lsrs r3, r3, #8 + 8000746: f003 030f and.w r3, r3, #15 + 800074a: 617b str r3, [r7, #20] + 800074c: e005 b.n 800075a } else { /* MSIRANGE from RCC_CR applies */ msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; - 8000712: 4b48 ldr r3, [pc, #288] ; (8000834 ) - 8000714: 681b ldr r3, [r3, #0] - 8000716: 091b lsrs r3, r3, #4 - 8000718: f003 030f and.w r3, r3, #15 - 800071c: 617b str r3, [r7, #20] + 800074e: 4b48 ldr r3, [pc, #288] ; (8000870 ) + 8000750: 681b ldr r3, [r3, #0] + 8000752: 091b lsrs r3, r3, #4 + 8000754: f003 030f and.w r3, r3, #15 + 8000758: 617b str r3, [r7, #20] } /*MSI frequency range in HZ*/ msirange = MSIRangeTable[msirange]; - 800071e: 4a46 ldr r2, [pc, #280] ; (8000838 ) - 8000720: 697b ldr r3, [r7, #20] - 8000722: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000726: 617b str r3, [r7, #20] + 800075a: 4a46 ldr r2, [pc, #280] ; (8000874 ) + 800075c: 697b ldr r3, [r7, #20] + 800075e: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000762: 617b str r3, [r7, #20] /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 8000728: 4b42 ldr r3, [pc, #264] ; (8000834 ) - 800072a: 689b ldr r3, [r3, #8] - 800072c: f003 030c and.w r3, r3, #12 - 8000730: 2b0c cmp r3, #12 - 8000732: d865 bhi.n 8000800 - 8000734: a201 add r2, pc, #4 ; (adr r2, 800073c ) - 8000736: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800073a: bf00 nop - 800073c: 08000771 .word 0x08000771 - 8000740: 08000801 .word 0x08000801 - 8000744: 08000801 .word 0x08000801 - 8000748: 08000801 .word 0x08000801 - 800074c: 08000779 .word 0x08000779 - 8000750: 08000801 .word 0x08000801 - 8000754: 08000801 .word 0x08000801 - 8000758: 08000801 .word 0x08000801 - 800075c: 08000781 .word 0x08000781 - 8000760: 08000801 .word 0x08000801 - 8000764: 08000801 .word 0x08000801 - 8000768: 08000801 .word 0x08000801 - 800076c: 08000789 .word 0x08000789 + 8000764: 4b42 ldr r3, [pc, #264] ; (8000870 ) + 8000766: 689b ldr r3, [r3, #8] + 8000768: f003 030c and.w r3, r3, #12 + 800076c: 2b0c cmp r3, #12 + 800076e: d865 bhi.n 800083c + 8000770: a201 add r2, pc, #4 ; (adr r2, 8000778 ) + 8000772: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8000776: bf00 nop + 8000778: 080007ad .word 0x080007ad + 800077c: 0800083d .word 0x0800083d + 8000780: 0800083d .word 0x0800083d + 8000784: 0800083d .word 0x0800083d + 8000788: 080007b5 .word 0x080007b5 + 800078c: 0800083d .word 0x0800083d + 8000790: 0800083d .word 0x0800083d + 8000794: 0800083d .word 0x0800083d + 8000798: 080007bd .word 0x080007bd + 800079c: 0800083d .word 0x0800083d + 80007a0: 0800083d .word 0x0800083d + 80007a4: 0800083d .word 0x0800083d + 80007a8: 080007c5 .word 0x080007c5 { case 0x00: /* MSI used as system clock source */ SystemCoreClock = msirange; - 8000770: 4a32 ldr r2, [pc, #200] ; (800083c ) - 8000772: 697b ldr r3, [r7, #20] - 8000774: 6013 str r3, [r2, #0] + 80007ac: 4a32 ldr r2, [pc, #200] ; (8000878 ) + 80007ae: 697b ldr r3, [r7, #20] + 80007b0: 6013 str r3, [r2, #0] break; - 8000776: e047 b.n 8000808 + 80007b2: e047 b.n 8000844 case 0x04: /* HSI used as system clock source */ SystemCoreClock = HSI_VALUE; - 8000778: 4b30 ldr r3, [pc, #192] ; (800083c ) - 800077a: 4a31 ldr r2, [pc, #196] ; (8000840 ) - 800077c: 601a str r2, [r3, #0] + 80007b4: 4b30 ldr r3, [pc, #192] ; (8000878 ) + 80007b6: 4a31 ldr r2, [pc, #196] ; (800087c ) + 80007b8: 601a str r2, [r3, #0] break; - 800077e: e043 b.n 8000808 + 80007ba: e043 b.n 8000844 case 0x08: /* HSE used as system clock source */ SystemCoreClock = HSE_VALUE; - 8000780: 4b2e ldr r3, [pc, #184] ; (800083c ) - 8000782: 4a30 ldr r2, [pc, #192] ; (8000844 ) - 8000784: 601a str r2, [r3, #0] + 80007bc: 4b2e ldr r3, [pc, #184] ; (8000878 ) + 80007be: 4a30 ldr r2, [pc, #192] ; (8000880 ) + 80007c0: 601a str r2, [r3, #0] break; - 8000786: e03f b.n 8000808 + 80007c2: e03f b.n 8000844 case 0x0C: /* PLL used as system clock source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - 8000788: 4b2a ldr r3, [pc, #168] ; (8000834 ) - 800078a: 68db ldr r3, [r3, #12] - 800078c: f003 0303 and.w r3, r3, #3 - 8000790: 607b str r3, [r7, #4] + 80007c4: 4b2a ldr r3, [pc, #168] ; (8000870 ) + 80007c6: 68db ldr r3, [r3, #12] + 80007c8: f003 0303 and.w r3, r3, #3 + 80007cc: 607b str r3, [r7, #4] pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; - 8000792: 4b28 ldr r3, [pc, #160] ; (8000834 ) - 8000794: 68db ldr r3, [r3, #12] - 8000796: 091b lsrs r3, r3, #4 - 8000798: f003 0307 and.w r3, r3, #7 - 800079c: 3301 adds r3, #1 - 800079e: 603b str r3, [r7, #0] + 80007ce: 4b28 ldr r3, [pc, #160] ; (8000870 ) + 80007d0: 68db ldr r3, [r3, #12] + 80007d2: 091b lsrs r3, r3, #4 + 80007d4: f003 0307 and.w r3, r3, #7 + 80007d8: 3301 adds r3, #1 + 80007da: 603b str r3, [r7, #0] switch (pllsource) - 80007a0: 687b ldr r3, [r7, #4] - 80007a2: 2b02 cmp r3, #2 - 80007a4: d002 beq.n 80007ac - 80007a6: 2b03 cmp r3, #3 - 80007a8: d006 beq.n 80007b8 - 80007aa: e00b b.n 80007c4 + 80007dc: 687b ldr r3, [r7, #4] + 80007de: 2b02 cmp r3, #2 + 80007e0: d002 beq.n 80007e8 + 80007e2: 2b03 cmp r3, #3 + 80007e4: d006 beq.n 80007f4 + 80007e6: e00b b.n 8000800 { case 0x02: /* HSI used as PLL clock source */ pllvco = (HSI_VALUE / pllm); - 80007ac: 4a24 ldr r2, [pc, #144] ; (8000840 ) - 80007ae: 683b ldr r3, [r7, #0] - 80007b0: fbb2 f3f3 udiv r3, r2, r3 - 80007b4: 613b str r3, [r7, #16] + 80007e8: 4a24 ldr r2, [pc, #144] ; (800087c ) + 80007ea: 683b ldr r3, [r7, #0] + 80007ec: fbb2 f3f3 udiv r3, r2, r3 + 80007f0: 613b str r3, [r7, #16] break; - 80007b6: e00b b.n 80007d0 + 80007f2: e00b b.n 800080c case 0x03: /* HSE used as PLL clock source */ pllvco = (HSE_VALUE / pllm); - 80007b8: 4a22 ldr r2, [pc, #136] ; (8000844 ) - 80007ba: 683b ldr r3, [r7, #0] - 80007bc: fbb2 f3f3 udiv r3, r2, r3 - 80007c0: 613b str r3, [r7, #16] + 80007f4: 4a22 ldr r2, [pc, #136] ; (8000880 ) + 80007f6: 683b ldr r3, [r7, #0] + 80007f8: fbb2 f3f3 udiv r3, r2, r3 + 80007fc: 613b str r3, [r7, #16] break; - 80007c2: e005 b.n 80007d0 + 80007fe: e005 b.n 800080c default: /* MSI used as PLL clock source */ pllvco = (msirange / pllm); - 80007c4: 697a ldr r2, [r7, #20] - 80007c6: 683b ldr r3, [r7, #0] - 80007c8: fbb2 f3f3 udiv r3, r2, r3 - 80007cc: 613b str r3, [r7, #16] + 8000800: 697a ldr r2, [r7, #20] + 8000802: 683b ldr r3, [r7, #0] + 8000804: fbb2 f3f3 udiv r3, r2, r3 + 8000808: 613b str r3, [r7, #16] break; - 80007ce: bf00 nop + 800080a: bf00 nop } pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); - 80007d0: 4b18 ldr r3, [pc, #96] ; (8000834 ) - 80007d2: 68db ldr r3, [r3, #12] - 80007d4: 0a1b lsrs r3, r3, #8 - 80007d6: f003 027f and.w r2, r3, #127 ; 0x7f - 80007da: 693b ldr r3, [r7, #16] - 80007dc: fb02 f303 mul.w r3, r2, r3 - 80007e0: 613b str r3, [r7, #16] + 800080c: 4b18 ldr r3, [pc, #96] ; (8000870 ) + 800080e: 68db ldr r3, [r3, #12] + 8000810: 0a1b lsrs r3, r3, #8 + 8000812: f003 027f and.w r2, r3, #127 ; 0x7f + 8000816: 693b ldr r3, [r7, #16] + 8000818: fb02 f303 mul.w r3, r2, r3 + 800081c: 613b str r3, [r7, #16] pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; - 80007e2: 4b14 ldr r3, [pc, #80] ; (8000834 ) - 80007e4: 68db ldr r3, [r3, #12] - 80007e6: 0e5b lsrs r3, r3, #25 - 80007e8: f003 0303 and.w r3, r3, #3 - 80007ec: 3301 adds r3, #1 - 80007ee: 005b lsls r3, r3, #1 - 80007f0: 60bb str r3, [r7, #8] + 800081e: 4b14 ldr r3, [pc, #80] ; (8000870 ) + 8000820: 68db ldr r3, [r3, #12] + 8000822: 0e5b lsrs r3, r3, #25 + 8000824: f003 0303 and.w r3, r3, #3 + 8000828: 3301 adds r3, #1 + 800082a: 005b lsls r3, r3, #1 + 800082c: 60bb str r3, [r7, #8] SystemCoreClock = pllvco/pllr; - 80007f2: 693a ldr r2, [r7, #16] - 80007f4: 68bb ldr r3, [r7, #8] - 80007f6: fbb2 f3f3 udiv r3, r2, r3 - 80007fa: 4a10 ldr r2, [pc, #64] ; (800083c ) - 80007fc: 6013 str r3, [r2, #0] + 800082e: 693a ldr r2, [r7, #16] + 8000830: 68bb ldr r3, [r7, #8] + 8000832: fbb2 f3f3 udiv r3, r2, r3 + 8000836: 4a10 ldr r2, [pc, #64] ; (8000878 ) + 8000838: 6013 str r3, [r2, #0] break; - 80007fe: e003 b.n 8000808 + 800083a: e003 b.n 8000844 default: SystemCoreClock = msirange; - 8000800: 4a0e ldr r2, [pc, #56] ; (800083c ) - 8000802: 697b ldr r3, [r7, #20] - 8000804: 6013 str r3, [r2, #0] + 800083c: 4a0e ldr r2, [pc, #56] ; (8000878 ) + 800083e: 697b ldr r3, [r7, #20] + 8000840: 6013 str r3, [r2, #0] break; - 8000806: bf00 nop + 8000842: bf00 nop } /* Compute HCLK clock frequency --------------------------------------------*/ /* Get HCLK prescaler */ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; - 8000808: 4b0a ldr r3, [pc, #40] ; (8000834 ) - 800080a: 689b ldr r3, [r3, #8] - 800080c: 091b lsrs r3, r3, #4 - 800080e: f003 030f and.w r3, r3, #15 - 8000812: 4a0d ldr r2, [pc, #52] ; (8000848 ) - 8000814: 5cd3 ldrb r3, [r2, r3] - 8000816: 60fb str r3, [r7, #12] + 8000844: 4b0a ldr r3, [pc, #40] ; (8000870 ) + 8000846: 689b ldr r3, [r3, #8] + 8000848: 091b lsrs r3, r3, #4 + 800084a: f003 030f and.w r3, r3, #15 + 800084e: 4a0d ldr r2, [pc, #52] ; (8000884 ) + 8000850: 5cd3 ldrb r3, [r2, r3] + 8000852: 60fb str r3, [r7, #12] /* HCLK clock frequency */ SystemCoreClock >>= tmp; - 8000818: 4b08 ldr r3, [pc, #32] ; (800083c ) - 800081a: 681a ldr r2, [r3, #0] - 800081c: 68fb ldr r3, [r7, #12] - 800081e: fa22 f303 lsr.w r3, r2, r3 - 8000822: 4a06 ldr r2, [pc, #24] ; (800083c ) - 8000824: 6013 str r3, [r2, #0] + 8000854: 4b08 ldr r3, [pc, #32] ; (8000878 ) + 8000856: 681a ldr r2, [r3, #0] + 8000858: 68fb ldr r3, [r7, #12] + 800085a: fa22 f303 lsr.w r3, r2, r3 + 800085e: 4a06 ldr r2, [pc, #24] ; (8000878 ) + 8000860: 6013 str r3, [r2, #0] } - 8000826: bf00 nop - 8000828: 371c adds r7, #28 - 800082a: 46bd mov sp, r7 - 800082c: f85d 7b04 ldr.w r7, [sp], #4 - 8000830: 4770 bx lr - 8000832: bf00 nop - 8000834: 40021000 .word 0x40021000 - 8000838: 080009ac .word 0x080009ac - 800083c: 20000000 .word 0x20000000 - 8000840: 00f42400 .word 0x00f42400 - 8000844: 007a1200 .word 0x007a1200 - 8000848: 0800099c .word 0x0800099c + 8000862: bf00 nop + 8000864: 371c adds r7, #28 + 8000866: 46bd mov sp, r7 + 8000868: f85d 7b04 ldr.w r7, [sp], #4 + 800086c: 4770 bx lr + 800086e: bf00 nop + 8000870: 40021000 .word 0x40021000 + 8000874: 0800099c .word 0x0800099c + 8000878: 20000000 .word 0x20000000 + 800087c: 00f42400 .word 0x00f42400 + 8000880: 007a1200 .word 0x007a1200 + 8000884: 0800098c .word 0x0800098c -0800084c : +08000888 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Set stack pointer */ - 800084c: f8df d034 ldr.w sp, [pc, #52] ; 8000884 + 8000888: f8df d034 ldr.w sp, [pc, #52] ; 80008c0 /* Call the clock system initialization function.*/ bl SystemInit - 8000850: f7ff ff0c bl 800066c + 800088c: f7ff ff0c bl 80006a8 /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 - 8000854: 2100 movs r1, #0 + 8000890: 2100 movs r1, #0 b LoopCopyDataInit - 8000856: e003 b.n 8000860 + 8000892: e003 b.n 800089c -08000858 : +08000894 : CopyDataInit: ldr r3, =_sidata - 8000858: 4b0b ldr r3, [pc, #44] ; (8000888 ) + 8000894: 4b0b ldr r3, [pc, #44] ; (80008c4 ) ldr r3, [r3, r1] - 800085a: 585b ldr r3, [r3, r1] + 8000896: 585b ldr r3, [r3, r1] str r3, [r0, r1] - 800085c: 5043 str r3, [r0, r1] + 8000898: 5043 str r3, [r0, r1] adds r1, r1, #4 - 800085e: 3104 adds r1, #4 + 800089a: 3104 adds r1, #4 -08000860 : +0800089c : LoopCopyDataInit: ldr r0, =_sdata - 8000860: 480a ldr r0, [pc, #40] ; (800088c ) + 800089c: 480a ldr r0, [pc, #40] ; (80008c8 ) ldr r3, =_edata - 8000862: 4b0b ldr r3, [pc, #44] ; (8000890 ) + 800089e: 4b0b ldr r3, [pc, #44] ; (80008cc ) adds r2, r0, r1 - 8000864: 1842 adds r2, r0, r1 + 80008a0: 1842 adds r2, r0, r1 cmp r2, r3 - 8000866: 429a cmp r2, r3 + 80008a2: 429a cmp r2, r3 bcc CopyDataInit - 8000868: d3f6 bcc.n 8000858 + 80008a4: d3f6 bcc.n 8000894 ldr r2, =_sbss - 800086a: 4a0a ldr r2, [pc, #40] ; (8000894 ) + 80008a6: 4a0a ldr r2, [pc, #40] ; (80008d0 ) b LoopFillZerobss - 800086c: e002 b.n 8000874 + 80008a8: e002 b.n 80008b0 -0800086e : +080008aa : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 - 800086e: 2300 movs r3, #0 + 80008aa: 2300 movs r3, #0 str r3, [r2], #4 - 8000870: f842 3b04 str.w r3, [r2], #4 + 80008ac: f842 3b04 str.w r3, [r2], #4 -08000874 : +080008b0 : LoopFillZerobss: ldr r3, = _ebss - 8000874: 4b08 ldr r3, [pc, #32] ; (8000898 ) + 80008b0: 4b08 ldr r3, [pc, #32] ; (80008d4 ) cmp r2, r3 - 8000876: 429a cmp r2, r3 + 80008b2: 429a cmp r2, r3 bcc FillZerobss - 8000878: d3f9 bcc.n 800086e + 80008b4: d3f9 bcc.n 80008aa /* Call static constructors */ bl __libc_init_array - 800087a: f000 f85f bl 800093c <__libc_init_array> + 80008b6: f000 f839 bl 800092c <__libc_init_array> /* Call the application's entry point.*/ bl main - 800087e: f7ff fe6f bl 8000560
+ 80008ba: f7ff fe7f bl 80005bc
-08000882 : +080008be : LoopForever: b LoopForever - 8000882: e7fe b.n 8000882 + 80008be: e7fe b.n 80008be ldr sp, =_estack /* Set stack pointer */ - 8000884: 20018000 .word 0x20018000 + 80008c0: 20018000 .word 0x20018000 ldr r3, =_sidata - 8000888: 080009e4 .word 0x080009e4 + 80008c4: 080009d4 .word 0x080009d4 ldr r0, =_sdata - 800088c: 20000000 .word 0x20000000 + 80008c8: 20000000 .word 0x20000000 ldr r3, =_edata - 8000890: 20000004 .word 0x20000004 + 80008cc: 20000004 .word 0x20000004 ldr r2, =_sbss - 8000894: 20000004 .word 0x20000004 + 80008d0: 20000004 .word 0x20000004 ldr r3, = _ebss - 8000898: 20000020 .word 0x20000020 + 80008d4: 20000028 .word 0x20000028 -0800089c : +080008d8 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 800089c: e7fe b.n 800089c + 80008d8: e7fe b.n 80008d8 ... -080008a0 : +080008dc : * configuration by calling this function, for a delay use rather osDelay RTOS service. * @param Ticks Number of ticks * @retval None */ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) { - 80008a0: b480 push {r7} - 80008a2: b083 sub sp, #12 - 80008a4: af00 add r7, sp, #0 - 80008a6: 6078 str r0, [r7, #4] - 80008a8: 6039 str r1, [r7, #0] + 80008dc: b480 push {r7} + 80008de: b083 sub sp, #12 + 80008e0: af00 add r7, sp, #0 + 80008e2: 6078 str r0, [r7, #4] + 80008e4: 6039 str r1, [r7, #0] /* Configure the SysTick to have interrupt in 1ms time base */ SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ - 80008aa: 687a ldr r2, [r7, #4] - 80008ac: 683b ldr r3, [r7, #0] - 80008ae: fbb2 f3f3 udiv r3, r2, r3 - 80008b2: 4a07 ldr r2, [pc, #28] ; (80008d0 ) - 80008b4: 3b01 subs r3, #1 - 80008b6: 6053 str r3, [r2, #4] + 80008e6: 687a ldr r2, [r7, #4] + 80008e8: 683b ldr r3, [r7, #0] + 80008ea: fbb2 f3f3 udiv r3, r2, r3 + 80008ee: 4a07 ldr r2, [pc, #28] ; (800090c ) + 80008f0: 3b01 subs r3, #1 + 80008f2: 6053 str r3, [r2, #4] SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 80008b8: 4b05 ldr r3, [pc, #20] ; (80008d0 ) - 80008ba: 2200 movs r2, #0 - 80008bc: 609a str r2, [r3, #8] + 80008f4: 4b05 ldr r3, [pc, #20] ; (800090c ) + 80008f6: 2200 movs r2, #0 + 80008f8: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 80008be: 4b04 ldr r3, [pc, #16] ; (80008d0 ) - 80008c0: 2205 movs r2, #5 - 80008c2: 601a str r2, [r3, #0] - SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ + 80008fa: 4b04 ldr r3, [pc, #16] ; (800090c ) + 80008fc: 2205 movs r2, #5 + 80008fe: 601a str r2, [r3, #0] + SysTick_CTRL_ENABLE_Msk; } - 80008c4: bf00 nop - 80008c6: 370c adds r7, #12 - 80008c8: 46bd mov sp, r7 - 80008ca: f85d 7b04 ldr.w r7, [sp], #4 - 80008ce: 4770 bx lr - 80008d0: e000e010 .word 0xe000e010 + 8000900: bf00 nop + 8000902: 370c adds r7, #12 + 8000904: 46bd mov sp, r7 + 8000906: f85d 7b04 ldr.w r7, [sp], #4 + 800090a: 4770 bx lr + 800090c: e000e010 .word 0xe000e010 -080008d4 : +08000910 : * @param HCLKFrequency HCLK frequency in Hz * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq * @retval None */ void LL_Init1msTick(uint32_t HCLKFrequency) { - 80008d4: b580 push {r7, lr} - 80008d6: b082 sub sp, #8 - 80008d8: af00 add r7, sp, #0 - 80008da: 6078 str r0, [r7, #4] + 8000910: b580 push {r7, lr} + 8000912: b082 sub sp, #8 + 8000914: af00 add r7, sp, #0 + 8000916: 6078 str r0, [r7, #4] /* Use frequency provided in argument */ LL_InitTick(HCLKFrequency, 1000U); - 80008dc: f44f 717a mov.w r1, #1000 ; 0x3e8 - 80008e0: 6878 ldr r0, [r7, #4] - 80008e2: f7ff ffdd bl 80008a0 + 8000918: f44f 717a mov.w r1, #1000 ; 0x3e8 + 800091c: 6878 ldr r0, [r7, #4] + 800091e: f7ff ffdd bl 80008dc } - 80008e6: bf00 nop - 80008e8: 3708 adds r7, #8 - 80008ea: 46bd mov sp, r7 - 80008ec: bd80 pop {r7, pc} + 8000922: bf00 nop + 8000924: 3708 adds r7, #8 + 8000926: 46bd mov sp, r7 + 8000928: bd80 pop {r7, pc} ... -080008f0 : - * will configure Systick to 1ms - * @param Delay specifies the delay time length, in milliseconds. - * @retval None - */ -void LL_mDelay(uint32_t Delay) -{ - 80008f0: b480 push {r7} - 80008f2: b085 sub sp, #20 - 80008f4: af00 add r7, sp, #0 - 80008f6: 6078 str r0, [r7, #4] - __IO uint32_t tmp = SysTick->CTRL; /* Clear the COUNTFLAG first */ - 80008f8: 4b0f ldr r3, [pc, #60] ; (8000938 ) - 80008fa: 681b ldr r3, [r3, #0] - 80008fc: 60bb str r3, [r7, #8] - uint32_t tmpDelay = Delay; - 80008fe: 687b ldr r3, [r7, #4] - 8000900: 60fb str r3, [r7, #12] +0800092c <__libc_init_array>: + 800092c: b570 push {r4, r5, r6, lr} + 800092e: 4e0d ldr r6, [pc, #52] ; (8000964 <__libc_init_array+0x38>) + 8000930: 4c0d ldr r4, [pc, #52] ; (8000968 <__libc_init_array+0x3c>) + 8000932: 1ba4 subs r4, r4, r6 + 8000934: 10a4 asrs r4, r4, #2 + 8000936: 2500 movs r5, #0 + 8000938: 42a5 cmp r5, r4 + 800093a: d109 bne.n 8000950 <__libc_init_array+0x24> + 800093c: 4e0b ldr r6, [pc, #44] ; (800096c <__libc_init_array+0x40>) + 800093e: 4c0c ldr r4, [pc, #48] ; (8000970 <__libc_init_array+0x44>) + 8000940: f000 f818 bl 8000974 <_init> + 8000944: 1ba4 subs r4, r4, r6 + 8000946: 10a4 asrs r4, r4, #2 + 8000948: 2500 movs r5, #0 + 800094a: 42a5 cmp r5, r4 + 800094c: d105 bne.n 800095a <__libc_init_array+0x2e> + 800094e: bd70 pop {r4, r5, r6, pc} + 8000950: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8000954: 4798 blx r3 + 8000956: 3501 adds r5, #1 + 8000958: e7ee b.n 8000938 <__libc_init_array+0xc> + 800095a: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 800095e: 4798 blx r3 + 8000960: 3501 adds r5, #1 + 8000962: e7f2 b.n 800094a <__libc_init_array+0x1e> + 8000964: 080009cc .word 0x080009cc + 8000968: 080009cc .word 0x080009cc + 800096c: 080009cc .word 0x080009cc + 8000970: 080009d0 .word 0x080009d0 - /* Add this code to indicate that local variable is not used */ - ((void)tmp); - 8000902: 68bb ldr r3, [r7, #8] +08000974 <_init>: + 8000974: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000976: bf00 nop + 8000978: bcf8 pop {r3, r4, r5, r6, r7} + 800097a: bc08 pop {r3} + 800097c: 469e mov lr, r3 + 800097e: 4770 bx lr - /* Add a period to guaranty minimum wait */ - if(tmpDelay < LL_MAX_DELAY) - 8000904: 68fb ldr r3, [r7, #12] - 8000906: f1b3 3fff cmp.w r3, #4294967295 - 800090a: d00c beq.n 8000926 - { - tmpDelay++; - 800090c: 68fb ldr r3, [r7, #12] - 800090e: 3301 adds r3, #1 - 8000910: 60fb str r3, [r7, #12] - } - - while (tmpDelay != 0U) - 8000912: e008 b.n 8000926 - { - if((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U) - 8000914: 4b08 ldr r3, [pc, #32] ; (8000938 ) - 8000916: 681b ldr r3, [r3, #0] - 8000918: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 800091c: 2b00 cmp r3, #0 - 800091e: d002 beq.n 8000926 - { - tmpDelay--; - 8000920: 68fb ldr r3, [r7, #12] - 8000922: 3b01 subs r3, #1 - 8000924: 60fb str r3, [r7, #12] - while (tmpDelay != 0U) - 8000926: 68fb ldr r3, [r7, #12] - 8000928: 2b00 cmp r3, #0 - 800092a: d1f3 bne.n 8000914 - } - } -} - 800092c: bf00 nop - 800092e: 3714 adds r7, #20 - 8000930: 46bd mov sp, r7 - 8000932: f85d 7b04 ldr.w r7, [sp], #4 - 8000936: 4770 bx lr - 8000938: e000e010 .word 0xe000e010 - -0800093c <__libc_init_array>: - 800093c: b570 push {r4, r5, r6, lr} - 800093e: 4e0d ldr r6, [pc, #52] ; (8000974 <__libc_init_array+0x38>) - 8000940: 4c0d ldr r4, [pc, #52] ; (8000978 <__libc_init_array+0x3c>) - 8000942: 1ba4 subs r4, r4, r6 - 8000944: 10a4 asrs r4, r4, #2 - 8000946: 2500 movs r5, #0 - 8000948: 42a5 cmp r5, r4 - 800094a: d109 bne.n 8000960 <__libc_init_array+0x24> - 800094c: 4e0b ldr r6, [pc, #44] ; (800097c <__libc_init_array+0x40>) - 800094e: 4c0c ldr r4, [pc, #48] ; (8000980 <__libc_init_array+0x44>) - 8000950: f000 f818 bl 8000984 <_init> - 8000954: 1ba4 subs r4, r4, r6 - 8000956: 10a4 asrs r4, r4, #2 - 8000958: 2500 movs r5, #0 - 800095a: 42a5 cmp r5, r4 - 800095c: d105 bne.n 800096a <__libc_init_array+0x2e> - 800095e: bd70 pop {r4, r5, r6, pc} - 8000960: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 8000964: 4798 blx r3 - 8000966: 3501 adds r5, #1 - 8000968: e7ee b.n 8000948 <__libc_init_array+0xc> - 800096a: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 800096e: 4798 blx r3 - 8000970: 3501 adds r5, #1 - 8000972: e7f2 b.n 800095a <__libc_init_array+0x1e> - 8000974: 080009dc .word 0x080009dc - 8000978: 080009dc .word 0x080009dc - 800097c: 080009dc .word 0x080009dc - 8000980: 080009e0 .word 0x080009e0 - -08000984 <_init>: - 8000984: b5f8 push {r3, r4, r5, r6, r7, lr} - 8000986: bf00 nop - 8000988: bcf8 pop {r3, r4, r5, r6, r7} - 800098a: bc08 pop {r3} - 800098c: 469e mov lr, r3 - 800098e: 4770 bx lr - -08000990 <_fini>: - 8000990: b5f8 push {r3, r4, r5, r6, r7, lr} - 8000992: bf00 nop - 8000994: bcf8 pop {r3, r4, r5, r6, r7} - 8000996: bc08 pop {r3} - 8000998: 469e mov lr, r3 - 800099a: 4770 bx lr +08000980 <_fini>: + 8000980: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000982: bf00 nop + 8000984: bcf8 pop {r3, r4, r5, r6, r7} + 8000986: bc08 pop {r3} + 8000988: 469e mov lr, r3 + 800098a: 4770 bx lr diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.map b/L476_ats_blink-master/Debug/L476_ats_blink-master.map index 9f408e1..f792f5d 100644 --- a/L476_ats_blink-master/Debug/L476_ats_blink-master.map +++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.map @@ -66,9 +66,11 @@ Discarded input sections .group 0x0000000000000000 0xc Core/Src/main.o .group 0x0000000000000000 0xc Core/Src/main.o .group 0x0000000000000000 0xc Core/Src/main.o + .group 0x0000000000000000 0xc Core/Src/main.o .text 0x0000000000000000 0x0 Core/Src/main.o .data 0x0000000000000000 0x0 Core/Src/main.o .bss 0x0000000000000000 0x0 Core/Src/main.o + .bss.expe 0x0000000000000000 0x1 Core/Src/main.o .debug_macro 0x0000000000000000 0xaa8 Core/Src/main.o .debug_macro 0x0000000000000000 0x2e Core/Src/main.o .debug_macro 0x0000000000000000 0x28 Core/Src/main.o @@ -136,6 +138,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x43 Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0x716 Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0x2f5 Core/Src/stm32l4xx_it.o + .debug_macro 0x0000000000000000 0x1a7 Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0xa7 Core/Src/stm32l4xx_it.o .debug_macro 0x0000000000000000 0x16a Core/Src/stm32l4xx_it.o .group 0x0000000000000000 0xc Core/Src/syscalls.o @@ -257,7 +260,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x16 Core/Src/syscalls.o .debug_macro 0x0000000000000000 0x88 Core/Src/syscalls.o .debug_line 0x0000000000000000 0x73e Core/Src/syscalls.o - .debug_str 0x0000000000000000 0x89f3 Core/Src/syscalls.o + .debug_str 0x0000000000000000 0x89b3 Core/Src/syscalls.o .comment 0x0000000000000000 0x7c Core/Src/syscalls.o .debug_frame 0x0000000000000000 0x2ac Core/Src/syscalls.o .ARM.attributes @@ -313,7 +316,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x6a Core/Src/sysmem.o .debug_macro 0x0000000000000000 0x1df Core/Src/sysmem.o .debug_line 0x0000000000000000 0x4c7 Core/Src/sysmem.o - .debug_str 0x0000000000000000 0x60c1 Core/Src/sysmem.o + .debug_str 0x0000000000000000 0x6081 Core/Src/sysmem.o .comment 0x0000000000000000 0x7c Core/Src/sysmem.o .debug_frame 0x0000000000000000 0x34 Core/Src/sysmem.o .ARM.attributes @@ -440,7 +443,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x43 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .debug_macro 0x0000000000000000 0x15e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .debug_line 0x0000000000000000 0x651 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o - .debug_str 0x0000000000000000 0x9f070 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o + .debug_str 0x0000000000000000 0x9f030 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .comment 0x0000000000000000 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .debug_frame 0x0000000000000000 0x2fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o .ARM.attributes @@ -513,7 +516,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x164 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o .debug_macro 0x0000000000000000 0x1bf Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o .debug_line 0x0000000000000000 0x6a8 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o - .debug_str 0x0000000000000000 0xa0040 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o + .debug_str 0x0000000000000000 0xa0000 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o .comment 0x0000000000000000 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o .debug_frame 0x0000000000000000 0x1c0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o .ARM.attributes @@ -570,7 +573,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x202 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o .debug_macro 0x0000000000000000 0x1bf Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o .debug_line 0x0000000000000000 0x4ee Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o - .debug_str 0x0000000000000000 0x9fc80 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o + .debug_str 0x0000000000000000 0x9fc40 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o .comment 0x0000000000000000 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o .debug_frame 0x0000000000000000 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o .ARM.attributes @@ -648,6 +651,8 @@ Discarded input sections 0x0000000000000000 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .text.LL_PWR_GetRegulVoltageScaling 0x0000000000000000 0x1c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .text.LL_mDelay + 0x0000000000000000 0x4c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .text.LL_SetSystemCoreClock 0x0000000000000000 0x20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .text.LL_SetFlashLatency @@ -783,7 +788,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000008000000 g_pfnVectors 0x0000000008000188 . = ALIGN (0x4) -.text 0x0000000008000188 0x814 +.text 0x0000000008000188 0x804 0x0000000008000188 . = ALIGN (0x4) *(.text) .text 0x0000000008000188 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o @@ -833,224 +838,224 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000008000518 0x20 Core/Src/main.o .text.LL_FLASH_SetLatency 0x0000000008000538 0x28 Core/Src/main.o - .text.main 0x0000000008000560 0x48 Core/Src/main.o - 0x0000000008000560 main - .text.SystemClock_Config - 0x00000000080005a8 0x66 Core/Src/main.o - 0x00000000080005a8 SystemClock_Config - .text.NMI_Handler - 0x000000000800060e 0xe Core/Src/stm32l4xx_it.o - 0x000000000800060e NMI_Handler - .text.HardFault_Handler - 0x000000000800061c 0x6 Core/Src/stm32l4xx_it.o - 0x000000000800061c HardFault_Handler - .text.MemManage_Handler - 0x0000000008000622 0x6 Core/Src/stm32l4xx_it.o - 0x0000000008000622 MemManage_Handler - .text.BusFault_Handler - 0x0000000008000628 0x6 Core/Src/stm32l4xx_it.o - 0x0000000008000628 BusFault_Handler - .text.UsageFault_Handler - 0x000000000800062e 0x6 Core/Src/stm32l4xx_it.o - 0x000000000800062e UsageFault_Handler - .text.SVC_Handler - 0x0000000008000634 0xe Core/Src/stm32l4xx_it.o - 0x0000000008000634 SVC_Handler - .text.DebugMon_Handler - 0x0000000008000642 0xe Core/Src/stm32l4xx_it.o - 0x0000000008000642 DebugMon_Handler - .text.PendSV_Handler - 0x0000000008000650 0xe Core/Src/stm32l4xx_it.o - 0x0000000008000650 PendSV_Handler + .text.LL_SYSTICK_EnableIT + 0x0000000008000560 0x20 Core/Src/main.o .text.SysTick_Handler - 0x000000000800065e 0xe Core/Src/stm32l4xx_it.o - 0x000000000800065e SysTick_Handler + 0x0000000008000580 0x3c Core/Src/main.o + 0x0000000008000580 SysTick_Handler + .text.main 0x00000000080005bc 0x34 Core/Src/main.o + 0x00000000080005bc main + .text.SystemClock_Config + 0x00000000080005f0 0x66 Core/Src/main.o + 0x00000000080005f0 SystemClock_Config + .text.NMI_Handler + 0x0000000008000656 0xe Core/Src/stm32l4xx_it.o + 0x0000000008000656 NMI_Handler + .text.HardFault_Handler + 0x0000000008000664 0x6 Core/Src/stm32l4xx_it.o + 0x0000000008000664 HardFault_Handler + .text.MemManage_Handler + 0x000000000800066a 0x6 Core/Src/stm32l4xx_it.o + 0x000000000800066a MemManage_Handler + .text.BusFault_Handler + 0x0000000008000670 0x6 Core/Src/stm32l4xx_it.o + 0x0000000008000670 BusFault_Handler + .text.UsageFault_Handler + 0x0000000008000676 0x6 Core/Src/stm32l4xx_it.o + 0x0000000008000676 UsageFault_Handler + .text.SVC_Handler + 0x000000000800067c 0xe Core/Src/stm32l4xx_it.o + 0x000000000800067c SVC_Handler + .text.DebugMon_Handler + 0x000000000800068a 0xe Core/Src/stm32l4xx_it.o + 0x000000000800068a DebugMon_Handler + .text.PendSV_Handler + 0x0000000008000698 0xe Core/Src/stm32l4xx_it.o + 0x0000000008000698 PendSV_Handler + *fill* 0x00000000080006a6 0x2 .text.SystemInit - 0x000000000800066c 0x6c Core/Src/system_stm32l4xx.o - 0x000000000800066c SystemInit + 0x00000000080006a8 0x6c Core/Src/system_stm32l4xx.o + 0x00000000080006a8 SystemInit .text.SystemCoreClockUpdate - 0x00000000080006d8 0x174 Core/Src/system_stm32l4xx.o - 0x00000000080006d8 SystemCoreClockUpdate + 0x0000000008000714 0x174 Core/Src/system_stm32l4xx.o + 0x0000000008000714 SystemCoreClockUpdate .text.Reset_Handler - 0x000000000800084c 0x50 Core/Startup/startup_stm32l476rgtx.o - 0x000000000800084c Reset_Handler + 0x0000000008000888 0x50 Core/Startup/startup_stm32l476rgtx.o + 0x0000000008000888 Reset_Handler .text.Default_Handler - 0x000000000800089c 0x2 Core/Startup/startup_stm32l476rgtx.o - 0x000000000800089c RTC_Alarm_IRQHandler - 0x000000000800089c EXTI2_IRQHandler - 0x000000000800089c TIM8_TRG_COM_IRQHandler - 0x000000000800089c TIM8_CC_IRQHandler - 0x000000000800089c TIM1_CC_IRQHandler - 0x000000000800089c TSC_IRQHandler - 0x000000000800089c TAMP_STAMP_IRQHandler - 0x000000000800089c EXTI3_IRQHandler - 0x000000000800089c LPTIM2_IRQHandler - 0x000000000800089c DFSDM1_FLT1_IRQHandler - 0x000000000800089c I2C3_ER_IRQHandler - 0x000000000800089c DFSDM1_FLT2_IRQHandler - 0x000000000800089c EXTI0_IRQHandler - 0x000000000800089c I2C2_EV_IRQHandler - 0x000000000800089c CAN1_RX0_IRQHandler - 0x000000000800089c FPU_IRQHandler - 0x000000000800089c TIM1_UP_TIM16_IRQHandler - 0x000000000800089c ADC1_2_IRQHandler - 0x000000000800089c SPI1_IRQHandler - 0x000000000800089c TIM6_DAC_IRQHandler - 0x000000000800089c TIM8_UP_IRQHandler - 0x000000000800089c DMA2_Channel2_IRQHandler - 0x000000000800089c DMA1_Channel4_IRQHandler - 0x000000000800089c SAI2_IRQHandler - 0x000000000800089c DFSDM1_FLT3_IRQHandler - 0x000000000800089c USART3_IRQHandler - 0x000000000800089c DMA1_Channel7_IRQHandler - 0x000000000800089c CAN1_RX1_IRQHandler - 0x000000000800089c LCD_IRQHandler - 0x000000000800089c UART5_IRQHandler - 0x000000000800089c ADC3_IRQHandler - 0x000000000800089c TIM4_IRQHandler - 0x000000000800089c DMA2_Channel1_IRQHandler - 0x000000000800089c QUADSPI_IRQHandler - 0x000000000800089c I2C1_EV_IRQHandler - 0x000000000800089c DMA1_Channel6_IRQHandler - 0x000000000800089c UART4_IRQHandler - 0x000000000800089c DMA2_Channel4_IRQHandler - 0x000000000800089c TIM3_IRQHandler - 0x000000000800089c RCC_IRQHandler - 0x000000000800089c DMA1_Channel1_IRQHandler - 0x000000000800089c Default_Handler - 0x000000000800089c DMA2_Channel7_IRQHandler - 0x000000000800089c EXTI15_10_IRQHandler - 0x000000000800089c TIM7_IRQHandler - 0x000000000800089c SDMMC1_IRQHandler - 0x000000000800089c TIM5_IRQHandler - 0x000000000800089c I2C3_EV_IRQHandler - 0x000000000800089c EXTI9_5_IRQHandler - 0x000000000800089c RTC_WKUP_IRQHandler - 0x000000000800089c PVD_PVM_IRQHandler - 0x000000000800089c SPI2_IRQHandler - 0x000000000800089c CAN1_TX_IRQHandler - 0x000000000800089c DMA2_Channel5_IRQHandler - 0x000000000800089c DMA1_Channel5_IRQHandler - 0x000000000800089c EXTI4_IRQHandler - 0x000000000800089c RNG_IRQHandler - 0x000000000800089c TIM1_TRG_COM_TIM17_IRQHandler - 0x000000000800089c DMA1_Channel3_IRQHandler - 0x000000000800089c COMP_IRQHandler - 0x000000000800089c WWDG_IRQHandler - 0x000000000800089c LPUART1_IRQHandler - 0x000000000800089c DMA2_Channel6_IRQHandler - 0x000000000800089c TIM2_IRQHandler - 0x000000000800089c EXTI1_IRQHandler - 0x000000000800089c USART2_IRQHandler - 0x000000000800089c DFSDM1_FLT0_IRQHandler - 0x000000000800089c I2C2_ER_IRQHandler - 0x000000000800089c DMA1_Channel2_IRQHandler - 0x000000000800089c TIM8_BRK_IRQHandler - 0x000000000800089c CAN1_SCE_IRQHandler - 0x000000000800089c FLASH_IRQHandler - 0x000000000800089c USART1_IRQHandler - 0x000000000800089c OTG_FS_IRQHandler - 0x000000000800089c SPI3_IRQHandler - 0x000000000800089c I2C1_ER_IRQHandler - 0x000000000800089c FMC_IRQHandler - 0x000000000800089c SWPMI1_IRQHandler - 0x000000000800089c LPTIM1_IRQHandler - 0x000000000800089c SAI1_IRQHandler - 0x000000000800089c DMA2_Channel3_IRQHandler - 0x000000000800089c TIM1_BRK_TIM15_IRQHandler - *fill* 0x000000000800089e 0x2 + 0x00000000080008d8 0x2 Core/Startup/startup_stm32l476rgtx.o + 0x00000000080008d8 RTC_Alarm_IRQHandler + 0x00000000080008d8 EXTI2_IRQHandler + 0x00000000080008d8 TIM8_TRG_COM_IRQHandler + 0x00000000080008d8 TIM8_CC_IRQHandler + 0x00000000080008d8 TIM1_CC_IRQHandler + 0x00000000080008d8 TSC_IRQHandler + 0x00000000080008d8 TAMP_STAMP_IRQHandler + 0x00000000080008d8 EXTI3_IRQHandler + 0x00000000080008d8 LPTIM2_IRQHandler + 0x00000000080008d8 DFSDM1_FLT1_IRQHandler + 0x00000000080008d8 I2C3_ER_IRQHandler + 0x00000000080008d8 DFSDM1_FLT2_IRQHandler + 0x00000000080008d8 EXTI0_IRQHandler + 0x00000000080008d8 I2C2_EV_IRQHandler + 0x00000000080008d8 CAN1_RX0_IRQHandler + 0x00000000080008d8 FPU_IRQHandler + 0x00000000080008d8 TIM1_UP_TIM16_IRQHandler + 0x00000000080008d8 ADC1_2_IRQHandler + 0x00000000080008d8 SPI1_IRQHandler + 0x00000000080008d8 TIM6_DAC_IRQHandler + 0x00000000080008d8 TIM8_UP_IRQHandler + 0x00000000080008d8 DMA2_Channel2_IRQHandler + 0x00000000080008d8 DMA1_Channel4_IRQHandler + 0x00000000080008d8 SAI2_IRQHandler + 0x00000000080008d8 DFSDM1_FLT3_IRQHandler + 0x00000000080008d8 USART3_IRQHandler + 0x00000000080008d8 DMA1_Channel7_IRQHandler + 0x00000000080008d8 CAN1_RX1_IRQHandler + 0x00000000080008d8 LCD_IRQHandler + 0x00000000080008d8 UART5_IRQHandler + 0x00000000080008d8 ADC3_IRQHandler + 0x00000000080008d8 TIM4_IRQHandler + 0x00000000080008d8 DMA2_Channel1_IRQHandler + 0x00000000080008d8 QUADSPI_IRQHandler + 0x00000000080008d8 I2C1_EV_IRQHandler + 0x00000000080008d8 DMA1_Channel6_IRQHandler + 0x00000000080008d8 UART4_IRQHandler + 0x00000000080008d8 DMA2_Channel4_IRQHandler + 0x00000000080008d8 TIM3_IRQHandler + 0x00000000080008d8 RCC_IRQHandler + 0x00000000080008d8 DMA1_Channel1_IRQHandler + 0x00000000080008d8 Default_Handler + 0x00000000080008d8 DMA2_Channel7_IRQHandler + 0x00000000080008d8 EXTI15_10_IRQHandler + 0x00000000080008d8 TIM7_IRQHandler + 0x00000000080008d8 SDMMC1_IRQHandler + 0x00000000080008d8 TIM5_IRQHandler + 0x00000000080008d8 I2C3_EV_IRQHandler + 0x00000000080008d8 EXTI9_5_IRQHandler + 0x00000000080008d8 RTC_WKUP_IRQHandler + 0x00000000080008d8 PVD_PVM_IRQHandler + 0x00000000080008d8 SPI2_IRQHandler + 0x00000000080008d8 CAN1_TX_IRQHandler + 0x00000000080008d8 DMA2_Channel5_IRQHandler + 0x00000000080008d8 DMA1_Channel5_IRQHandler + 0x00000000080008d8 EXTI4_IRQHandler + 0x00000000080008d8 RNG_IRQHandler + 0x00000000080008d8 TIM1_TRG_COM_TIM17_IRQHandler + 0x00000000080008d8 DMA1_Channel3_IRQHandler + 0x00000000080008d8 COMP_IRQHandler + 0x00000000080008d8 WWDG_IRQHandler + 0x00000000080008d8 LPUART1_IRQHandler + 0x00000000080008d8 DMA2_Channel6_IRQHandler + 0x00000000080008d8 TIM2_IRQHandler + 0x00000000080008d8 EXTI1_IRQHandler + 0x00000000080008d8 USART2_IRQHandler + 0x00000000080008d8 DFSDM1_FLT0_IRQHandler + 0x00000000080008d8 I2C2_ER_IRQHandler + 0x00000000080008d8 DMA1_Channel2_IRQHandler + 0x00000000080008d8 TIM8_BRK_IRQHandler + 0x00000000080008d8 CAN1_SCE_IRQHandler + 0x00000000080008d8 FLASH_IRQHandler + 0x00000000080008d8 USART1_IRQHandler + 0x00000000080008d8 OTG_FS_IRQHandler + 0x00000000080008d8 SPI3_IRQHandler + 0x00000000080008d8 I2C1_ER_IRQHandler + 0x00000000080008d8 FMC_IRQHandler + 0x00000000080008d8 SWPMI1_IRQHandler + 0x00000000080008d8 LPTIM1_IRQHandler + 0x00000000080008d8 SAI1_IRQHandler + 0x00000000080008d8 DMA2_Channel3_IRQHandler + 0x00000000080008d8 TIM1_BRK_TIM15_IRQHandler + *fill* 0x00000000080008da 0x2 .text.LL_InitTick - 0x00000000080008a0 0x34 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + 0x00000000080008dc 0x34 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o .text.LL_Init1msTick - 0x00000000080008d4 0x1a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - 0x00000000080008d4 LL_Init1msTick - *fill* 0x00000000080008ee 0x2 - .text.LL_mDelay - 0x00000000080008f0 0x4c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - 0x00000000080008f0 LL_mDelay + 0x0000000008000910 0x1a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + 0x0000000008000910 LL_Init1msTick + *fill* 0x000000000800092a 0x2 .text.__libc_init_array - 0x000000000800093c 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - 0x000000000800093c __libc_init_array + 0x000000000800092c 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) + 0x000000000800092c __libc_init_array *(.glue_7) - .glue_7 0x0000000008000984 0x0 linker stubs + .glue_7 0x0000000008000974 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0000000008000984 0x0 linker stubs + .glue_7t 0x0000000008000974 0x0 linker stubs *(.eh_frame) - .eh_frame 0x0000000008000984 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o + .eh_frame 0x0000000008000974 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o *(.init) - .init 0x0000000008000984 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - 0x0000000008000984 _init - .init 0x0000000008000988 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o + .init 0x0000000008000974 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o + 0x0000000008000974 _init + .init 0x0000000008000978 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o *(.fini) - .fini 0x0000000008000990 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - 0x0000000008000990 _fini - .fini 0x0000000008000994 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - 0x000000000800099c . = ALIGN (0x4) - 0x000000000800099c _etext = . + .fini 0x0000000008000980 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o + 0x0000000008000980 _fini + .fini 0x0000000008000984 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o + 0x000000000800098c . = ALIGN (0x4) + 0x000000000800098c _etext = . -.vfp11_veneer 0x000000000800099c 0x0 - .vfp11_veneer 0x000000000800099c 0x0 linker stubs +.vfp11_veneer 0x000000000800098c 0x0 + .vfp11_veneer 0x000000000800098c 0x0 linker stubs -.v4_bx 0x000000000800099c 0x0 - .v4_bx 0x000000000800099c 0x0 linker stubs +.v4_bx 0x000000000800098c 0x0 + .v4_bx 0x000000000800098c 0x0 linker stubs -.iplt 0x000000000800099c 0x0 - .iplt 0x000000000800099c 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o +.iplt 0x000000000800098c 0x0 + .iplt 0x000000000800098c 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o -.rodata 0x000000000800099c 0x40 - 0x000000000800099c . = ALIGN (0x4) +.rodata 0x000000000800098c 0x40 + 0x000000000800098c . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.AHBPrescTable - 0x000000000800099c 0x10 Core/Src/system_stm32l4xx.o - 0x000000000800099c AHBPrescTable + 0x000000000800098c 0x10 Core/Src/system_stm32l4xx.o + 0x000000000800098c AHBPrescTable .rodata.MSIRangeTable - 0x00000000080009ac 0x30 Core/Src/system_stm32l4xx.o - 0x00000000080009ac MSIRangeTable - 0x00000000080009dc . = ALIGN (0x4) + 0x000000000800099c 0x30 Core/Src/system_stm32l4xx.o + 0x000000000800099c MSIRangeTable + 0x00000000080009cc . = ALIGN (0x4) -.rel.dyn 0x00000000080009dc 0x0 - .rel.iplt 0x00000000080009dc 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o +.rel.dyn 0x00000000080009cc 0x0 + .rel.iplt 0x00000000080009cc 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o -.ARM.extab 0x00000000080009dc 0x0 - 0x00000000080009dc . = ALIGN (0x4) +.ARM.extab 0x00000000080009cc 0x0 + 0x00000000080009cc . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x00000000080009dc . = ALIGN (0x4) + 0x00000000080009cc . = ALIGN (0x4) -.ARM 0x00000000080009dc 0x0 - 0x00000000080009dc . = ALIGN (0x4) - 0x00000000080009dc __exidx_start = . +.ARM 0x00000000080009cc 0x0 + 0x00000000080009cc . = ALIGN (0x4) + 0x00000000080009cc __exidx_start = . *(.ARM.exidx*) - 0x00000000080009dc __exidx_end = . - 0x00000000080009dc . = ALIGN (0x4) + 0x00000000080009cc __exidx_end = . + 0x00000000080009cc . = ALIGN (0x4) -.preinit_array 0x00000000080009dc 0x0 - 0x00000000080009dc . = ALIGN (0x4) - 0x00000000080009dc PROVIDE (__preinit_array_start = .) +.preinit_array 0x00000000080009cc 0x0 + 0x00000000080009cc . = ALIGN (0x4) + 0x00000000080009cc PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x00000000080009dc PROVIDE (__preinit_array_end = .) - 0x00000000080009dc . = ALIGN (0x4) + 0x00000000080009cc PROVIDE (__preinit_array_end = .) + 0x00000000080009cc . = ALIGN (0x4) -.init_array 0x00000000080009dc 0x4 - 0x00000000080009dc . = ALIGN (0x4) - 0x00000000080009dc PROVIDE (__init_array_start = .) +.init_array 0x00000000080009cc 0x4 + 0x00000000080009cc . = ALIGN (0x4) + 0x00000000080009cc PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x00000000080009dc 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - 0x00000000080009e0 PROVIDE (__init_array_end = .) - 0x00000000080009e0 . = ALIGN (0x4) + .init_array 0x00000000080009cc 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o + 0x00000000080009d0 PROVIDE (__init_array_end = .) + 0x00000000080009d0 . = ALIGN (0x4) -.fini_array 0x00000000080009e0 0x4 - 0x00000000080009e0 . = ALIGN (0x4) +.fini_array 0x00000000080009d0 0x4 + 0x00000000080009d0 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x00000000080009e0 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o + .fini_array 0x00000000080009d0 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x00000000080009e4 . = ALIGN (0x4) - 0x00000000080009e4 _sidata = LOADADDR (.data) + 0x00000000080009d4 . = ALIGN (0x4) + 0x00000000080009d4 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0x4 load address 0x00000000080009e4 +.data 0x0000000020000000 0x4 load address 0x00000000080009d4 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -1061,31 +1066,37 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000020000004 . = ALIGN (0x4) 0x0000000020000004 _edata = . -.igot.plt 0x0000000020000004 0x0 load address 0x00000000080009e8 +.igot.plt 0x0000000020000004 0x0 load address 0x00000000080009d8 .igot.plt 0x0000000020000004 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o 0x0000000020000004 . = ALIGN (0x4) -.bss 0x0000000020000004 0x1c load address 0x00000000080009e8 +.bss 0x0000000020000004 0x24 load address 0x00000000080009d8 0x0000000020000004 _sbss = . 0x0000000020000004 __bss_start__ = _sbss *(.bss) .bss 0x0000000020000004 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o *(.bss*) + .bss.msTicks 0x0000000020000020 0x4 Core/Src/main.o + 0x0000000020000020 msTicks + .bss.blue_mode + 0x0000000020000024 0x1 Core/Src/main.o + 0x0000000020000024 blue_mode *(COMMON) - 0x0000000020000020 . = ALIGN (0x4) - 0x0000000020000020 _ebss = . - 0x0000000020000020 __bss_end__ = _ebss + 0x0000000020000028 . = ALIGN (0x4) + *fill* 0x0000000020000025 0x3 + 0x0000000020000028 _ebss = . + 0x0000000020000028 __bss_end__ = _ebss ._user_heap_stack - 0x0000000020000020 0x600 load address 0x00000000080009e8 - 0x0000000020000020 . = ALIGN (0x8) + 0x0000000020000028 0x600 load address 0x00000000080009d8 + 0x0000000020000028 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x0000000020000020 PROVIDE (_end = .) - 0x0000000020000220 . = (. + _Min_Heap_Size) - *fill* 0x0000000020000020 0x200 - 0x0000000020000620 . = (. + _Min_Stack_Size) - *fill* 0x0000000020000220 0x400 - 0x0000000020000620 . = ALIGN (0x8) + 0x0000000020000028 PROVIDE (_end = .) + 0x0000000020000228 . = (. + _Min_Heap_Size) + *fill* 0x0000000020000028 0x200 + 0x0000000020000628 . = (. + _Min_Stack_Size) + *fill* 0x0000000020000228 0x400 + 0x0000000020000628 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -1117,45 +1128,45 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x00000000000001c8 0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o OUTPUT(L476_ats_blink-master.elf elf32-littlearm) -.debug_info 0x0000000000000000 0x206d +.debug_info 0x0000000000000000 0x2106 .debug_info 0x0000000000000000 0x682 Core/Src/gpio.o - .debug_info 0x0000000000000682 0x5fd Core/Src/main.o - .debug_info 0x0000000000000c7f 0x1f7 Core/Src/stm32l4xx_it.o - .debug_info 0x0000000000000e76 0x5b4 Core/Src/system_stm32l4xx.o - .debug_info 0x000000000000142a 0x22 Core/Startup/startup_stm32l476rgtx.o - .debug_info 0x000000000000144c 0xc21 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_info 0x0000000000000682 0x6a7 Core/Src/main.o + .debug_info 0x0000000000000d29 0x1e6 Core/Src/stm32l4xx_it.o + .debug_info 0x0000000000000f0f 0x5b4 Core/Src/system_stm32l4xx.o + .debug_info 0x00000000000014c3 0x22 Core/Startup/startup_stm32l476rgtx.o + .debug_info 0x00000000000014e5 0xc21 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_abbrev 0x0000000000000000 0x74a +.debug_abbrev 0x0000000000000000 0x771 .debug_abbrev 0x0000000000000000 0x1ee Core/Src/gpio.o - .debug_abbrev 0x00000000000001ee 0x13b Core/Src/main.o - .debug_abbrev 0x0000000000000329 0xa3 Core/Src/stm32l4xx_it.o - .debug_abbrev 0x00000000000003cc 0x134 Core/Src/system_stm32l4xx.o - .debug_abbrev 0x0000000000000500 0x12 Core/Startup/startup_stm32l476rgtx.o - .debug_abbrev 0x0000000000000512 0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_abbrev 0x00000000000001ee 0x162 Core/Src/main.o + .debug_abbrev 0x0000000000000350 0xa3 Core/Src/stm32l4xx_it.o + .debug_abbrev 0x00000000000003f3 0x134 Core/Src/system_stm32l4xx.o + .debug_abbrev 0x0000000000000527 0x12 Core/Startup/startup_stm32l476rgtx.o + .debug_abbrev 0x0000000000000539 0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_aranges 0x0000000000000000 0x2d0 +.debug_aranges 0x0000000000000000 0x2d8 .debug_aranges 0x0000000000000000 0x60 Core/Src/gpio.o .debug_aranges - 0x0000000000000060 0x88 Core/Src/main.o + 0x0000000000000060 0x98 Core/Src/main.o .debug_aranges - 0x00000000000000e8 0x60 Core/Src/stm32l4xx_it.o + 0x00000000000000f8 0x58 Core/Src/stm32l4xx_it.o .debug_aranges - 0x0000000000000148 0x28 Core/Src/system_stm32l4xx.o + 0x0000000000000150 0x28 Core/Src/system_stm32l4xx.o .debug_aranges - 0x0000000000000170 0x28 Core/Startup/startup_stm32l476rgtx.o + 0x0000000000000178 0x28 Core/Startup/startup_stm32l476rgtx.o .debug_aranges - 0x0000000000000198 0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + 0x00000000000001a0 0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_ranges 0x0000000000000000 0x278 +.debug_ranges 0x0000000000000000 0x280 .debug_ranges 0x0000000000000000 0x50 Core/Src/gpio.o - .debug_ranges 0x0000000000000050 0x78 Core/Src/main.o - .debug_ranges 0x00000000000000c8 0x50 Core/Src/stm32l4xx_it.o - .debug_ranges 0x0000000000000118 0x18 Core/Src/system_stm32l4xx.o - .debug_ranges 0x0000000000000130 0x20 Core/Startup/startup_stm32l476rgtx.o - .debug_ranges 0x0000000000000150 0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_ranges 0x0000000000000050 0x88 Core/Src/main.o + .debug_ranges 0x00000000000000d8 0x48 Core/Src/stm32l4xx_it.o + .debug_ranges 0x0000000000000120 0x18 Core/Src/system_stm32l4xx.o + .debug_ranges 0x0000000000000138 0x20 Core/Startup/startup_stm32l476rgtx.o + .debug_ranges 0x0000000000000158 0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_macro 0x0000000000000000 0x1e117 +.debug_macro 0x0000000000000000 0x1e120 .debug_macro 0x0000000000000000 0x102 Core/Src/gpio.o .debug_macro 0x0000000000000102 0xaa8 Core/Src/gpio.o .debug_macro 0x0000000000000baa 0x2e Core/Src/gpio.o @@ -1175,42 +1186,42 @@ OUTPUT(L476_ats_blink-master.elf elf32-littlearm) .debug_macro 0x000000000001c3e5 0x43 Core/Src/gpio.o .debug_macro 0x000000000001c428 0x1b9 Core/Src/gpio.o .debug_macro 0x000000000001c5e1 0x16a Core/Src/gpio.o - .debug_macro 0x000000000001c74b 0x105 Core/Src/main.o - .debug_macro 0x000000000001c850 0x716 Core/Src/main.o - .debug_macro 0x000000000001cf66 0x2f5 Core/Src/main.o - .debug_macro 0x000000000001d25b 0xa7 Core/Src/main.o - .debug_macro 0x000000000001d302 0x142 Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001d444 0x1bf Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001d603 0x164 Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001d767 0x1a7 Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001d90e 0x208 Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001db16 0x2cb Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001dde1 0x22 Core/Src/stm32l4xx_it.o - .debug_macro 0x000000000001de03 0xd4 Core/Src/system_stm32l4xx.o - .debug_macro 0x000000000001ded7 0x19f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_macro 0x000000000001e076 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_macro 0x000000000001c74b 0x10e Core/Src/main.o + .debug_macro 0x000000000001c859 0x716 Core/Src/main.o + .debug_macro 0x000000000001cf6f 0x2f5 Core/Src/main.o + .debug_macro 0x000000000001d264 0xa7 Core/Src/main.o + .debug_macro 0x000000000001d30b 0x1a7 Core/Src/main.o + .debug_macro 0x000000000001d4b2 0x142 Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001d5f4 0x1bf Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001d7b3 0x164 Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001d917 0x208 Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001db1f 0x2cb Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001ddea 0x22 Core/Src/stm32l4xx_it.o + .debug_macro 0x000000000001de0c 0xd4 Core/Src/system_stm32l4xx.o + .debug_macro 0x000000000001dee0 0x19f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_macro 0x000000000001e07f 0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_line 0x0000000000000000 0x1fee +.debug_line 0x0000000000000000 0x201e .debug_line 0x0000000000000000 0x58c Core/Src/gpio.o - .debug_line 0x000000000000058c 0x62f Core/Src/main.o - .debug_line 0x0000000000000bbb 0x624 Core/Src/stm32l4xx_it.o - .debug_line 0x00000000000011df 0x496 Core/Src/system_stm32l4xx.o - .debug_line 0x0000000000001675 0x87 Core/Startup/startup_stm32l476rgtx.o - .debug_line 0x00000000000016fc 0x8f2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_line 0x000000000000058c 0x670 Core/Src/main.o + .debug_line 0x0000000000000bfc 0x613 Core/Src/stm32l4xx_it.o + .debug_line 0x000000000000120f 0x496 Core/Src/system_stm32l4xx.o + .debug_line 0x00000000000016a5 0x87 Core/Startup/startup_stm32l476rgtx.o + .debug_line 0x000000000000172c 0x8f2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_str 0x0000000000000000 0xa94c9 - .debug_str 0x0000000000000000 0x9f8ba Core/Src/gpio.o - 0x9fa7d (size before relaxing) - .debug_str 0x000000000009f8ba 0x541a Core/Src/main.o - 0xa4d32 (size before relaxing) - .debug_str 0x00000000000a4cd4 0x384b Core/Src/stm32l4xx_it.o - 0xa826a (size before relaxing) - .debug_str 0x00000000000a851f 0xd3 Core/Src/system_stm32l4xx.o - 0x9e65f (size before relaxing) - .debug_str 0x00000000000a85f2 0x36 Core/Startup/startup_stm32l476rgtx.o - 0xb0 (size before relaxing) - .debug_str 0x00000000000a8628 0xea1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - 0xa5325 (size before relaxing) +.debug_str 0x0000000000000000 0xa94ae + .debug_str 0x0000000000000000 0x9f87a Core/Src/gpio.o + 0x9fa3d (size before relaxing) + .debug_str 0x000000000009f87a 0x601b Core/Src/main.o + 0xa58f3 (size before relaxing) + .debug_str 0x00000000000a5895 0x2c92 Core/Src/stm32l4xx_it.o + 0xa821a (size before relaxing) + .debug_str 0x00000000000a8527 0xd3 Core/Src/system_stm32l4xx.o + 0x9e61f (size before relaxing) + .debug_str 0x00000000000a85fa 0x36 Core/Startup/startup_stm32l476rgtx.o + 0x70 (size before relaxing) + .debug_str 0x00000000000a8630 0xe7e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + 0xa52e5 (size before relaxing) .comment 0x0000000000000000 0x7b .comment 0x0000000000000000 0x7b Core/Src/gpio.o @@ -1220,10 +1231,10 @@ OUTPUT(L476_ats_blink-master.elf elf32-littlearm) .comment 0x000000000000007b 0x7c Core/Src/system_stm32l4xx.o .comment 0x000000000000007b 0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o -.debug_frame 0x0000000000000000 0x9e4 +.debug_frame 0x0000000000000000 0xa00 .debug_frame 0x0000000000000000 0x15c Core/Src/gpio.o - .debug_frame 0x000000000000015c 0x1f8 Core/Src/main.o - .debug_frame 0x0000000000000354 0x110 Core/Src/stm32l4xx_it.o - .debug_frame 0x0000000000000464 0x58 Core/Src/system_stm32l4xx.o - .debug_frame 0x00000000000004bc 0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o - .debug_frame 0x00000000000009b8 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) + .debug_frame 0x000000000000015c 0x234 Core/Src/main.o + .debug_frame 0x0000000000000390 0xf0 Core/Src/stm32l4xx_it.o + .debug_frame 0x0000000000000480 0x58 Core/Src/system_stm32l4xx.o + .debug_frame 0x00000000000004d8 0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o + .debug_frame 0x00000000000009d4 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) diff --git a/L476_ats_blink-master/Debug/makefile b/L476_ats_blink-master/Debug/makefile index 698fc21..faface3 100644 --- a/L476_ats_blink-master/Debug/makefile +++ b/L476_ats_blink-master/Debug/makefile @@ -46,8 +46,8 @@ L476_ats_blink-master.bin \ all: L476_ats_blink-master.elf secondary-outputs # Tool invocations -L476_ats_blink-master.elf: $(OBJS) $(USER_OBJS) C:\Users\adminaboyer\alex\enseignements_2020_21\TP_Prog_faible_energie\WorkSpace_STM32CubeIDE\L476_ats_blink-master\STM32L476RGTX_FLASH.ld - arm-none-eabi-gcc -o "L476_ats_blink-master.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\adminaboyer\alex\enseignements_2020_21\TP_Prog_faible_energie\WorkSpace_STM32CubeIDE\L476_ats_blink-master\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="L476_ats_blink-master.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +L476_ats_blink-master.elf: $(OBJS) $(USER_OBJS) C:\Users\camer\Desktop\LoPoSo\L476_ats_blink-master\STM32L476RGTX_FLASH.ld + arm-none-eabi-gcc -o "L476_ats_blink-master.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\camer\Desktop\LoPoSo\L476_ats_blink-master\STM32L476RGTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="L476_ats_blink-master.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group @echo 'Finished building target: $@' @echo ' ' diff --git a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h index eedac72..c50e827 100644 --- a/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h +++ b/L476_ats_blink-master/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h @@ -282,7 +282,7 @@ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ + SysTick_CTRL_ENABLE_Msk; } void LL_Init1msTick(uint32_t HCLKFrequency);