diff --git a/L476_ats_blink-master/.cproject b/L476_ats_blink-master/.cproject
index fa99011..a1614b1 100644
--- a/L476_ats_blink-master/.cproject
+++ b/L476_ats_blink-master/.cproject
@@ -36,10 +36,23 @@
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.260461090" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
 								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1008084780" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.2084042077" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="HSE_VALUE=8000000"/>
+									<listOptionValue builtIn="false" value="MSI_VALUE=4000000"/>
+									<listOptionValue builtIn="false" value="LSI_VALUE=32000"/>
+									<listOptionValue builtIn="false" value="HSE_STARTUP_TIMEOUT=100"/>
+									<listOptionValue builtIn="false" value="HSI_VALUE=16000000"/>
 									<listOptionValue builtIn="false" value="DEBUG"/>
+									<listOptionValue builtIn="false" value="LSE_STARTUP_TIMEOUT=5000"/>
+									<listOptionValue builtIn="false" value="LSE_VALUE=32768"/>
+									<listOptionValue builtIn="false" value="DATA_CACHE_ENABLE=1"/>
 									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="VDD_VALUE=3300"/>
+									<listOptionValue builtIn="false" value="INSTRUCTION_CACHE_ENABLE=1"/>
+									<listOptionValue builtIn="false" value="EXTERNALSAI2_CLOCK_VALUE=2097000"/>
 									<listOptionValue builtIn="false" value="STM32L476xx"/>
 									<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
+									<listOptionValue builtIn="false" value="EXTERNALSAI1_CLOCK_VALUE=2097000"/>
+									<listOptionValue builtIn="false" value="PREFETCH_ENABLE=0"/>
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.91113608" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
diff --git a/L476_ats_blink-master/.mxproject b/L476_ats_blink-master/.mxproject
index b0adf27..2ff97dd 100644
--- a/L476_ats_blink-master/.mxproject
+++ b/L476_ats_blink-master/.mxproject
@@ -1,8 +1,8 @@
 [PreviousLibFiles]
-LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
 
 [PreviousUsedCubeIDEFiles]
-SourceFiles=Core\Src\main.c;Core\Src\stm32l4xx_it.c;Core\Src\stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Core\Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Core\Src/system_stm32l4xx.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
+SourceFiles=Core\Src\main.c;Core\Src\stm32l4xx_it.c;Core\Src\stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Core\Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Core\Src/system_stm32l4xx.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
 HeaderPath=Drivers\STM32L4xx_HAL_Driver\Inc;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32L4xx\Include;Drivers\CMSIS\Include;Core\Inc;
 CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32L476xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
 
diff --git a/L476_ats_blink-master/Core/Src/gpio.c b/L476_ats_blink-master/Core/Src/gpio.c
deleted file mode 100644
index 73bf964..0000000
--- a/L476_ats_blink-master/Core/Src/gpio.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * gpio.c - GPIO functions, only for Nucleo-STM32L476 board
- */
-#include "stm32l4xx_ll_bus.h"
-#include "stm32l4xx_ll_gpio.h"
-#include "gpio.h"
-
-#define LED_PORT GPIOA
-#define LED_PIN LL_GPIO_PIN_5
-#define BUT_PORT GPIOC
-#define BUT_PIN LL_GPIO_PIN_13
-
-void GPIO_init(void)
-{
-// PORT A
-LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOA );
-// Green LED (user LED) - PA5
-LL_GPIO_SetPinMode(       LED_PORT, LED_PIN, LL_GPIO_MODE_OUTPUT );
-LL_GPIO_SetPinOutputType( LED_PORT, LED_PIN, LL_GPIO_OUTPUT_PUSHPULL );
-
-// PORT C
-LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOC );
-// Blue button - PC13
-LL_GPIO_SetPinMode( BUT_PORT, BUT_PIN, LL_GPIO_MODE_INPUT );
-}
-
-
-void LED_GREEN( int val )
-{
-if	( val )
-	LL_GPIO_SetOutputPin(   LED_PORT, LED_PIN );
-else	LL_GPIO_ResetOutputPin( LED_PORT, LED_PIN );
-}
-
-int BLUE_BUTTON()
-{
-return ( !LL_GPIO_IsInputPinSet( BUT_PORT, BUT_PIN ) );
-}
-
-
-
-
-
-
diff --git a/L476_ats_blink-master/Core/Src/gpio.h b/L476_ats_blink-master/Core/Src/gpio.h
deleted file mode 100644
index 68bb7fa..0000000
--- a/L476_ats_blink-master/Core/Src/gpio.h
+++ /dev/null
@@ -1,7 +0,0 @@
-
-// configuration
-void GPIO_init(void);
-
-// utilization
-void LED_GREEN( int val );
-int BLUE_BUTTON();
diff --git a/L476_ats_blink-master/Core/Src/main.c b/L476_ats_blink-master/Core/Src/main.c
index b0c1462..eb2283d 100644
--- a/L476_ats_blink-master/Core/Src/main.c
+++ b/L476_ats_blink-master/Core/Src/main.c
@@ -1,115 +1,253 @@
-/* Project L476_ats_blink for STM32L476 mounted on Nucleo board:
- * the user LED (mounted on pin PA-5) is flashed every second for 50 ms.
- * The time base is provided by Systick (1000 ticks per second).
- * The clock configuration is the default one (Sysclk = 80 MHz, derived from MSI and PLL).
- */
-
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
 /* Includes ------------------------------------------------------------------*/
-#include "stm32l4xx_ll_bus.h"
-#include "stm32l4xx_ll_rcc.h"
-#include "stm32l4xx_ll_system.h"
-#include "stm32l4xx_ll_utils.h"
-#include "stm32l4xx_ll_gpio.h"
-#include "stm32l4xx_ll_cortex.h"
-// #if defined(USE_FULL_ASSERT)
-// #include "stm32_assert.h"
-// #endif /* USE_FULL_ASSERT */
+#include "main.h"
 
-#include "gpio.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
 
-// systick interrupt handler
-volatile uint32_t msTicks = 0;
-volatile uint8_t expe = 0;
-volatile uint8_t blue_mode = 0;
+/* USER CODE END Includes */
 
-void SysTick_Handler()
-{
-  if	( BLUE_BUTTON() ){
-			blue_mode = 1 ;
-  }
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
 
-  msTicks++;                                                /* See startup file startup_LPC17xx.s for SysTick vector */
-  if (msTicks == 5){
-	  LED_GREEN(0);
-  }else if(msTicks >= 200){
-	  msTicks = 0;
-	  LED_GREEN(1);
-  }
-}
+/* USER CODE END PTD */
 
-void     SystemClock_Config(void);
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
 
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_RTC_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
 int main(void)
 {
-/* Configure the system clock */
-SystemClock_Config();
+  /* USER CODE BEGIN 1 */
 
-// config GPIO
-GPIO_init();
+  /* USER CODE END 1 */
 
-// init systick timer (tick period at 1 ms)
-LL_Init1msTick( SystemCoreClock );
-LL_SYSTICK_EnableIT();
+  /* MCU Configuration--------------------------------------------------------*/
 
-//Setup Sleep mode
-LL_LPM_EnableSleep();
-//LL_LPM_EnableSleepOnExit();
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
 
-while (1)  {
-	if (blue_mode){
-		__WFI();
-	}
+  /* USER CODE BEGIN Init */
 
-//	else {
-//		LED_GREEN(0);
-//		LL_mDelay(950);
-//		LED_GREEN(1);
-//		LL_mDelay(50);
-//		}
-	}
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_RTC_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
 }
 
 /**
-  * @brief  System Clock Configuration
-  *         The system Clock is configured as follows :
-  *            System Clock source            = PLL (MSI)
-  *            SYSCLK(Hz)                     = 80000000
-  *            HCLK(Hz)                       = 80000000
-  *            AHB Prescaler                  = 1
-  *            APB1 Prescaler                 = 1
-  *            APB2 Prescaler                 = 1
-  *            MSI Frequency(Hz)              = 4000000
-  *            PLL_M                          = 1
-  *            PLL_N                          = 40
-  *            PLL_R                          = 2
-  *            Flash Latency(WS)              = 4
-  * @param  None
+  * @brief System Clock Configuration
+  * @retval None
+  * 24Mhz + RTC + LSE
+  */
+void SystemClock_Config(void)
+{
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+  while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
+  {
+  }
+  LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
+  LL_RCC_MSI_Enable();
+
+   /* Wait till MSI is ready */
+  while(LL_RCC_MSI_IsReady() != 1)
+  {
+
+  }
+  LL_RCC_MSI_EnablePLLMode();
+  LL_RCC_MSI_EnableRangeSelection();
+  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
+  LL_RCC_MSI_SetCalibTrimming(0);
+  LL_PWR_EnableBkUpAccess();
+  LL_RCC_ForceBackupDomainReset();
+  LL_RCC_ReleaseBackupDomainReset();
+  LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
+  LL_RCC_LSE_Enable();
+
+   /* Wait till LSE is ready */
+  while(LL_RCC_LSE_IsReady() != 1)
+  {
+
+  }
+  LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
+  LL_RCC_EnableRTC();
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
+  LL_RCC_PLL_EnableDomain_SYS();
+  LL_RCC_PLL_Enable();
+
+   /* Wait till PLL is ready */
+  while(LL_RCC_PLL_IsReady() != 1)
+  {
+
+  }
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+
+   /* Wait till System clock is ready */
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
+  {
+
+  }
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+  LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+  LL_SetSystemCoreClock(24000000);
+
+   /* Update the time base */
+  if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
   * @retval None
   */
-void SystemClock_Config(void) {
-/* MSI configuration and activation */
-LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
-LL_RCC_MSI_Enable();
-while	(LL_RCC_MSI_IsReady() != 1)
-	{ };
+static void MX_RTC_Init(void)
+{
 
-/* Main PLL configuration and activation */
-LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
-LL_RCC_PLL_Enable();
-LL_RCC_PLL_EnableDomain_SYS();
-while(LL_RCC_PLL_IsReady() != 1)
-	{ };
+  /* USER CODE BEGIN RTC_Init 0 */
 
-/* Sysclk activation on the main PLL */
-LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
-LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
-while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
-	{ };
+  /* USER CODE END RTC_Init 0 */
 
-/* Set APB1 & APB2 prescaler*/
-LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
-LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = 127;
+  hrtc.Init.SynchPrediv = 255;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
 
-/* Update the global variable called SystemCoreClock */
-SystemCoreClockUpdate();
 }
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
index a08e99e..fdfb547 100644
--- a/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
+++ b/L476_ats_blink-master/Core/Src/stm32l4xx_it.c
@@ -182,11 +182,11 @@ void PendSV_Handler(void)
 void SysTick_Handler(void)
 {
   /* USER CODE BEGIN SysTick_IRQn 0 */
-//
+
   /* USER CODE END SysTick_IRQn 0 */
   HAL_IncTick();
   /* USER CODE BEGIN SysTick_IRQn 1 */
-//
+
   /* USER CODE END SysTick_IRQn 1 */
 }
 
diff --git a/L476_ats_blink-master/Core/Src/syscalls.c b/L476_ats_blink-master/Core/Src/syscalls.c
deleted file mode 100644
index 4ec9584..0000000
--- a/L476_ats_blink-master/Core/Src/syscalls.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/**
- ******************************************************************************
- * @file      syscalls.c
- * @author    Auto-generated by STM32CubeIDE
- * @brief     STM32CubeIDE Minimal System calls file
- *
- *            For more information about which c-functions
- *            need which of these lowlevel functions
- *            please consult the Newlib libc-manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <sys/stat.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <stdio.h>
-#include <signal.h>
-#include <time.h>
-#include <sys/time.h>
-#include <sys/times.h>
-
-
-/* Variables */
-//#undef errno
-extern int errno;
-extern int __io_putchar(int ch) __attribute__((weak));
-extern int __io_getchar(void) __attribute__((weak));
-
-register char * stack_ptr asm("sp");
-
-char *__env[1] = { 0 };
-char **environ = __env;
-
-
-/* Functions */
-void initialise_monitor_handles()
-{
-}
-
-int _getpid(void)
-{
-	return 1;
-}
-
-int _kill(int pid, int sig)
-{
-	errno = EINVAL;
-	return -1;
-}
-
-void _exit (int status)
-{
-	_kill(status, -1);
-	while (1) {}		/* Make sure we hang here */
-}
-
-__attribute__((weak)) int _read(int file, char *ptr, int len)
-{
-	int DataIdx;
-
-	for (DataIdx = 0; DataIdx < len; DataIdx++)
-	{
-		*ptr++ = __io_getchar();
-	}
-
-return len;
-}
-
-__attribute__((weak)) int _write(int file, char *ptr, int len)
-{
-	int DataIdx;
-
-	for (DataIdx = 0; DataIdx < len; DataIdx++)
-	{
-		__io_putchar(*ptr++);
-	}
-	return len;
-}
-
-int _close(int file)
-{
-	return -1;
-}
-
-
-int _fstat(int file, struct stat *st)
-{
-	st->st_mode = S_IFCHR;
-	return 0;
-}
-
-int _isatty(int file)
-{
-	return 1;
-}
-
-int _lseek(int file, int ptr, int dir)
-{
-	return 0;
-}
-
-int _open(char *path, int flags, ...)
-{
-	/* Pretend like we always fail */
-	return -1;
-}
-
-int _wait(int *status)
-{
-	errno = ECHILD;
-	return -1;
-}
-
-int _unlink(char *name)
-{
-	errno = ENOENT;
-	return -1;
-}
-
-int _times(struct tms *buf)
-{
-	return -1;
-}
-
-int _stat(char *file, struct stat *st)
-{
-	st->st_mode = S_IFCHR;
-	return 0;
-}
-
-int _link(char *old, char *new)
-{
-	errno = EMLINK;
-	return -1;
-}
-
-int _fork(void)
-{
-	errno = EAGAIN;
-	return -1;
-}
-
-int _execve(char *name, char **argv, char **env)
-{
-	errno = ENOMEM;
-	return -1;
-}
diff --git a/L476_ats_blink-master/Core/Src/sysmem.c b/L476_ats_blink-master/Core/Src/sysmem.c
deleted file mode 100644
index 23180b6..0000000
--- a/L476_ats_blink-master/Core/Src/sysmem.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/**
- ******************************************************************************
- * @file      sysmem.c
- * @author    Generated by STM32CubeIDE
- * @brief     STM32CubeIDE System Memory calls file
- *
- *            For more information about which C functions
- *            need which of these lowlevel functions
- *            please consult the newlib libc manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <errno.h>
-#include <stdint.h>
-
-/**
- * Pointer to the current high watermark of the heap usage
- */
-static uint8_t *__sbrk_heap_end = NULL;
-
-/**
- * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
- *        and others from the C library
- *
- * @verbatim
- * ############################################################################
- * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
- * #         #        #                         # Reserved by _Min_Stack_Size #
- * ############################################################################
- * ^-- RAM start      ^-- _end                             _estack, RAM end --^
- * @endverbatim
- *
- * This implementation starts allocating at the '_end' linker symbol
- * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
- * The implementation considers '_estack' linker symbol to be RAM end
- * NOTE: If the MSP stack, at any point during execution, grows larger than the
- * reserved size, please increase the '_Min_Stack_Size'.
- *
- * @param incr Memory size
- * @return Pointer to allocated memory
- */
-void *_sbrk(ptrdiff_t incr)
-{
-  extern uint8_t _end; /* Symbol defined in the linker script */
-  extern uint8_t _estack; /* Symbol defined in the linker script */
-  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
-  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
-  const uint8_t *max_heap = (uint8_t *)stack_limit;
-  uint8_t *prev_heap_end;
-
-  /* Initalize heap end at first call */
-  if (NULL == __sbrk_heap_end)
-  {
-    __sbrk_heap_end = &_end;
-  }
-
-  /* Protect heap from growing into the reserved MSP stack */
-  if (__sbrk_heap_end + incr > max_heap)
-  {
-    errno = ENOMEM;
-    return (void *)-1;
-  }
-
-  prev_heap_end = __sbrk_heap_end;
-  __sbrk_heap_end += incr;
-
-  return (void *)prev_heap_end;
-}
diff --git a/L476_ats_blink-master/Debug/Core/Src/main.d b/L476_ats_blink-master/Debug/Core/Src/main.d
index e18fc88..5c8c109 100644
--- a/L476_ats_blink-master/Debug/Core/Src/main.d
+++ b/L476_ats_blink-master/Debug/Core/Src/main.d
@@ -1,5 +1,8 @@
-Core/Src/main.o: ../Core/Src/main.c \
- ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h \
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h \
  ../Drivers/CMSIS/Include/core_cm4.h \
@@ -8,14 +11,42 @@ Core/Src/main.o: ../Core/Src/main.c \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
  ../Drivers/CMSIS/Include/mpu_armv7.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h \
- ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h \
- ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h \
- ../Core/Src/gpio.h
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h
 
-../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:
+../Core/Inc/main.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+
+../Core/Inc/stm32l4xx_hal_conf.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
 
@@ -33,14 +64,54 @@ Core/Src/main.o: ../Core/Src/main.c \
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
 
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h:
+
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h:
 
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:
+
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h:
 
-../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:
-
-../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:
 
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h:
 
-../Core/Src/gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h:
diff --git a/L476_ats_blink-master/Debug/Core/Src/main.o b/L476_ats_blink-master/Debug/Core/Src/main.o
index f4cc805..8970e7e 100644
Binary files a/L476_ats_blink-master/Debug/Core/Src/main.o and b/L476_ats_blink-master/Debug/Core/Src/main.o differ
diff --git a/L476_ats_blink-master/Debug/Core/Src/main.su b/L476_ats_blink-master/Debug/Core/Src/main.su
index 7678bba..847a122 100644
--- a/L476_ats_blink-master/Debug/Core/Src/main.su
+++ b/L476_ats_blink-master/Debug/Core/Src/main.su
@@ -1,17 +1,31 @@
+stm32l4xx_ll_rcc.h:2270:22:LL_RCC_LSE_Enable	4	static
+stm32l4xx_ll_rcc.h:2316:22:LL_RCC_LSE_SetDriveCapability	16	static
+stm32l4xx_ll_rcc.h:2362:26:LL_RCC_LSE_IsReady	4	static
 stm32l4xx_ll_rcc.h:2489:22:LL_RCC_MSI_Enable	4	static
 stm32l4xx_ll_rcc.h:2509:26:LL_RCC_MSI_IsReady	4	static
+stm32l4xx_ll_rcc.h:2523:22:LL_RCC_MSI_EnablePLLMode	4	static
+stm32l4xx_ll_rcc.h:2548:22:LL_RCC_MSI_EnableRangeSelection	4	static
+stm32l4xx_ll_rcc.h:2581:22:LL_RCC_MSI_SetRange	16	static
+stm32l4xx_ll_rcc.h:2656:22:LL_RCC_MSI_SetCalibTrimming	16	static
 stm32l4xx_ll_rcc.h:2742:22:LL_RCC_SetSysClkSource	16	static
 stm32l4xx_ll_rcc.h:2756:26:LL_RCC_GetSysClkSource	4	static
 stm32l4xx_ll_rcc.h:2776:22:LL_RCC_SetAHBPrescaler	16	static
 stm32l4xx_ll_rcc.h:2792:22:LL_RCC_SetAPB1Prescaler	16	static
 stm32l4xx_ll_rcc.h:2808:22:LL_RCC_SetAPB2Prescaler	16	static
+stm32l4xx_ll_rcc.h:3650:22:LL_RCC_SetRTCClockSource	16	static
+stm32l4xx_ll_rcc.h:3674:22:LL_RCC_EnableRTC	4	static
+stm32l4xx_ll_rcc.h:3704:22:LL_RCC_ForceBackupDomainReset	4	static
+stm32l4xx_ll_rcc.h:3714:22:LL_RCC_ReleaseBackupDomainReset	4	static
 stm32l4xx_ll_rcc.h:3733:22:LL_RCC_PLL_Enable	4	static
 stm32l4xx_ll_rcc.h:3754:26:LL_RCC_PLL_IsReady	4	static
 stm32l4xx_ll_rcc.h:3800:22:LL_RCC_PLL_ConfigDomain_SYS	24	static
 stm32l4xx_ll_rcc.h:4178:22:LL_RCC_PLL_EnableDomain_SYS	4	static
 stm32l4xx_ll_system.h:1400:22:LL_FLASH_SetLatency	16	static
-stm32l4xx_ll_cortex.h:272:22:LL_SYSTICK_EnableIT	4	static
-stm32l4xx_ll_cortex.h:310:22:LL_LPM_EnableSleep	4	static
-main.c:25:6:SysTick_Handler	8	static
-main.c:42:5:main	8	static,ignoring_inline_asm
-main.c:89:6:SystemClock_Config	8	static
+stm32l4xx_ll_system.h:1428:26:LL_FLASH_GetLatency	4	static
+stm32l4xx_ll_pwr.h:344:22:LL_PWR_SetRegulVoltageScaling	16	static
+stm32l4xx_ll_pwr.h:398:22:LL_PWR_EnableBkUpAccess	4	static
+main.c:66:5:main	8	static
+main.c:111:6:SystemClock_Config	8	static
+main.c:175:13:MX_RTC_Init	8	static
+main.c:210:13:MX_GPIO_Init	24	static
+main.c:228:6:Error_Handler	4	static
diff --git a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.d b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.d
index db10d7a..090a483 100644
--- a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.d
+++ b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.d
@@ -1,5 +1,8 @@
 Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \
- ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h \
  ../Drivers/CMSIS/Include/core_cm4.h \
@@ -8,6 +11,23 @@ Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
  ../Drivers/CMSIS/Include/mpu_armv7.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h \
@@ -21,7 +41,13 @@ Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \
 
 ../Core/Inc/main.h:
 
-../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+
+../Core/Inc/stm32l4xx_hal_conf.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
 
@@ -39,6 +65,40 @@ Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
 
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h:
+
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h:
 
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h:
diff --git a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o
index 82aae56..a500408 100644
Binary files a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o and b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.o differ
diff --git a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su
index e1f3ef5..c5d12c5 100644
--- a/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su
+++ b/L476_ats_blink-master/Debug/Core/Src/stm32l4xx_it.su
@@ -6,3 +6,4 @@ stm32l4xx_it.c:128:6:UsageFault_Handler	4	static
 stm32l4xx_it.c:143:6:SVC_Handler	4	static
 stm32l4xx_it.c:156:6:DebugMon_Handler	4	static
 stm32l4xx_it.c:169:6:PendSV_Handler	4	static
+stm32l4xx_it.c:182:6:SysTick_Handler	8	static
diff --git a/L476_ats_blink-master/Debug/Core/Src/subdir.mk b/L476_ats_blink-master/Debug/Core/Src/subdir.mk
index ebc7485..69c761c 100644
--- a/L476_ats_blink-master/Debug/Core/Src/subdir.mk
+++ b/L476_ats_blink-master/Debug/Core/Src/subdir.mk
@@ -4,41 +4,31 @@
 
 # Add inputs and outputs from these tool invocations to the build variables 
 C_SRCS += \
-../Core/Src/gpio.c \
 ../Core/Src/main.c \
+../Core/Src/stm32l4xx_hal_msp.c \
 ../Core/Src/stm32l4xx_it.c \
-../Core/Src/syscalls.c \
-../Core/Src/sysmem.c \
 ../Core/Src/system_stm32l4xx.c 
 
 OBJS += \
-./Core/Src/gpio.o \
 ./Core/Src/main.o \
+./Core/Src/stm32l4xx_hal_msp.o \
 ./Core/Src/stm32l4xx_it.o \
-./Core/Src/syscalls.o \
-./Core/Src/sysmem.o \
 ./Core/Src/system_stm32l4xx.o 
 
 C_DEPS += \
-./Core/Src/gpio.d \
 ./Core/Src/main.d \
+./Core/Src/stm32l4xx_hal_msp.d \
 ./Core/Src/stm32l4xx_it.d \
-./Core/Src/syscalls.d \
-./Core/Src/sysmem.d \
 ./Core/Src/system_stm32l4xx.d 
 
 
 # Each subdirectory must supply rules for building sources it contributes
-Core/Src/gpio.o: ../Core/Src/gpio.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/main.o: ../Core/Src/main.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Core/Src/stm32l4xx_hal_msp.o: ../Core/Src/stm32l4xx_hal_msp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
-Core/Src/syscalls.o: ../Core/Src/syscalls.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
-Core/Src/sysmem.o: ../Core/Src/sysmem.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l4xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/system_stm32l4xx.o: ../Core/Src/system_stm32l4xx.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l4xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l4xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.d b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.d
index 0ae4bf9..604ad07 100644
--- a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.d
+++ b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.d
@@ -6,7 +6,27 @@ Core/Src/system_stm32l4xx.o: ../Core/Src/system_stm32l4xx.c \
  ../Drivers/CMSIS/Include/cmsis_compiler.h \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
  ../Drivers/CMSIS/Include/mpu_armv7.h \
- ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
 
@@ -23,3 +43,43 @@ Core/Src/system_stm32l4xx.o: ../Core/Src/system_stm32l4xx.c \
 ../Drivers/CMSIS/Include/mpu_armv7.h:
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+
+../Core/Inc/stm32l4xx_hal_conf.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h:
diff --git a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o
index ef552d7..25ba143 100644
Binary files a/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o and b/L476_ats_blink-master/Debug/Core/Src/system_stm32l4xx.o differ
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d
index b18e60d..de37bfa 100644
--- a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d
+++ b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d
@@ -8,7 +8,27 @@ Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o: \
  ../Drivers/CMSIS/Include/cmsis_compiler.h \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
  ../Drivers/CMSIS/Include/mpu_armv7.h \
- ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h
 
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h:
 
@@ -27,3 +47,43 @@ Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o: \
 ../Drivers/CMSIS/Include/mpu_armv7.h:
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+
+../Core/Inc/stm32l4xx_hal_conf.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h:
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o
index df5e452..b183776 100644
Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o differ
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d
index 3e2f730..23e3a35 100644
--- a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d
+++ b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d
@@ -9,6 +9,26 @@ Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o: \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
  ../Drivers/CMSIS/Include/mpu_armv7.h \
  ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h \
  ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h
@@ -31,6 +51,46 @@ Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o: \
 
 ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
 
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+
+../Core/Inc/stm32l4xx_hal_conf.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h:
+
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h:
+
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h:
 
 ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h:
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
index 53b9d64..3a44044 100644
Binary files a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o and b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o differ
diff --git a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
index 5b7bcaa..0329ee3 100644
--- a/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
+++ b/L476_ats_blink-master/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
@@ -4,31 +4,116 @@
 
 # Add inputs and outputs from these tool invocations to the build variables 
 C_SRCS += \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c \
 ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c \
-../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c \
-../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c \
 ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c 
 
 OBJS += \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o \
 ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o \
-./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o \
-./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o \
 ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o 
 
 C_DEPS += \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.d \
 ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d \
-./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.d \
-./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.d \
 ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d 
 
 
 # Each subdirectory must supply rules for building sources it contributes
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
-Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
-Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o: ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 '-DHSE_VALUE=8000000' '-DMSI_VALUE=4000000' '-DLSI_VALUE=32000' '-DHSE_STARTUP_TIMEOUT=100' '-DHSI_VALUE=16000000' -DDEBUG '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DDATA_CACHE_ENABLE=1' -DUSE_HAL_DRIVER '-DVDD_VALUE=3300' '-DINSTRUCTION_CACHE_ENABLE=1' '-DEXTERNALSAI2_CLOCK_VALUE=2097000' -DSTM32L476xx -DUSE_FULL_LL_DRIVER '-DEXTERNALSAI1_CLOCK_VALUE=2097000' '-DPREFETCH_ENABLE=0' -c -I../Core/Inc -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.bin b/L476_ats_blink-master/Debug/L476_ats_blink-master.bin
index 6a1428c..2e15f13 100644
Binary files a/L476_ats_blink-master/Debug/L476_ats_blink-master.bin and b/L476_ats_blink-master/Debug/L476_ats_blink-master.bin differ
diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.elf b/L476_ats_blink-master/Debug/L476_ats_blink-master.elf
index 7a3bbf5..526e58d 100644
Binary files a/L476_ats_blink-master/Debug/L476_ats_blink-master.elf and b/L476_ats_blink-master/Debug/L476_ats_blink-master.elf differ
diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.list b/L476_ats_blink-master/Debug/L476_ats_blink-master.list
index 7173645..b983d16 100644
--- a/L476_ats_blink-master/Debug/L476_ats_blink-master.list
+++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.list
@@ -5,45 +5,45 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   00000188  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         00000834  08000188  08000188  00010188  2**2
+  1 .text         00000cb8  08000188  08000188  00010188  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000040  080009bc  080009bc  000109bc  2**2
-                  CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  080009fc  080009fc  00020004  2**0
+  2 .rodata       00000000  08000e40  08000e40  0002000c  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  3 .ARM.extab    00000000  08000e40  08000e40  0002000c  2**0
                   CONTENTS
-  4 .ARM          00000000  080009fc  080009fc  00020004  2**0
+  4 .ARM          00000000  08000e40  08000e40  0002000c  2**0
                   CONTENTS
-  5 .preinit_array 00000000  080009fc  080009fc  00020004  2**0
+  5 .preinit_array 00000000  08000e40  08000e40  0002000c  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  080009fc  080009fc  000109fc  2**2
+  6 .init_array   00000004  08000e40  08000e40  00010e40  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  08000a00  08000a00  00010a00  2**2
+  7 .fini_array   00000004  08000e44  08000e44  00010e44  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         00000004  20000000  08000a04  00020000  2**2
+  8 .data         0000000c  20000000  08000e48  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00000024  20000004  08000a08  00020004  2**2
+  9 .bss          00000044  2000000c  08000e54  0002000c  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  20000028  08000a08  00020028  2**0
+ 10 ._user_heap_stack 00000600  20000050  08000e54  00020050  2**0
                   ALLOC
- 11 .ARM.attributes 00000030  00000000  00000000  00020004  2**0
+ 11 .ARM.attributes 00000030  00000000  00000000  0002000c  2**0
                   CONTENTS, READONLY
- 12 .debug_info   000022b2  00000000  00000000  00020034  2**0
+ 12 .debug_info   00005a68  00000000  00000000  0002003c  2**0
                   CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 00000771  00000000  00000000  000222e6  2**0
+ 13 .debug_abbrev 00000ea3  00000000  00000000  00025aa4  2**0
                   CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 000002e0  00000000  00000000  00022a58  2**3
+ 14 .debug_aranges 00000630  00000000  00000000  00026948  2**3
                   CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 00000288  00000000  00000000  00022d38  2**3
+ 15 .debug_ranges 000005a8  00000000  00000000  00026f78  2**3
                   CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro  0001e120  00000000  00000000  00022fc0  2**0
+ 16 .debug_macro  00026368  00000000  00000000  00027520  2**0
                   CONTENTS, READONLY, DEBUGGING
- 17 .debug_line   00002035  00000000  00000000  000410e0  2**0
+ 17 .debug_line   00004aac  00000000  00000000  0004d888  2**0
                   CONTENTS, READONLY, DEBUGGING
- 18 .debug_str    000a94c1  00000000  00000000  00043115  2**0
+ 18 .debug_str    000eeb27  00000000  00000000  00052334  2**0
                   CONTENTS, READONLY, DEBUGGING
- 19 .comment      0000007b  00000000  00000000  000ec5d6  2**0
+ 19 .comment      0000007b  00000000  00000000  00140e5b  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  00000a20  00000000  00000000  000ec654  2**2
+ 20 .debug_frame  000017b4  00000000  00000000  00140ed8  2**2
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -60,9 +60,9 @@ Disassembly of section .text:
  800019a:	2301      	movs	r3, #1
  800019c:	7023      	strb	r3, [r4, #0]
  800019e:	bd10      	pop	{r4, pc}
- 80001a0:	20000004 	.word	0x20000004
+ 80001a0:	2000000c 	.word	0x2000000c
  80001a4:	00000000 	.word	0x00000000
- 80001a8:	080009a4 	.word	0x080009a4
+ 80001a8:	08000e28 	.word	0x08000e28
 
 080001ac <frame_dummy>:
  80001ac:	b508      	push	{r3, lr}
@@ -73,1521 +73,2445 @@ Disassembly of section .text:
  80001b6:	f3af 8000 	nop.w
  80001ba:	bd08      	pop	{r3, pc}
  80001bc:	00000000 	.word	0x00000000
- 80001c0:	20000008 	.word	0x20000008
- 80001c4:	080009a4 	.word	0x080009a4
+ 80001c0:	20000010 	.word	0x20000010
+ 80001c4:	08000e28 	.word	0x08000e28
 
-080001c8 <LL_AHB2_GRP1_EnableClock>:
-  *
-  *         (*) value not defined in all devices.
+080001c8 <LL_RCC_LSE_Enable>:
+  * @brief  Enable  Low Speed External (LSE) crystal.
+  * @rmtoll BDCR         LSEON         LL_RCC_LSE_Enable
   * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
+  */
+__STATIC_INLINE void LL_RCC_LSE_Enable(void)
 {
  80001c8:	b480      	push	{r7}
- 80001ca:	b085      	sub	sp, #20
- 80001cc:	af00      	add	r7, sp, #0
- 80001ce:	6078      	str	r0, [r7, #4]
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->AHB2ENR, Periphs);
- 80001d0:	4b08      	ldr	r3, [pc, #32]	; (80001f4 <LL_AHB2_GRP1_EnableClock+0x2c>)
- 80001d2:	6cda      	ldr	r2, [r3, #76]	; 0x4c
- 80001d4:	4907      	ldr	r1, [pc, #28]	; (80001f4 <LL_AHB2_GRP1_EnableClock+0x2c>)
- 80001d6:	687b      	ldr	r3, [r7, #4]
- 80001d8:	4313      	orrs	r3, r2
- 80001da:	64cb      	str	r3, [r1, #76]	; 0x4c
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
- 80001dc:	4b05      	ldr	r3, [pc, #20]	; (80001f4 <LL_AHB2_GRP1_EnableClock+0x2c>)
- 80001de:	6cda      	ldr	r2, [r3, #76]	; 0x4c
- 80001e0:	687b      	ldr	r3, [r7, #4]
- 80001e2:	4013      	ands	r3, r2
- 80001e4:	60fb      	str	r3, [r7, #12]
-  (void)tmpreg;
- 80001e6:	68fb      	ldr	r3, [r7, #12]
+ 80001ca:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
+ 80001cc:	4b06      	ldr	r3, [pc, #24]	; (80001e8 <LL_RCC_LSE_Enable+0x20>)
+ 80001ce:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80001d2:	4a05      	ldr	r2, [pc, #20]	; (80001e8 <LL_RCC_LSE_Enable+0x20>)
+ 80001d4:	f043 0301 	orr.w	r3, r3, #1
+ 80001d8:	f8c2 3090 	str.w	r3, [r2, #144]	; 0x90
 }
- 80001e8:	bf00      	nop
- 80001ea:	3714      	adds	r7, #20
- 80001ec:	46bd      	mov	sp, r7
- 80001ee:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80001f2:	4770      	bx	lr
- 80001f4:	40021000 	.word	0x40021000
+ 80001dc:	bf00      	nop
+ 80001de:	46bd      	mov	sp, r7
+ 80001e0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80001e4:	4770      	bx	lr
+ 80001e6:	bf00      	nop
+ 80001e8:	40021000 	.word	0x40021000
 
-080001f8 <LL_GPIO_SetPinMode>:
-  *         @arg @ref LL_GPIO_MODE_ALTERNATE
-  *         @arg @ref LL_GPIO_MODE_ANALOG
+080001ec <LL_RCC_LSE_SetDriveCapability>:
+  *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
+  *         @arg @ref LL_RCC_LSEDRIVE_HIGH
   * @retval None
   */
-__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
+__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
 {
- 80001f8:	b480      	push	{r7}
- 80001fa:	b08b      	sub	sp, #44	; 0x2c
- 80001fc:	af00      	add	r7, sp, #0
- 80001fe:	60f8      	str	r0, [r7, #12]
- 8000200:	60b9      	str	r1, [r7, #8]
- 8000202:	607a      	str	r2, [r7, #4]
-  MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
- 8000204:	68fb      	ldr	r3, [r7, #12]
- 8000206:	681a      	ldr	r2, [r3, #0]
- 8000208:	68bb      	ldr	r3, [r7, #8]
- 800020a:	617b      	str	r3, [r7, #20]
-  uint32_t result;
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800020c:	697b      	ldr	r3, [r7, #20]
- 800020e:	fa93 f3a3 	rbit	r3, r3
- 8000212:	613b      	str	r3, [r7, #16]
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-#endif
-  return result;
- 8000214:	693b      	ldr	r3, [r7, #16]
- 8000216:	61bb      	str	r3, [r7, #24]
-     optimisations using the logic "value was passed to __builtin_clz, so it
-     is non-zero".
-     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
-     single CLZ instruction.
-   */
-  if (value == 0U)
- 8000218:	69bb      	ldr	r3, [r7, #24]
- 800021a:	2b00      	cmp	r3, #0
- 800021c:	d101      	bne.n	8000222 <LL_GPIO_SetPinMode+0x2a>
-  {
-    return 32U;
- 800021e:	2320      	movs	r3, #32
- 8000220:	e003      	b.n	800022a <LL_GPIO_SetPinMode+0x32>
-  }
-  return __builtin_clz(value);
- 8000222:	69bb      	ldr	r3, [r7, #24]
- 8000224:	fab3 f383 	clz	r3, r3
- 8000228:	b2db      	uxtb	r3, r3
- 800022a:	005b      	lsls	r3, r3, #1
- 800022c:	2103      	movs	r1, #3
- 800022e:	fa01 f303 	lsl.w	r3, r1, r3
- 8000232:	43db      	mvns	r3, r3
- 8000234:	401a      	ands	r2, r3
- 8000236:	68bb      	ldr	r3, [r7, #8]
- 8000238:	623b      	str	r3, [r7, #32]
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800023a:	6a3b      	ldr	r3, [r7, #32]
- 800023c:	fa93 f3a3 	rbit	r3, r3
- 8000240:	61fb      	str	r3, [r7, #28]
-  return result;
- 8000242:	69fb      	ldr	r3, [r7, #28]
- 8000244:	627b      	str	r3, [r7, #36]	; 0x24
-  if (value == 0U)
- 8000246:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8000248:	2b00      	cmp	r3, #0
- 800024a:	d101      	bne.n	8000250 <LL_GPIO_SetPinMode+0x58>
-    return 32U;
- 800024c:	2320      	movs	r3, #32
- 800024e:	e003      	b.n	8000258 <LL_GPIO_SetPinMode+0x60>
-  return __builtin_clz(value);
- 8000250:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8000252:	fab3 f383 	clz	r3, r3
- 8000256:	b2db      	uxtb	r3, r3
- 8000258:	005b      	lsls	r3, r3, #1
- 800025a:	6879      	ldr	r1, [r7, #4]
- 800025c:	fa01 f303 	lsl.w	r3, r1, r3
- 8000260:	431a      	orrs	r2, r3
- 8000262:	68fb      	ldr	r3, [r7, #12]
- 8000264:	601a      	str	r2, [r3, #0]
+ 80001ec:	b480      	push	{r7}
+ 80001ee:	b083      	sub	sp, #12
+ 80001f0:	af00      	add	r7, sp, #0
+ 80001f2:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive);
+ 80001f4:	4b07      	ldr	r3, [pc, #28]	; (8000214 <LL_RCC_LSE_SetDriveCapability+0x28>)
+ 80001f6:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80001fa:	f023 0218 	bic.w	r2, r3, #24
+ 80001fe:	4905      	ldr	r1, [pc, #20]	; (8000214 <LL_RCC_LSE_SetDriveCapability+0x28>)
+ 8000200:	687b      	ldr	r3, [r7, #4]
+ 8000202:	4313      	orrs	r3, r2
+ 8000204:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
 }
- 8000266:	bf00      	nop
- 8000268:	372c      	adds	r7, #44	; 0x2c
- 800026a:	46bd      	mov	sp, r7
- 800026c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000270:	4770      	bx	lr
+ 8000208:	bf00      	nop
+ 800020a:	370c      	adds	r7, #12
+ 800020c:	46bd      	mov	sp, r7
+ 800020e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000212:	4770      	bx	lr
+ 8000214:	40021000 	.word	0x40021000
 
-08000272 <LL_GPIO_SetPinOutputType>:
-  *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
-  *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
-{
- 8000272:	b480      	push	{r7}
- 8000274:	b085      	sub	sp, #20
- 8000276:	af00      	add	r7, sp, #0
- 8000278:	60f8      	str	r0, [r7, #12]
- 800027a:	60b9      	str	r1, [r7, #8]
- 800027c:	607a      	str	r2, [r7, #4]
-  MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
- 800027e:	68fb      	ldr	r3, [r7, #12]
- 8000280:	685a      	ldr	r2, [r3, #4]
- 8000282:	68bb      	ldr	r3, [r7, #8]
- 8000284:	43db      	mvns	r3, r3
- 8000286:	401a      	ands	r2, r3
- 8000288:	68bb      	ldr	r3, [r7, #8]
- 800028a:	6879      	ldr	r1, [r7, #4]
- 800028c:	fb01 f303 	mul.w	r3, r1, r3
- 8000290:	431a      	orrs	r2, r3
- 8000292:	68fb      	ldr	r3, [r7, #12]
- 8000294:	605a      	str	r2, [r3, #4]
-}
- 8000296:	bf00      	nop
- 8000298:	3714      	adds	r7, #20
- 800029a:	46bd      	mov	sp, r7
- 800029c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80002a0:	4770      	bx	lr
-
-080002a2 <LL_GPIO_IsInputPinSet>:
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
+08000218 <LL_RCC_LSE_IsReady>:
+  * @brief  Check if LSE oscillator Ready
+  * @rmtoll BDCR         LSERDY        LL_RCC_LSE_IsReady
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
 {
- 80002a2:	b480      	push	{r7}
- 80002a4:	b083      	sub	sp, #12
- 80002a6:	af00      	add	r7, sp, #0
- 80002a8:	6078      	str	r0, [r7, #4]
- 80002aa:	6039      	str	r1, [r7, #0]
-  return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL);
- 80002ac:	687b      	ldr	r3, [r7, #4]
- 80002ae:	691a      	ldr	r2, [r3, #16]
- 80002b0:	683b      	ldr	r3, [r7, #0]
- 80002b2:	4013      	ands	r3, r2
- 80002b4:	683a      	ldr	r2, [r7, #0]
- 80002b6:	429a      	cmp	r2, r3
- 80002b8:	d101      	bne.n	80002be <LL_GPIO_IsInputPinSet+0x1c>
- 80002ba:	2301      	movs	r3, #1
- 80002bc:	e000      	b.n	80002c0 <LL_GPIO_IsInputPinSet+0x1e>
- 80002be:	2300      	movs	r3, #0
+ 8000218:	b480      	push	{r7}
+ 800021a:	af00      	add	r7, sp, #0
+  return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RCC_BDCR_LSERDY) ? 1UL : 0UL);
+ 800021c:	4b07      	ldr	r3, [pc, #28]	; (800023c <LL_RCC_LSE_IsReady+0x24>)
+ 800021e:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8000222:	f003 0302 	and.w	r3, r3, #2
+ 8000226:	2b02      	cmp	r3, #2
+ 8000228:	d101      	bne.n	800022e <LL_RCC_LSE_IsReady+0x16>
+ 800022a:	2301      	movs	r3, #1
+ 800022c:	e000      	b.n	8000230 <LL_RCC_LSE_IsReady+0x18>
+ 800022e:	2300      	movs	r3, #0
 }
- 80002c0:	4618      	mov	r0, r3
- 80002c2:	370c      	adds	r7, #12
- 80002c4:	46bd      	mov	sp, r7
- 80002c6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80002ca:	4770      	bx	lr
+ 8000230:	4618      	mov	r0, r3
+ 8000232:	46bd      	mov	sp, r7
+ 8000234:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000238:	4770      	bx	lr
+ 800023a:	bf00      	nop
+ 800023c:	40021000 	.word	0x40021000
 
-080002cc <LL_GPIO_SetOutputPin>:
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- 80002cc:	b480      	push	{r7}
- 80002ce:	b083      	sub	sp, #12
- 80002d0:	af00      	add	r7, sp, #0
- 80002d2:	6078      	str	r0, [r7, #4]
- 80002d4:	6039      	str	r1, [r7, #0]
-  WRITE_REG(GPIOx->BSRR, PinMask);
- 80002d6:	687b      	ldr	r3, [r7, #4]
- 80002d8:	683a      	ldr	r2, [r7, #0]
- 80002da:	619a      	str	r2, [r3, #24]
-}
- 80002dc:	bf00      	nop
- 80002de:	370c      	adds	r7, #12
- 80002e0:	46bd      	mov	sp, r7
- 80002e2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80002e6:	4770      	bx	lr
-
-080002e8 <LL_GPIO_ResetOutputPin>:
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- 80002e8:	b480      	push	{r7}
- 80002ea:	b083      	sub	sp, #12
- 80002ec:	af00      	add	r7, sp, #0
- 80002ee:	6078      	str	r0, [r7, #4]
- 80002f0:	6039      	str	r1, [r7, #0]
-  WRITE_REG(GPIOx->BRR, PinMask);
- 80002f2:	687b      	ldr	r3, [r7, #4]
- 80002f4:	683a      	ldr	r2, [r7, #0]
- 80002f6:	629a      	str	r2, [r3, #40]	; 0x28
-}
- 80002f8:	bf00      	nop
- 80002fa:	370c      	adds	r7, #12
- 80002fc:	46bd      	mov	sp, r7
- 80002fe:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000302:	4770      	bx	lr
-
-08000304 <GPIO_init>:
-#define LED_PIN LL_GPIO_PIN_5
-#define BUT_PORT GPIOC
-#define BUT_PIN LL_GPIO_PIN_13
-
-void GPIO_init(void)
-{
- 8000304:	b580      	push	{r7, lr}
- 8000306:	af00      	add	r7, sp, #0
-// PORT A
-LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOA );
- 8000308:	2001      	movs	r0, #1
- 800030a:	f7ff ff5d 	bl	80001c8 <LL_AHB2_GRP1_EnableClock>
-// Green LED (user LED) - PA5
-LL_GPIO_SetPinMode(       LED_PORT, LED_PIN, LL_GPIO_MODE_OUTPUT );
- 800030e:	2201      	movs	r2, #1
- 8000310:	2120      	movs	r1, #32
- 8000312:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
- 8000316:	f7ff ff6f 	bl	80001f8 <LL_GPIO_SetPinMode>
-LL_GPIO_SetPinOutputType( LED_PORT, LED_PIN, LL_GPIO_OUTPUT_PUSHPULL );
- 800031a:	2200      	movs	r2, #0
- 800031c:	2120      	movs	r1, #32
- 800031e:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
- 8000322:	f7ff ffa6 	bl	8000272 <LL_GPIO_SetPinOutputType>
-
-// PORT C
-LL_AHB2_GRP1_EnableClock( LL_AHB2_GRP1_PERIPH_GPIOC );
- 8000326:	2004      	movs	r0, #4
- 8000328:	f7ff ff4e 	bl	80001c8 <LL_AHB2_GRP1_EnableClock>
-// Blue button - PC13
-LL_GPIO_SetPinMode( BUT_PORT, BUT_PIN, LL_GPIO_MODE_INPUT );
- 800032c:	2200      	movs	r2, #0
- 800032e:	f44f 5100 	mov.w	r1, #8192	; 0x2000
- 8000332:	4802      	ldr	r0, [pc, #8]	; (800033c <GPIO_init+0x38>)
- 8000334:	f7ff ff60 	bl	80001f8 <LL_GPIO_SetPinMode>
-}
- 8000338:	bf00      	nop
- 800033a:	bd80      	pop	{r7, pc}
- 800033c:	48000800 	.word	0x48000800
-
-08000340 <LED_GREEN>:
-
-
-void LED_GREEN( int val )
-{
- 8000340:	b580      	push	{r7, lr}
- 8000342:	b082      	sub	sp, #8
- 8000344:	af00      	add	r7, sp, #0
- 8000346:	6078      	str	r0, [r7, #4]
-if	( val )
- 8000348:	687b      	ldr	r3, [r7, #4]
- 800034a:	2b00      	cmp	r3, #0
- 800034c:	d005      	beq.n	800035a <LED_GREEN+0x1a>
-	LL_GPIO_SetOutputPin(   LED_PORT, LED_PIN );
- 800034e:	2120      	movs	r1, #32
- 8000350:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
- 8000354:	f7ff ffba 	bl	80002cc <LL_GPIO_SetOutputPin>
-else	LL_GPIO_ResetOutputPin( LED_PORT, LED_PIN );
-}
- 8000358:	e004      	b.n	8000364 <LED_GREEN+0x24>
-else	LL_GPIO_ResetOutputPin( LED_PORT, LED_PIN );
- 800035a:	2120      	movs	r1, #32
- 800035c:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
- 8000360:	f7ff ffc2 	bl	80002e8 <LL_GPIO_ResetOutputPin>
-}
- 8000364:	bf00      	nop
- 8000366:	3708      	adds	r7, #8
- 8000368:	46bd      	mov	sp, r7
- 800036a:	bd80      	pop	{r7, pc}
-
-0800036c <BLUE_BUTTON>:
-
-int BLUE_BUTTON()
-{
- 800036c:	b580      	push	{r7, lr}
- 800036e:	af00      	add	r7, sp, #0
-return ( !LL_GPIO_IsInputPinSet( BUT_PORT, BUT_PIN ) );
- 8000370:	f44f 5100 	mov.w	r1, #8192	; 0x2000
- 8000374:	4805      	ldr	r0, [pc, #20]	; (800038c <BLUE_BUTTON+0x20>)
- 8000376:	f7ff ff94 	bl	80002a2 <LL_GPIO_IsInputPinSet>
- 800037a:	4603      	mov	r3, r0
- 800037c:	2b00      	cmp	r3, #0
- 800037e:	bf0c      	ite	eq
- 8000380:	2301      	moveq	r3, #1
- 8000382:	2300      	movne	r3, #0
- 8000384:	b2db      	uxtb	r3, r3
-}
- 8000386:	4618      	mov	r0, r3
- 8000388:	bd80      	pop	{r7, pc}
- 800038a:	bf00      	nop
- 800038c:	48000800 	.word	0x48000800
-
-08000390 <LL_RCC_MSI_Enable>:
+08000240 <LL_RCC_MSI_Enable>:
   * @brief  Enable MSI oscillator
   * @rmtoll CR           MSION         LL_RCC_MSI_Enable
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_MSI_Enable(void)
 {
- 8000390:	b480      	push	{r7}
- 8000392:	af00      	add	r7, sp, #0
+ 8000240:	b480      	push	{r7}
+ 8000242:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CR, RCC_CR_MSION);
- 8000394:	4b05      	ldr	r3, [pc, #20]	; (80003ac <LL_RCC_MSI_Enable+0x1c>)
- 8000396:	681b      	ldr	r3, [r3, #0]
- 8000398:	4a04      	ldr	r2, [pc, #16]	; (80003ac <LL_RCC_MSI_Enable+0x1c>)
- 800039a:	f043 0301 	orr.w	r3, r3, #1
- 800039e:	6013      	str	r3, [r2, #0]
+ 8000244:	4b05      	ldr	r3, [pc, #20]	; (800025c <LL_RCC_MSI_Enable+0x1c>)
+ 8000246:	681b      	ldr	r3, [r3, #0]
+ 8000248:	4a04      	ldr	r2, [pc, #16]	; (800025c <LL_RCC_MSI_Enable+0x1c>)
+ 800024a:	f043 0301 	orr.w	r3, r3, #1
+ 800024e:	6013      	str	r3, [r2, #0]
 }
- 80003a0:	bf00      	nop
- 80003a2:	46bd      	mov	sp, r7
- 80003a4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80003a8:	4770      	bx	lr
- 80003aa:	bf00      	nop
- 80003ac:	40021000 	.word	0x40021000
+ 8000250:	bf00      	nop
+ 8000252:	46bd      	mov	sp, r7
+ 8000254:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000258:	4770      	bx	lr
+ 800025a:	bf00      	nop
+ 800025c:	40021000 	.word	0x40021000
 
-080003b0 <LL_RCC_MSI_IsReady>:
+08000260 <LL_RCC_MSI_IsReady>:
   * @brief  Check if MSI oscillator Ready
   * @rmtoll CR           MSIRDY        LL_RCC_MSI_IsReady
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
 {
- 80003b0:	b480      	push	{r7}
- 80003b2:	af00      	add	r7, sp, #0
+ 8000260:	b480      	push	{r7}
+ 8000262:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL);
- 80003b4:	4b06      	ldr	r3, [pc, #24]	; (80003d0 <LL_RCC_MSI_IsReady+0x20>)
- 80003b6:	681b      	ldr	r3, [r3, #0]
- 80003b8:	f003 0302 	and.w	r3, r3, #2
- 80003bc:	2b02      	cmp	r3, #2
- 80003be:	d101      	bne.n	80003c4 <LL_RCC_MSI_IsReady+0x14>
- 80003c0:	2301      	movs	r3, #1
- 80003c2:	e000      	b.n	80003c6 <LL_RCC_MSI_IsReady+0x16>
- 80003c4:	2300      	movs	r3, #0
+ 8000264:	4b06      	ldr	r3, [pc, #24]	; (8000280 <LL_RCC_MSI_IsReady+0x20>)
+ 8000266:	681b      	ldr	r3, [r3, #0]
+ 8000268:	f003 0302 	and.w	r3, r3, #2
+ 800026c:	2b02      	cmp	r3, #2
+ 800026e:	d101      	bne.n	8000274 <LL_RCC_MSI_IsReady+0x14>
+ 8000270:	2301      	movs	r3, #1
+ 8000272:	e000      	b.n	8000276 <LL_RCC_MSI_IsReady+0x16>
+ 8000274:	2300      	movs	r3, #0
 }
- 80003c6:	4618      	mov	r0, r3
- 80003c8:	46bd      	mov	sp, r7
- 80003ca:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80003ce:	4770      	bx	lr
- 80003d0:	40021000 	.word	0x40021000
+ 8000276:	4618      	mov	r0, r3
+ 8000278:	46bd      	mov	sp, r7
+ 800027a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800027e:	4770      	bx	lr
+ 8000280:	40021000 	.word	0x40021000
 
-080003d4 <LL_RCC_SetSysClkSource>:
+08000284 <LL_RCC_MSI_EnablePLLMode>:
+  *       ready
+  * @rmtoll CR           MSIPLLEN      LL_RCC_MSI_EnablePLLMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_EnablePLLMode(void)
+{
+ 8000284:	b480      	push	{r7}
+ 8000286:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->CR, RCC_CR_MSIPLLEN);
+ 8000288:	4b05      	ldr	r3, [pc, #20]	; (80002a0 <LL_RCC_MSI_EnablePLLMode+0x1c>)
+ 800028a:	681b      	ldr	r3, [r3, #0]
+ 800028c:	4a04      	ldr	r2, [pc, #16]	; (80002a0 <LL_RCC_MSI_EnablePLLMode+0x1c>)
+ 800028e:	f043 0304 	orr.w	r3, r3, #4
+ 8000292:	6013      	str	r3, [r2, #0]
+}
+ 8000294:	bf00      	nop
+ 8000296:	46bd      	mov	sp, r7
+ 8000298:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800029c:	4770      	bx	lr
+ 800029e:	bf00      	nop
+ 80002a0:	40021000 	.word	0x40021000
+
+080002a4 <LL_RCC_MSI_EnableRangeSelection>:
+  *       MSISRANGE
+  * @rmtoll CR           MSIRGSEL      LL_RCC_MSI_EnableRangeSelection
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_EnableRangeSelection(void)
+{
+ 80002a4:	b480      	push	{r7}
+ 80002a6:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->CR, RCC_CR_MSIRGSEL);
+ 80002a8:	4b05      	ldr	r3, [pc, #20]	; (80002c0 <LL_RCC_MSI_EnableRangeSelection+0x1c>)
+ 80002aa:	681b      	ldr	r3, [r3, #0]
+ 80002ac:	4a04      	ldr	r2, [pc, #16]	; (80002c0 <LL_RCC_MSI_EnableRangeSelection+0x1c>)
+ 80002ae:	f043 0308 	orr.w	r3, r3, #8
+ 80002b2:	6013      	str	r3, [r2, #0]
+}
+ 80002b4:	bf00      	nop
+ 80002b6:	46bd      	mov	sp, r7
+ 80002b8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80002bc:	4770      	bx	lr
+ 80002be:	bf00      	nop
+ 80002c0:	40021000 	.word	0x40021000
+
+080002c4 <LL_RCC_MSI_SetRange>:
+  *         @arg @ref LL_RCC_MSIRANGE_10
+  *         @arg @ref LL_RCC_MSIRANGE_11
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
+{
+ 80002c4:	b480      	push	{r7}
+ 80002c6:	b083      	sub	sp, #12
+ 80002c8:	af00      	add	r7, sp, #0
+ 80002ca:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, Range);
+ 80002cc:	4b06      	ldr	r3, [pc, #24]	; (80002e8 <LL_RCC_MSI_SetRange+0x24>)
+ 80002ce:	681b      	ldr	r3, [r3, #0]
+ 80002d0:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
+ 80002d4:	4904      	ldr	r1, [pc, #16]	; (80002e8 <LL_RCC_MSI_SetRange+0x24>)
+ 80002d6:	687b      	ldr	r3, [r7, #4]
+ 80002d8:	4313      	orrs	r3, r2
+ 80002da:	600b      	str	r3, [r1, #0]
+}
+ 80002dc:	bf00      	nop
+ 80002de:	370c      	adds	r7, #12
+ 80002e0:	46bd      	mov	sp, r7
+ 80002e2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80002e6:	4770      	bx	lr
+ 80002e8:	40021000 	.word	0x40021000
+
+080002ec <LL_RCC_MSI_SetCalibTrimming>:
+  * @rmtoll ICSCR        MSITRIM       LL_RCC_MSI_SetCalibTrimming
+  * @param  Value Between Min_Data = 0 and Max_Data = 255
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value)
+{
+ 80002ec:	b480      	push	{r7}
+ 80002ee:	b083      	sub	sp, #12
+ 80002f0:	af00      	add	r7, sp, #0
+ 80002f2:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_ICSCR_MSITRIM_Pos);
+ 80002f4:	4b07      	ldr	r3, [pc, #28]	; (8000314 <LL_RCC_MSI_SetCalibTrimming+0x28>)
+ 80002f6:	685b      	ldr	r3, [r3, #4]
+ 80002f8:	f423 427f 	bic.w	r2, r3, #65280	; 0xff00
+ 80002fc:	687b      	ldr	r3, [r7, #4]
+ 80002fe:	021b      	lsls	r3, r3, #8
+ 8000300:	4904      	ldr	r1, [pc, #16]	; (8000314 <LL_RCC_MSI_SetCalibTrimming+0x28>)
+ 8000302:	4313      	orrs	r3, r2
+ 8000304:	604b      	str	r3, [r1, #4]
+}
+ 8000306:	bf00      	nop
+ 8000308:	370c      	adds	r7, #12
+ 800030a:	46bd      	mov	sp, r7
+ 800030c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000310:	4770      	bx	lr
+ 8000312:	bf00      	nop
+ 8000314:	40021000 	.word	0x40021000
+
+08000318 <LL_RCC_SetSysClkSource>:
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
 {
- 80003d4:	b480      	push	{r7}
- 80003d6:	b083      	sub	sp, #12
- 80003d8:	af00      	add	r7, sp, #0
- 80003da:	6078      	str	r0, [r7, #4]
+ 8000318:	b480      	push	{r7}
+ 800031a:	b083      	sub	sp, #12
+ 800031c:	af00      	add	r7, sp, #0
+ 800031e:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
- 80003dc:	4b06      	ldr	r3, [pc, #24]	; (80003f8 <LL_RCC_SetSysClkSource+0x24>)
- 80003de:	689b      	ldr	r3, [r3, #8]
- 80003e0:	f023 0203 	bic.w	r2, r3, #3
- 80003e4:	4904      	ldr	r1, [pc, #16]	; (80003f8 <LL_RCC_SetSysClkSource+0x24>)
- 80003e6:	687b      	ldr	r3, [r7, #4]
- 80003e8:	4313      	orrs	r3, r2
- 80003ea:	608b      	str	r3, [r1, #8]
+ 8000320:	4b06      	ldr	r3, [pc, #24]	; (800033c <LL_RCC_SetSysClkSource+0x24>)
+ 8000322:	689b      	ldr	r3, [r3, #8]
+ 8000324:	f023 0203 	bic.w	r2, r3, #3
+ 8000328:	4904      	ldr	r1, [pc, #16]	; (800033c <LL_RCC_SetSysClkSource+0x24>)
+ 800032a:	687b      	ldr	r3, [r7, #4]
+ 800032c:	4313      	orrs	r3, r2
+ 800032e:	608b      	str	r3, [r1, #8]
 }
- 80003ec:	bf00      	nop
- 80003ee:	370c      	adds	r7, #12
- 80003f0:	46bd      	mov	sp, r7
- 80003f2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80003f6:	4770      	bx	lr
- 80003f8:	40021000 	.word	0x40021000
+ 8000330:	bf00      	nop
+ 8000332:	370c      	adds	r7, #12
+ 8000334:	46bd      	mov	sp, r7
+ 8000336:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800033a:	4770      	bx	lr
+ 800033c:	40021000 	.word	0x40021000
 
-080003fc <LL_RCC_GetSysClkSource>:
+08000340 <LL_RCC_GetSysClkSource>:
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
   */
 __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
 {
- 80003fc:	b480      	push	{r7}
- 80003fe:	af00      	add	r7, sp, #0
+ 8000340:	b480      	push	{r7}
+ 8000342:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
- 8000400:	4b04      	ldr	r3, [pc, #16]	; (8000414 <LL_RCC_GetSysClkSource+0x18>)
- 8000402:	689b      	ldr	r3, [r3, #8]
- 8000404:	f003 030c 	and.w	r3, r3, #12
+ 8000344:	4b04      	ldr	r3, [pc, #16]	; (8000358 <LL_RCC_GetSysClkSource+0x18>)
+ 8000346:	689b      	ldr	r3, [r3, #8]
+ 8000348:	f003 030c 	and.w	r3, r3, #12
 }
- 8000408:	4618      	mov	r0, r3
- 800040a:	46bd      	mov	sp, r7
- 800040c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000410:	4770      	bx	lr
- 8000412:	bf00      	nop
- 8000414:	40021000 	.word	0x40021000
+ 800034c:	4618      	mov	r0, r3
+ 800034e:	46bd      	mov	sp, r7
+ 8000350:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000354:	4770      	bx	lr
+ 8000356:	bf00      	nop
+ 8000358:	40021000 	.word	0x40021000
 
-08000418 <LL_RCC_SetAHBPrescaler>:
+0800035c <LL_RCC_SetAHBPrescaler>:
   *         @arg @ref LL_RCC_SYSCLK_DIV_256
   *         @arg @ref LL_RCC_SYSCLK_DIV_512
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
 {
- 8000418:	b480      	push	{r7}
- 800041a:	b083      	sub	sp, #12
- 800041c:	af00      	add	r7, sp, #0
- 800041e:	6078      	str	r0, [r7, #4]
+ 800035c:	b480      	push	{r7}
+ 800035e:	b083      	sub	sp, #12
+ 8000360:	af00      	add	r7, sp, #0
+ 8000362:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
- 8000420:	4b06      	ldr	r3, [pc, #24]	; (800043c <LL_RCC_SetAHBPrescaler+0x24>)
- 8000422:	689b      	ldr	r3, [r3, #8]
- 8000424:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
- 8000428:	4904      	ldr	r1, [pc, #16]	; (800043c <LL_RCC_SetAHBPrescaler+0x24>)
- 800042a:	687b      	ldr	r3, [r7, #4]
- 800042c:	4313      	orrs	r3, r2
- 800042e:	608b      	str	r3, [r1, #8]
+ 8000364:	4b06      	ldr	r3, [pc, #24]	; (8000380 <LL_RCC_SetAHBPrescaler+0x24>)
+ 8000366:	689b      	ldr	r3, [r3, #8]
+ 8000368:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
+ 800036c:	4904      	ldr	r1, [pc, #16]	; (8000380 <LL_RCC_SetAHBPrescaler+0x24>)
+ 800036e:	687b      	ldr	r3, [r7, #4]
+ 8000370:	4313      	orrs	r3, r2
+ 8000372:	608b      	str	r3, [r1, #8]
 }
- 8000430:	bf00      	nop
- 8000432:	370c      	adds	r7, #12
- 8000434:	46bd      	mov	sp, r7
- 8000436:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800043a:	4770      	bx	lr
- 800043c:	40021000 	.word	0x40021000
+ 8000374:	bf00      	nop
+ 8000376:	370c      	adds	r7, #12
+ 8000378:	46bd      	mov	sp, r7
+ 800037a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800037e:	4770      	bx	lr
+ 8000380:	40021000 	.word	0x40021000
 
-08000440 <LL_RCC_SetAPB1Prescaler>:
+08000384 <LL_RCC_SetAPB1Prescaler>:
   *         @arg @ref LL_RCC_APB1_DIV_8
   *         @arg @ref LL_RCC_APB1_DIV_16
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
 {
- 8000440:	b480      	push	{r7}
- 8000442:	b083      	sub	sp, #12
- 8000444:	af00      	add	r7, sp, #0
- 8000446:	6078      	str	r0, [r7, #4]
+ 8000384:	b480      	push	{r7}
+ 8000386:	b083      	sub	sp, #12
+ 8000388:	af00      	add	r7, sp, #0
+ 800038a:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
- 8000448:	4b06      	ldr	r3, [pc, #24]	; (8000464 <LL_RCC_SetAPB1Prescaler+0x24>)
- 800044a:	689b      	ldr	r3, [r3, #8]
- 800044c:	f423 62e0 	bic.w	r2, r3, #1792	; 0x700
- 8000450:	4904      	ldr	r1, [pc, #16]	; (8000464 <LL_RCC_SetAPB1Prescaler+0x24>)
- 8000452:	687b      	ldr	r3, [r7, #4]
- 8000454:	4313      	orrs	r3, r2
- 8000456:	608b      	str	r3, [r1, #8]
+ 800038c:	4b06      	ldr	r3, [pc, #24]	; (80003a8 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 800038e:	689b      	ldr	r3, [r3, #8]
+ 8000390:	f423 62e0 	bic.w	r2, r3, #1792	; 0x700
+ 8000394:	4904      	ldr	r1, [pc, #16]	; (80003a8 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 8000396:	687b      	ldr	r3, [r7, #4]
+ 8000398:	4313      	orrs	r3, r2
+ 800039a:	608b      	str	r3, [r1, #8]
 }
- 8000458:	bf00      	nop
- 800045a:	370c      	adds	r7, #12
- 800045c:	46bd      	mov	sp, r7
- 800045e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000462:	4770      	bx	lr
- 8000464:	40021000 	.word	0x40021000
+ 800039c:	bf00      	nop
+ 800039e:	370c      	adds	r7, #12
+ 80003a0:	46bd      	mov	sp, r7
+ 80003a2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80003a6:	4770      	bx	lr
+ 80003a8:	40021000 	.word	0x40021000
 
-08000468 <LL_RCC_SetAPB2Prescaler>:
+080003ac <LL_RCC_SetAPB2Prescaler>:
   *         @arg @ref LL_RCC_APB2_DIV_8
   *         @arg @ref LL_RCC_APB2_DIV_16
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
 {
- 8000468:	b480      	push	{r7}
- 800046a:	b083      	sub	sp, #12
- 800046c:	af00      	add	r7, sp, #0
- 800046e:	6078      	str	r0, [r7, #4]
+ 80003ac:	b480      	push	{r7}
+ 80003ae:	b083      	sub	sp, #12
+ 80003b0:	af00      	add	r7, sp, #0
+ 80003b2:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
- 8000470:	4b06      	ldr	r3, [pc, #24]	; (800048c <LL_RCC_SetAPB2Prescaler+0x24>)
- 8000472:	689b      	ldr	r3, [r3, #8]
- 8000474:	f423 5260 	bic.w	r2, r3, #14336	; 0x3800
- 8000478:	4904      	ldr	r1, [pc, #16]	; (800048c <LL_RCC_SetAPB2Prescaler+0x24>)
- 800047a:	687b      	ldr	r3, [r7, #4]
- 800047c:	4313      	orrs	r3, r2
- 800047e:	608b      	str	r3, [r1, #8]
+ 80003b4:	4b06      	ldr	r3, [pc, #24]	; (80003d0 <LL_RCC_SetAPB2Prescaler+0x24>)
+ 80003b6:	689b      	ldr	r3, [r3, #8]
+ 80003b8:	f423 5260 	bic.w	r2, r3, #14336	; 0x3800
+ 80003bc:	4904      	ldr	r1, [pc, #16]	; (80003d0 <LL_RCC_SetAPB2Prescaler+0x24>)
+ 80003be:	687b      	ldr	r3, [r7, #4]
+ 80003c0:	4313      	orrs	r3, r2
+ 80003c2:	608b      	str	r3, [r1, #8]
 }
- 8000480:	bf00      	nop
- 8000482:	370c      	adds	r7, #12
- 8000484:	46bd      	mov	sp, r7
- 8000486:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800048a:	4770      	bx	lr
- 800048c:	40021000 	.word	0x40021000
+ 80003c4:	bf00      	nop
+ 80003c6:	370c      	adds	r7, #12
+ 80003c8:	46bd      	mov	sp, r7
+ 80003ca:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80003ce:	4770      	bx	lr
+ 80003d0:	40021000 	.word	0x40021000
 
-08000490 <LL_RCC_PLL_Enable>:
+080003d4 <LL_RCC_SetRTCClockSource>:
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV32
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
+{
+ 80003d4:	b480      	push	{r7}
+ 80003d6:	b083      	sub	sp, #12
+ 80003d8:	af00      	add	r7, sp, #0
+ 80003da:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);
+ 80003dc:	4b07      	ldr	r3, [pc, #28]	; (80003fc <LL_RCC_SetRTCClockSource+0x28>)
+ 80003de:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80003e2:	f423 7240 	bic.w	r2, r3, #768	; 0x300
+ 80003e6:	4905      	ldr	r1, [pc, #20]	; (80003fc <LL_RCC_SetRTCClockSource+0x28>)
+ 80003e8:	687b      	ldr	r3, [r7, #4]
+ 80003ea:	4313      	orrs	r3, r2
+ 80003ec:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+}
+ 80003f0:	bf00      	nop
+ 80003f2:	370c      	adds	r7, #12
+ 80003f4:	46bd      	mov	sp, r7
+ 80003f6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80003fa:	4770      	bx	lr
+ 80003fc:	40021000 	.word	0x40021000
+
+08000400 <LL_RCC_EnableRTC>:
+  * @brief  Enable RTC
+  * @rmtoll BDCR         RTCEN         LL_RCC_EnableRTC
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableRTC(void)
+{
+ 8000400:	b480      	push	{r7}
+ 8000402:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
+ 8000404:	4b06      	ldr	r3, [pc, #24]	; (8000420 <LL_RCC_EnableRTC+0x20>)
+ 8000406:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800040a:	4a05      	ldr	r2, [pc, #20]	; (8000420 <LL_RCC_EnableRTC+0x20>)
+ 800040c:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
+ 8000410:	f8c2 3090 	str.w	r3, [r2, #144]	; 0x90
+}
+ 8000414:	bf00      	nop
+ 8000416:	46bd      	mov	sp, r7
+ 8000418:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800041c:	4770      	bx	lr
+ 800041e:	bf00      	nop
+ 8000420:	40021000 	.word	0x40021000
+
+08000424 <LL_RCC_ForceBackupDomainReset>:
+  * @brief  Force the Backup domain reset
+  * @rmtoll BDCR         BDRST         LL_RCC_ForceBackupDomainReset
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
+{
+ 8000424:	b480      	push	{r7}
+ 8000426:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->BDCR, RCC_BDCR_BDRST);
+ 8000428:	4b06      	ldr	r3, [pc, #24]	; (8000444 <LL_RCC_ForceBackupDomainReset+0x20>)
+ 800042a:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800042e:	4a05      	ldr	r2, [pc, #20]	; (8000444 <LL_RCC_ForceBackupDomainReset+0x20>)
+ 8000430:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8000434:	f8c2 3090 	str.w	r3, [r2, #144]	; 0x90
+}
+ 8000438:	bf00      	nop
+ 800043a:	46bd      	mov	sp, r7
+ 800043c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000440:	4770      	bx	lr
+ 8000442:	bf00      	nop
+ 8000444:	40021000 	.word	0x40021000
+
+08000448 <LL_RCC_ReleaseBackupDomainReset>:
+  * @brief  Release the Backup domain reset
+  * @rmtoll BDCR         BDRST         LL_RCC_ReleaseBackupDomainReset
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
+{
+ 8000448:	b480      	push	{r7}
+ 800044a:	af00      	add	r7, sp, #0
+  CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST);
+ 800044c:	4b06      	ldr	r3, [pc, #24]	; (8000468 <LL_RCC_ReleaseBackupDomainReset+0x20>)
+ 800044e:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8000452:	4a05      	ldr	r2, [pc, #20]	; (8000468 <LL_RCC_ReleaseBackupDomainReset+0x20>)
+ 8000454:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 8000458:	f8c2 3090 	str.w	r3, [r2, #144]	; 0x90
+}
+ 800045c:	bf00      	nop
+ 800045e:	46bd      	mov	sp, r7
+ 8000460:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000464:	4770      	bx	lr
+ 8000466:	bf00      	nop
+ 8000468:	40021000 	.word	0x40021000
+
+0800046c <LL_RCC_PLL_Enable>:
   * @brief  Enable PLL
   * @rmtoll CR           PLLON         LL_RCC_PLL_Enable
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_PLL_Enable(void)
 {
- 8000490:	b480      	push	{r7}
- 8000492:	af00      	add	r7, sp, #0
+ 800046c:	b480      	push	{r7}
+ 800046e:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CR, RCC_CR_PLLON);
- 8000494:	4b05      	ldr	r3, [pc, #20]	; (80004ac <LL_RCC_PLL_Enable+0x1c>)
- 8000496:	681b      	ldr	r3, [r3, #0]
- 8000498:	4a04      	ldr	r2, [pc, #16]	; (80004ac <LL_RCC_PLL_Enable+0x1c>)
- 800049a:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
- 800049e:	6013      	str	r3, [r2, #0]
+ 8000470:	4b05      	ldr	r3, [pc, #20]	; (8000488 <LL_RCC_PLL_Enable+0x1c>)
+ 8000472:	681b      	ldr	r3, [r3, #0]
+ 8000474:	4a04      	ldr	r2, [pc, #16]	; (8000488 <LL_RCC_PLL_Enable+0x1c>)
+ 8000476:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
+ 800047a:	6013      	str	r3, [r2, #0]
 }
- 80004a0:	bf00      	nop
- 80004a2:	46bd      	mov	sp, r7
- 80004a4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80004a8:	4770      	bx	lr
- 80004aa:	bf00      	nop
- 80004ac:	40021000 	.word	0x40021000
+ 800047c:	bf00      	nop
+ 800047e:	46bd      	mov	sp, r7
+ 8000480:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000484:	4770      	bx	lr
+ 8000486:	bf00      	nop
+ 8000488:	40021000 	.word	0x40021000
 
-080004b0 <LL_RCC_PLL_IsReady>:
+0800048c <LL_RCC_PLL_IsReady>:
   * @brief  Check if PLL Ready
   * @rmtoll CR           PLLRDY        LL_RCC_PLL_IsReady
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
 {
- 80004b0:	b480      	push	{r7}
- 80004b2:	af00      	add	r7, sp, #0
+ 800048c:	b480      	push	{r7}
+ 800048e:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL);
- 80004b4:	4b07      	ldr	r3, [pc, #28]	; (80004d4 <LL_RCC_PLL_IsReady+0x24>)
- 80004b6:	681b      	ldr	r3, [r3, #0]
- 80004b8:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 80004bc:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
- 80004c0:	d101      	bne.n	80004c6 <LL_RCC_PLL_IsReady+0x16>
- 80004c2:	2301      	movs	r3, #1
- 80004c4:	e000      	b.n	80004c8 <LL_RCC_PLL_IsReady+0x18>
- 80004c6:	2300      	movs	r3, #0
+ 8000490:	4b07      	ldr	r3, [pc, #28]	; (80004b0 <LL_RCC_PLL_IsReady+0x24>)
+ 8000492:	681b      	ldr	r3, [r3, #0]
+ 8000494:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8000498:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
+ 800049c:	d101      	bne.n	80004a2 <LL_RCC_PLL_IsReady+0x16>
+ 800049e:	2301      	movs	r3, #1
+ 80004a0:	e000      	b.n	80004a4 <LL_RCC_PLL_IsReady+0x18>
+ 80004a2:	2300      	movs	r3, #0
 }
- 80004c8:	4618      	mov	r0, r3
- 80004ca:	46bd      	mov	sp, r7
- 80004cc:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80004d0:	4770      	bx	lr
- 80004d2:	bf00      	nop
- 80004d4:	40021000 	.word	0x40021000
+ 80004a4:	4618      	mov	r0, r3
+ 80004a6:	46bd      	mov	sp, r7
+ 80004a8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80004ac:	4770      	bx	lr
+ 80004ae:	bf00      	nop
+ 80004b0:	40021000 	.word	0x40021000
 
-080004d8 <LL_RCC_PLL_ConfigDomain_SYS>:
+080004b4 <LL_RCC_PLL_ConfigDomain_SYS>:
   *         @arg @ref LL_RCC_PLLR_DIV_6
   *         @arg @ref LL_RCC_PLLR_DIV_8
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
 {
- 80004d8:	b480      	push	{r7}
- 80004da:	b085      	sub	sp, #20
- 80004dc:	af00      	add	r7, sp, #0
- 80004de:	60f8      	str	r0, [r7, #12]
- 80004e0:	60b9      	str	r1, [r7, #8]
- 80004e2:	607a      	str	r2, [r7, #4]
- 80004e4:	603b      	str	r3, [r7, #0]
+ 80004b4:	b480      	push	{r7}
+ 80004b6:	b085      	sub	sp, #20
+ 80004b8:	af00      	add	r7, sp, #0
+ 80004ba:	60f8      	str	r0, [r7, #12]
+ 80004bc:	60b9      	str	r1, [r7, #8]
+ 80004be:	607a      	str	r2, [r7, #4]
+ 80004c0:	603b      	str	r3, [r7, #0]
   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
- 80004e6:	4b0a      	ldr	r3, [pc, #40]	; (8000510 <LL_RCC_PLL_ConfigDomain_SYS+0x38>)
- 80004e8:	68da      	ldr	r2, [r3, #12]
- 80004ea:	4b0a      	ldr	r3, [pc, #40]	; (8000514 <LL_RCC_PLL_ConfigDomain_SYS+0x3c>)
- 80004ec:	4013      	ands	r3, r2
- 80004ee:	68f9      	ldr	r1, [r7, #12]
- 80004f0:	68ba      	ldr	r2, [r7, #8]
- 80004f2:	4311      	orrs	r1, r2
- 80004f4:	687a      	ldr	r2, [r7, #4]
- 80004f6:	0212      	lsls	r2, r2, #8
- 80004f8:	4311      	orrs	r1, r2
- 80004fa:	683a      	ldr	r2, [r7, #0]
- 80004fc:	430a      	orrs	r2, r1
- 80004fe:	4904      	ldr	r1, [pc, #16]	; (8000510 <LL_RCC_PLL_ConfigDomain_SYS+0x38>)
- 8000500:	4313      	orrs	r3, r2
- 8000502:	60cb      	str	r3, [r1, #12]
+ 80004c2:	4b0a      	ldr	r3, [pc, #40]	; (80004ec <LL_RCC_PLL_ConfigDomain_SYS+0x38>)
+ 80004c4:	68da      	ldr	r2, [r3, #12]
+ 80004c6:	4b0a      	ldr	r3, [pc, #40]	; (80004f0 <LL_RCC_PLL_ConfigDomain_SYS+0x3c>)
+ 80004c8:	4013      	ands	r3, r2
+ 80004ca:	68f9      	ldr	r1, [r7, #12]
+ 80004cc:	68ba      	ldr	r2, [r7, #8]
+ 80004ce:	4311      	orrs	r1, r2
+ 80004d0:	687a      	ldr	r2, [r7, #4]
+ 80004d2:	0212      	lsls	r2, r2, #8
+ 80004d4:	4311      	orrs	r1, r2
+ 80004d6:	683a      	ldr	r2, [r7, #0]
+ 80004d8:	430a      	orrs	r2, r1
+ 80004da:	4904      	ldr	r1, [pc, #16]	; (80004ec <LL_RCC_PLL_ConfigDomain_SYS+0x38>)
+ 80004dc:	4313      	orrs	r3, r2
+ 80004de:	60cb      	str	r3, [r1, #12]
              Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLR);
 }
- 8000504:	bf00      	nop
- 8000506:	3714      	adds	r7, #20
- 8000508:	46bd      	mov	sp, r7
- 800050a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800050e:	4770      	bx	lr
- 8000510:	40021000 	.word	0x40021000
- 8000514:	f9ff808c 	.word	0xf9ff808c
+ 80004e0:	bf00      	nop
+ 80004e2:	3714      	adds	r7, #20
+ 80004e4:	46bd      	mov	sp, r7
+ 80004e6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80004ea:	4770      	bx	lr
+ 80004ec:	40021000 	.word	0x40021000
+ 80004f0:	f9ff808c 	.word	0xf9ff808c
 
-08000518 <LL_RCC_PLL_EnableDomain_SYS>:
+080004f4 <LL_RCC_PLL_EnableDomain_SYS>:
   * @brief  Enable PLL output mapped on SYSCLK domain
   * @rmtoll PLLCFGR      PLLREN        LL_RCC_PLL_EnableDomain_SYS
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_PLL_EnableDomain_SYS(void)
 {
- 8000518:	b480      	push	{r7}
- 800051a:	af00      	add	r7, sp, #0
+ 80004f4:	b480      	push	{r7}
+ 80004f6:	af00      	add	r7, sp, #0
   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN);
- 800051c:	4b05      	ldr	r3, [pc, #20]	; (8000534 <LL_RCC_PLL_EnableDomain_SYS+0x1c>)
- 800051e:	68db      	ldr	r3, [r3, #12]
- 8000520:	4a04      	ldr	r2, [pc, #16]	; (8000534 <LL_RCC_PLL_EnableDomain_SYS+0x1c>)
- 8000522:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
- 8000526:	60d3      	str	r3, [r2, #12]
+ 80004f8:	4b05      	ldr	r3, [pc, #20]	; (8000510 <LL_RCC_PLL_EnableDomain_SYS+0x1c>)
+ 80004fa:	68db      	ldr	r3, [r3, #12]
+ 80004fc:	4a04      	ldr	r2, [pc, #16]	; (8000510 <LL_RCC_PLL_EnableDomain_SYS+0x1c>)
+ 80004fe:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
+ 8000502:	60d3      	str	r3, [r2, #12]
 }
- 8000528:	bf00      	nop
- 800052a:	46bd      	mov	sp, r7
- 800052c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000530:	4770      	bx	lr
- 8000532:	bf00      	nop
- 8000534:	40021000 	.word	0x40021000
+ 8000504:	bf00      	nop
+ 8000506:	46bd      	mov	sp, r7
+ 8000508:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800050c:	4770      	bx	lr
+ 800050e:	bf00      	nop
+ 8000510:	40021000 	.word	0x40021000
 
-08000538 <LL_FLASH_SetLatency>:
+08000514 <LL_FLASH_SetLatency>:
   *
   *         (*) value not defined in all devices.
   * @retval None
   */
 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
 {
- 8000538:	b480      	push	{r7}
- 800053a:	b083      	sub	sp, #12
- 800053c:	af00      	add	r7, sp, #0
- 800053e:	6078      	str	r0, [r7, #4]
+ 8000514:	b480      	push	{r7}
+ 8000516:	b083      	sub	sp, #12
+ 8000518:	af00      	add	r7, sp, #0
+ 800051a:	6078      	str	r0, [r7, #4]
   MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
- 8000540:	4b06      	ldr	r3, [pc, #24]	; (800055c <LL_FLASH_SetLatency+0x24>)
- 8000542:	681b      	ldr	r3, [r3, #0]
- 8000544:	f023 0207 	bic.w	r2, r3, #7
- 8000548:	4904      	ldr	r1, [pc, #16]	; (800055c <LL_FLASH_SetLatency+0x24>)
- 800054a:	687b      	ldr	r3, [r7, #4]
- 800054c:	4313      	orrs	r3, r2
- 800054e:	600b      	str	r3, [r1, #0]
+ 800051c:	4b06      	ldr	r3, [pc, #24]	; (8000538 <LL_FLASH_SetLatency+0x24>)
+ 800051e:	681b      	ldr	r3, [r3, #0]
+ 8000520:	f023 0207 	bic.w	r2, r3, #7
+ 8000524:	4904      	ldr	r1, [pc, #16]	; (8000538 <LL_FLASH_SetLatency+0x24>)
+ 8000526:	687b      	ldr	r3, [r7, #4]
+ 8000528:	4313      	orrs	r3, r2
+ 800052a:	600b      	str	r3, [r1, #0]
 }
- 8000550:	bf00      	nop
- 8000552:	370c      	adds	r7, #12
- 8000554:	46bd      	mov	sp, r7
- 8000556:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800055a:	4770      	bx	lr
- 800055c:	40022000 	.word	0x40022000
+ 800052c:	bf00      	nop
+ 800052e:	370c      	adds	r7, #12
+ 8000530:	46bd      	mov	sp, r7
+ 8000532:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000536:	4770      	bx	lr
+ 8000538:	40022000 	.word	0x40022000
 
-08000560 <LL_SYSTICK_EnableIT>:
-  * @brief  Enable SysTick exception request
-  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_EnableIT
+0800053c <LL_FLASH_GetLatency>:
+  *         @arg @ref LL_FLASH_LATENCY_15 (*)
+  *
+  *         (*) value not defined in all devices.
+  */
+__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
+{
+ 800053c:	b480      	push	{r7}
+ 800053e:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
+ 8000540:	4b04      	ldr	r3, [pc, #16]	; (8000554 <LL_FLASH_GetLatency+0x18>)
+ 8000542:	681b      	ldr	r3, [r3, #0]
+ 8000544:	f003 0307 	and.w	r3, r3, #7
+}
+ 8000548:	4618      	mov	r0, r3
+ 800054a:	46bd      	mov	sp, r7
+ 800054c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000550:	4770      	bx	lr
+ 8000552:	bf00      	nop
+ 8000554:	40022000 	.word	0x40022000
+
+08000558 <LL_PWR_SetRegulVoltageScaling>:
+  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
+  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
   * @retval None
   */
-__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
+__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
 {
- 8000560:	b480      	push	{r7}
- 8000562:	af00      	add	r7, sp, #0
-  SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
- 8000564:	4b05      	ldr	r3, [pc, #20]	; (800057c <LL_SYSTICK_EnableIT+0x1c>)
- 8000566:	681b      	ldr	r3, [r3, #0]
- 8000568:	4a04      	ldr	r2, [pc, #16]	; (800057c <LL_SYSTICK_EnableIT+0x1c>)
- 800056a:	f043 0302 	orr.w	r3, r3, #2
- 800056e:	6013      	str	r3, [r2, #0]
+ 8000558:	b480      	push	{r7}
+ 800055a:	b083      	sub	sp, #12
+ 800055c:	af00      	add	r7, sp, #0
+ 800055e:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling);
+ 8000560:	4b06      	ldr	r3, [pc, #24]	; (800057c <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 8000562:	681b      	ldr	r3, [r3, #0]
+ 8000564:	f423 62c0 	bic.w	r2, r3, #1536	; 0x600
+ 8000568:	4904      	ldr	r1, [pc, #16]	; (800057c <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 800056a:	687b      	ldr	r3, [r7, #4]
+ 800056c:	4313      	orrs	r3, r2
+ 800056e:	600b      	str	r3, [r1, #0]
 }
  8000570:	bf00      	nop
- 8000572:	46bd      	mov	sp, r7
- 8000574:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000578:	4770      	bx	lr
- 800057a:	bf00      	nop
- 800057c:	e000e010 	.word	0xe000e010
+ 8000572:	370c      	adds	r7, #12
+ 8000574:	46bd      	mov	sp, r7
+ 8000576:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800057a:	4770      	bx	lr
+ 800057c:	40007000 	.word	0x40007000
 
-08000580 <LL_LPM_EnableSleep>:
-  * @brief  Processor uses sleep as its low power mode
-  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableSleep
+08000580 <LL_PWR_EnableBkUpAccess>:
+  * @brief  Enable access to the backup domain
+  * @rmtoll CR1          DBP           LL_PWR_EnableBkUpAccess
   * @retval None
   */
-__STATIC_INLINE void LL_LPM_EnableSleep(void)
+__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
 {
  8000580:	b480      	push	{r7}
  8000582:	af00      	add	r7, sp, #0
-  /* Clear SLEEPDEEP bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
- 8000584:	4b05      	ldr	r3, [pc, #20]	; (800059c <LL_LPM_EnableSleep+0x1c>)
- 8000586:	691b      	ldr	r3, [r3, #16]
- 8000588:	4a04      	ldr	r2, [pc, #16]	; (800059c <LL_LPM_EnableSleep+0x1c>)
- 800058a:	f023 0304 	bic.w	r3, r3, #4
- 800058e:	6113      	str	r3, [r2, #16]
+  SET_BIT(PWR->CR1, PWR_CR1_DBP);
+ 8000584:	4b05      	ldr	r3, [pc, #20]	; (800059c <LL_PWR_EnableBkUpAccess+0x1c>)
+ 8000586:	681b      	ldr	r3, [r3, #0]
+ 8000588:	4a04      	ldr	r2, [pc, #16]	; (800059c <LL_PWR_EnableBkUpAccess+0x1c>)
+ 800058a:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 800058e:	6013      	str	r3, [r2, #0]
 }
  8000590:	bf00      	nop
  8000592:	46bd      	mov	sp, r7
  8000594:	f85d 7b04 	ldr.w	r7, [sp], #4
  8000598:	4770      	bx	lr
  800059a:	bf00      	nop
- 800059c:	e000ed00 	.word	0xe000ed00
+ 800059c:	40007000 	.word	0x40007000
 
-080005a0 <SysTick_Handler>:
-volatile uint32_t msTicks = 0;
-volatile uint8_t expe = 0;
-volatile uint8_t blue_mode = 0;
-
-void SysTick_Handler()
+080005a0 <main>:
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
 {
  80005a0:	b580      	push	{r7, lr}
  80005a2:	af00      	add	r7, sp, #0
-  if	( BLUE_BUTTON() ){
- 80005a4:	f7ff fee2 	bl	800036c <BLUE_BUTTON>
- 80005a8:	4603      	mov	r3, r0
- 80005aa:	2b00      	cmp	r3, #0
- 80005ac:	d002      	beq.n	80005b4 <SysTick_Handler+0x14>
-			blue_mode = 1 ;
- 80005ae:	4b0e      	ldr	r3, [pc, #56]	; (80005e8 <SysTick_Handler+0x48>)
- 80005b0:	2201      	movs	r2, #1
- 80005b2:	701a      	strb	r2, [r3, #0]
-  }
+  /* USER CODE END 1 */
 
-  msTicks++;                                                /* See startup file startup_LPC17xx.s for SysTick vector */
- 80005b4:	4b0d      	ldr	r3, [pc, #52]	; (80005ec <SysTick_Handler+0x4c>)
- 80005b6:	681b      	ldr	r3, [r3, #0]
- 80005b8:	3301      	adds	r3, #1
- 80005ba:	4a0c      	ldr	r2, [pc, #48]	; (80005ec <SysTick_Handler+0x4c>)
- 80005bc:	6013      	str	r3, [r2, #0]
-  if (msTicks == 5){
- 80005be:	4b0b      	ldr	r3, [pc, #44]	; (80005ec <SysTick_Handler+0x4c>)
- 80005c0:	681b      	ldr	r3, [r3, #0]
- 80005c2:	2b05      	cmp	r3, #5
- 80005c4:	d103      	bne.n	80005ce <SysTick_Handler+0x2e>
-	  LED_GREEN(0);
- 80005c6:	2000      	movs	r0, #0
- 80005c8:	f7ff feba 	bl	8000340 <LED_GREEN>
-  }else if(msTicks >= 200){
-	  msTicks = 0;
-	  LED_GREEN(1);
-  }
-}
- 80005cc:	e009      	b.n	80005e2 <SysTick_Handler+0x42>
-  }else if(msTicks >= 200){
- 80005ce:	4b07      	ldr	r3, [pc, #28]	; (80005ec <SysTick_Handler+0x4c>)
- 80005d0:	681b      	ldr	r3, [r3, #0]
- 80005d2:	2bc7      	cmp	r3, #199	; 0xc7
- 80005d4:	d905      	bls.n	80005e2 <SysTick_Handler+0x42>
-	  msTicks = 0;
- 80005d6:	4b05      	ldr	r3, [pc, #20]	; (80005ec <SysTick_Handler+0x4c>)
- 80005d8:	2200      	movs	r2, #0
- 80005da:	601a      	str	r2, [r3, #0]
-	  LED_GREEN(1);
- 80005dc:	2001      	movs	r0, #1
- 80005de:	f7ff feaf 	bl	8000340 <LED_GREEN>
-}
- 80005e2:	bf00      	nop
- 80005e4:	bd80      	pop	{r7, pc}
- 80005e6:	bf00      	nop
- 80005e8:	20000024 	.word	0x20000024
- 80005ec:	20000020 	.word	0x20000020
+  /* MCU Configuration--------------------------------------------------------*/
 
-080005f0 <main>:
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+ 80005a4:	f000 f99f 	bl	80008e6 <HAL_Init>
+  /* USER CODE BEGIN Init */
 
-void     SystemClock_Config(void);
+  /* USER CODE END Init */
 
-int main(void)
+  /* Configure the system clock */
+  SystemClock_Config();
+ 80005a8:	f000 f806 	bl	80005b8 <SystemClock_Config>
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+ 80005ac:	f000 f896 	bl	80006dc <MX_GPIO_Init>
+  MX_RTC_Init();
+ 80005b0:	f000 f86c 	bl	800068c <MX_RTC_Init>
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+ 80005b4:	e7fe      	b.n	80005b4 <main+0x14>
+	...
+
+080005b8 <SystemClock_Config>:
+  * @brief System Clock Configuration
+  * @retval None
+  * 24Mhz + RTC + LSE
+  */
+void SystemClock_Config(void)
 {
- 80005f0:	b580      	push	{r7, lr}
- 80005f2:	af00      	add	r7, sp, #0
-/* Configure the system clock */
-SystemClock_Config();
- 80005f4:	f000 f816 	bl	8000624 <SystemClock_Config>
+ 80005b8:	b580      	push	{r7, lr}
+ 80005ba:	af00      	add	r7, sp, #0
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+ 80005bc:	2001      	movs	r0, #1
+ 80005be:	f7ff ffa9 	bl	8000514 <LL_FLASH_SetLatency>
+  while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_1)
+ 80005c2:	bf00      	nop
+ 80005c4:	f7ff ffba 	bl	800053c <LL_FLASH_GetLatency>
+ 80005c8:	4603      	mov	r3, r0
+ 80005ca:	2b01      	cmp	r3, #1
+ 80005cc:	d1fa      	bne.n	80005c4 <SystemClock_Config+0xc>
+  {
+  }
+  LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
+ 80005ce:	f44f 7000 	mov.w	r0, #512	; 0x200
+ 80005d2:	f7ff ffc1 	bl	8000558 <LL_PWR_SetRegulVoltageScaling>
+  LL_RCC_MSI_Enable();
+ 80005d6:	f7ff fe33 	bl	8000240 <LL_RCC_MSI_Enable>
 
-// config GPIO
-GPIO_init();
- 80005f8:	f7ff fe84 	bl	8000304 <GPIO_init>
+   /* Wait till MSI is ready */
+  while(LL_RCC_MSI_IsReady() != 1)
+ 80005da:	bf00      	nop
+ 80005dc:	f7ff fe40 	bl	8000260 <LL_RCC_MSI_IsReady>
+ 80005e0:	4603      	mov	r3, r0
+ 80005e2:	2b01      	cmp	r3, #1
+ 80005e4:	d1fa      	bne.n	80005dc <SystemClock_Config+0x24>
+  {
 
-// init systick timer (tick period at 1 ms)
-LL_Init1msTick( SystemCoreClock );
- 80005fc:	4b07      	ldr	r3, [pc, #28]	; (800061c <main+0x2c>)
- 80005fe:	681b      	ldr	r3, [r3, #0]
- 8000600:	4618      	mov	r0, r3
- 8000602:	f000 f99f 	bl	8000944 <LL_Init1msTick>
-LL_SYSTICK_EnableIT();
- 8000606:	f7ff ffab 	bl	8000560 <LL_SYSTICK_EnableIT>
+  }
+  LL_RCC_MSI_EnablePLLMode();
+ 80005e6:	f7ff fe4d 	bl	8000284 <LL_RCC_MSI_EnablePLLMode>
+  LL_RCC_MSI_EnableRangeSelection();
+ 80005ea:	f7ff fe5b 	bl	80002a4 <LL_RCC_MSI_EnableRangeSelection>
+  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
+ 80005ee:	2060      	movs	r0, #96	; 0x60
+ 80005f0:	f7ff fe68 	bl	80002c4 <LL_RCC_MSI_SetRange>
+  LL_RCC_MSI_SetCalibTrimming(0);
+ 80005f4:	2000      	movs	r0, #0
+ 80005f6:	f7ff fe79 	bl	80002ec <LL_RCC_MSI_SetCalibTrimming>
+  LL_PWR_EnableBkUpAccess();
+ 80005fa:	f7ff ffc1 	bl	8000580 <LL_PWR_EnableBkUpAccess>
+  LL_RCC_ForceBackupDomainReset();
+ 80005fe:	f7ff ff11 	bl	8000424 <LL_RCC_ForceBackupDomainReset>
+  LL_RCC_ReleaseBackupDomainReset();
+ 8000602:	f7ff ff21 	bl	8000448 <LL_RCC_ReleaseBackupDomainReset>
+  LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
+ 8000606:	2000      	movs	r0, #0
+ 8000608:	f7ff fdf0 	bl	80001ec <LL_RCC_LSE_SetDriveCapability>
+  LL_RCC_LSE_Enable();
+ 800060c:	f7ff fddc 	bl	80001c8 <LL_RCC_LSE_Enable>
 
-//Setup Sleep mode
-LL_LPM_EnableSleep();
- 800060a:	f7ff ffb9 	bl	8000580 <LL_LPM_EnableSleep>
-//LL_LPM_EnableSleepOnExit();
+   /* Wait till LSE is ready */
+  while(LL_RCC_LSE_IsReady() != 1)
+ 8000610:	bf00      	nop
+ 8000612:	f7ff fe01 	bl	8000218 <LL_RCC_LSE_IsReady>
+ 8000616:	4603      	mov	r3, r0
+ 8000618:	2b01      	cmp	r3, #1
+ 800061a:	d1fa      	bne.n	8000612 <SystemClock_Config+0x5a>
+  {
 
-while (1)  {
-	if (blue_mode){
- 800060e:	4b04      	ldr	r3, [pc, #16]	; (8000620 <main+0x30>)
- 8000610:	781b      	ldrb	r3, [r3, #0]
- 8000612:	b2db      	uxtb	r3, r3
- 8000614:	2b00      	cmp	r3, #0
- 8000616:	d0fa      	beq.n	800060e <main+0x1e>
-		__WFI();
- 8000618:	bf30      	wfi
-	if (blue_mode){
- 800061a:	e7f8      	b.n	800060e <main+0x1e>
- 800061c:	20000000 	.word	0x20000000
- 8000620:	20000024 	.word	0x20000024
+  }
+  LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
+ 800061c:	f44f 7080 	mov.w	r0, #256	; 0x100
+ 8000620:	f7ff fed8 	bl	80003d4 <LL_RCC_SetRTCClockSource>
+  LL_RCC_EnableRTC();
+ 8000624:	f7ff feec 	bl	8000400 <LL_RCC_EnableRTC>
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 24, LL_RCC_PLLR_DIV_4);
+ 8000628:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 800062c:	2218      	movs	r2, #24
+ 800062e:	2100      	movs	r1, #0
+ 8000630:	2001      	movs	r0, #1
+ 8000632:	f7ff ff3f 	bl	80004b4 <LL_RCC_PLL_ConfigDomain_SYS>
+  LL_RCC_PLL_EnableDomain_SYS();
+ 8000636:	f7ff ff5d 	bl	80004f4 <LL_RCC_PLL_EnableDomain_SYS>
+  LL_RCC_PLL_Enable();
+ 800063a:	f7ff ff17 	bl	800046c <LL_RCC_PLL_Enable>
 
-08000624 <SystemClock_Config>:
-  *            PLL_R                          = 2
-  *            Flash Latency(WS)              = 4
-  * @param  None
+   /* Wait till PLL is ready */
+  while(LL_RCC_PLL_IsReady() != 1)
+ 800063e:	bf00      	nop
+ 8000640:	f7ff ff24 	bl	800048c <LL_RCC_PLL_IsReady>
+ 8000644:	4603      	mov	r3, r0
+ 8000646:	2b01      	cmp	r3, #1
+ 8000648:	d1fa      	bne.n	8000640 <SystemClock_Config+0x88>
+  {
+
+  }
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+ 800064a:	2003      	movs	r0, #3
+ 800064c:	f7ff fe64 	bl	8000318 <LL_RCC_SetSysClkSource>
+
+   /* Wait till System clock is ready */
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
+ 8000650:	bf00      	nop
+ 8000652:	f7ff fe75 	bl	8000340 <LL_RCC_GetSysClkSource>
+ 8000656:	4603      	mov	r3, r0
+ 8000658:	2b0c      	cmp	r3, #12
+ 800065a:	d1fa      	bne.n	8000652 <SystemClock_Config+0x9a>
+  {
+
+  }
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+ 800065c:	2000      	movs	r0, #0
+ 800065e:	f7ff fe7d 	bl	800035c <LL_RCC_SetAHBPrescaler>
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+ 8000662:	2000      	movs	r0, #0
+ 8000664:	f7ff fe8e 	bl	8000384 <LL_RCC_SetAPB1Prescaler>
+  LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+ 8000668:	2000      	movs	r0, #0
+ 800066a:	f7ff fe9f 	bl	80003ac <LL_RCC_SetAPB2Prescaler>
+  LL_SetSystemCoreClock(24000000);
+ 800066e:	4806      	ldr	r0, [pc, #24]	; (8000688 <SystemClock_Config+0xd0>)
+ 8000670:	f000 fba6 	bl	8000dc0 <LL_SetSystemCoreClock>
+
+   /* Update the time base */
+  if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
+ 8000674:	2000      	movs	r0, #0
+ 8000676:	f000 f94f 	bl	8000918 <HAL_InitTick>
+ 800067a:	4603      	mov	r3, r0
+ 800067c:	2b00      	cmp	r3, #0
+ 800067e:	d001      	beq.n	8000684 <SystemClock_Config+0xcc>
+  {
+    Error_Handler();
+ 8000680:	f000 f85c 	bl	800073c <Error_Handler>
+  }
+}
+ 8000684:	bf00      	nop
+ 8000686:	bd80      	pop	{r7, pc}
+ 8000688:	016e3600 	.word	0x016e3600
+
+0800068c <MX_RTC_Init>:
+  * @brief RTC Initialization Function
+  * @param None
   * @retval None
   */
-void SystemClock_Config(void) {
- 8000624:	b580      	push	{r7, lr}
- 8000626:	af00      	add	r7, sp, #0
-/* MSI configuration and activation */
-LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
- 8000628:	2004      	movs	r0, #4
- 800062a:	f7ff ff85 	bl	8000538 <LL_FLASH_SetLatency>
-LL_RCC_MSI_Enable();
- 800062e:	f7ff feaf 	bl	8000390 <LL_RCC_MSI_Enable>
-while	(LL_RCC_MSI_IsReady() != 1)
- 8000632:	bf00      	nop
- 8000634:	f7ff febc 	bl	80003b0 <LL_RCC_MSI_IsReady>
- 8000638:	4603      	mov	r3, r0
- 800063a:	2b01      	cmp	r3, #1
- 800063c:	d1fa      	bne.n	8000634 <SystemClock_Config+0x10>
-	{ };
-  
-/* Main PLL configuration and activation */
-LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
- 800063e:	2300      	movs	r3, #0
- 8000640:	2228      	movs	r2, #40	; 0x28
- 8000642:	2100      	movs	r1, #0
- 8000644:	2001      	movs	r0, #1
- 8000646:	f7ff ff47 	bl	80004d8 <LL_RCC_PLL_ConfigDomain_SYS>
-LL_RCC_PLL_Enable();
- 800064a:	f7ff ff21 	bl	8000490 <LL_RCC_PLL_Enable>
-LL_RCC_PLL_EnableDomain_SYS();
- 800064e:	f7ff ff63 	bl	8000518 <LL_RCC_PLL_EnableDomain_SYS>
-while(LL_RCC_PLL_IsReady() != 1)
- 8000652:	bf00      	nop
- 8000654:	f7ff ff2c 	bl	80004b0 <LL_RCC_PLL_IsReady>
- 8000658:	4603      	mov	r3, r0
- 800065a:	2b01      	cmp	r3, #1
- 800065c:	d1fa      	bne.n	8000654 <SystemClock_Config+0x30>
-	{ };
-  
-/* Sysclk activation on the main PLL */
-LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
- 800065e:	2000      	movs	r0, #0
- 8000660:	f7ff feda 	bl	8000418 <LL_RCC_SetAHBPrescaler>
-LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
- 8000664:	2003      	movs	r0, #3
- 8000666:	f7ff feb5 	bl	80003d4 <LL_RCC_SetSysClkSource>
-while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
- 800066a:	bf00      	nop
- 800066c:	f7ff fec6 	bl	80003fc <LL_RCC_GetSysClkSource>
- 8000670:	4603      	mov	r3, r0
- 8000672:	2b0c      	cmp	r3, #12
- 8000674:	d1fa      	bne.n	800066c <SystemClock_Config+0x48>
-	{ };
-  
-/* Set APB1 & APB2 prescaler*/
-LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
- 8000676:	2000      	movs	r0, #0
- 8000678:	f7ff fee2 	bl	8000440 <LL_RCC_SetAPB1Prescaler>
-LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
- 800067c:	2000      	movs	r0, #0
- 800067e:	f7ff fef3 	bl	8000468 <LL_RCC_SetAPB2Prescaler>
+static void MX_RTC_Init(void)
+{
+ 800068c:	b580      	push	{r7, lr}
+ 800068e:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+ 8000690:	4b10      	ldr	r3, [pc, #64]	; (80006d4 <MX_RTC_Init+0x48>)
+ 8000692:	4a11      	ldr	r2, [pc, #68]	; (80006d8 <MX_RTC_Init+0x4c>)
+ 8000694:	601a      	str	r2, [r3, #0]
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+ 8000696:	4b0f      	ldr	r3, [pc, #60]	; (80006d4 <MX_RTC_Init+0x48>)
+ 8000698:	2200      	movs	r2, #0
+ 800069a:	605a      	str	r2, [r3, #4]
+  hrtc.Init.AsynchPrediv = 127;
+ 800069c:	4b0d      	ldr	r3, [pc, #52]	; (80006d4 <MX_RTC_Init+0x48>)
+ 800069e:	227f      	movs	r2, #127	; 0x7f
+ 80006a0:	609a      	str	r2, [r3, #8]
+  hrtc.Init.SynchPrediv = 255;
+ 80006a2:	4b0c      	ldr	r3, [pc, #48]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006a4:	22ff      	movs	r2, #255	; 0xff
+ 80006a6:	60da      	str	r2, [r3, #12]
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+ 80006a8:	4b0a      	ldr	r3, [pc, #40]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006aa:	2200      	movs	r2, #0
+ 80006ac:	611a      	str	r2, [r3, #16]
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+ 80006ae:	4b09      	ldr	r3, [pc, #36]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006b0:	2200      	movs	r2, #0
+ 80006b2:	615a      	str	r2, [r3, #20]
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+ 80006b4:	4b07      	ldr	r3, [pc, #28]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006b6:	2200      	movs	r2, #0
+ 80006b8:	619a      	str	r2, [r3, #24]
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+ 80006ba:	4b06      	ldr	r3, [pc, #24]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006bc:	2200      	movs	r2, #0
+ 80006be:	61da      	str	r2, [r3, #28]
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+ 80006c0:	4804      	ldr	r0, [pc, #16]	; (80006d4 <MX_RTC_Init+0x48>)
+ 80006c2:	f000 fa6a 	bl	8000b9a <HAL_RTC_Init>
+ 80006c6:	4603      	mov	r3, r0
+ 80006c8:	2b00      	cmp	r3, #0
+ 80006ca:	d001      	beq.n	80006d0 <MX_RTC_Init+0x44>
+  {
+    Error_Handler();
+ 80006cc:	f000 f836 	bl	800073c <Error_Handler>
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
 
-/* Update the global variable called SystemCoreClock */
-SystemCoreClockUpdate();
- 8000682:	f000 f861 	bl	8000748 <SystemCoreClockUpdate>
 }
- 8000686:	bf00      	nop
- 8000688:	bd80      	pop	{r7, pc}
+ 80006d0:	bf00      	nop
+ 80006d2:	bd80      	pop	{r7, pc}
+ 80006d4:	20000028 	.word	0x20000028
+ 80006d8:	40002800 	.word	0x40002800
 
-0800068a <NMI_Handler>:
+080006dc <MX_GPIO_Init>:
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+ 80006dc:	b480      	push	{r7}
+ 80006de:	b085      	sub	sp, #20
+ 80006e0:	af00      	add	r7, sp, #0
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+ 80006e2:	4b15      	ldr	r3, [pc, #84]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 80006e4:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 80006e6:	4a14      	ldr	r2, [pc, #80]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 80006e8:	f043 0304 	orr.w	r3, r3, #4
+ 80006ec:	64d3      	str	r3, [r2, #76]	; 0x4c
+ 80006ee:	4b12      	ldr	r3, [pc, #72]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 80006f0:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 80006f2:	f003 0304 	and.w	r3, r3, #4
+ 80006f6:	60fb      	str	r3, [r7, #12]
+ 80006f8:	68fb      	ldr	r3, [r7, #12]
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+ 80006fa:	4b0f      	ldr	r3, [pc, #60]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 80006fc:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 80006fe:	4a0e      	ldr	r2, [pc, #56]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 8000700:	f043 0301 	orr.w	r3, r3, #1
+ 8000704:	64d3      	str	r3, [r2, #76]	; 0x4c
+ 8000706:	4b0c      	ldr	r3, [pc, #48]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 8000708:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 800070a:	f003 0301 	and.w	r3, r3, #1
+ 800070e:	60bb      	str	r3, [r7, #8]
+ 8000710:	68bb      	ldr	r3, [r7, #8]
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8000712:	4b09      	ldr	r3, [pc, #36]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 8000714:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8000716:	4a08      	ldr	r2, [pc, #32]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 8000718:	f043 0302 	orr.w	r3, r3, #2
+ 800071c:	64d3      	str	r3, [r2, #76]	; 0x4c
+ 800071e:	4b06      	ldr	r3, [pc, #24]	; (8000738 <MX_GPIO_Init+0x5c>)
+ 8000720:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8000722:	f003 0302 	and.w	r3, r3, #2
+ 8000726:	607b      	str	r3, [r7, #4]
+ 8000728:	687b      	ldr	r3, [r7, #4]
+
+}
+ 800072a:	bf00      	nop
+ 800072c:	3714      	adds	r7, #20
+ 800072e:	46bd      	mov	sp, r7
+ 8000730:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000734:	4770      	bx	lr
+ 8000736:	bf00      	nop
+ 8000738:	40021000 	.word	0x40021000
+
+0800073c <Error_Handler>:
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+ 800073c:	b480      	push	{r7}
+ 800073e:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+ 8000740:	bf00      	nop
+ 8000742:	46bd      	mov	sp, r7
+ 8000744:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000748:	4770      	bx	lr
+	...
+
+0800074c <HAL_MspInit>:
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+ 800074c:	b480      	push	{r7}
+ 800074e:	b083      	sub	sp, #12
+ 8000750:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8000752:	4b0f      	ldr	r3, [pc, #60]	; (8000790 <HAL_MspInit+0x44>)
+ 8000754:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 8000756:	4a0e      	ldr	r2, [pc, #56]	; (8000790 <HAL_MspInit+0x44>)
+ 8000758:	f043 0301 	orr.w	r3, r3, #1
+ 800075c:	6613      	str	r3, [r2, #96]	; 0x60
+ 800075e:	4b0c      	ldr	r3, [pc, #48]	; (8000790 <HAL_MspInit+0x44>)
+ 8000760:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 8000762:	f003 0301 	and.w	r3, r3, #1
+ 8000766:	607b      	str	r3, [r7, #4]
+ 8000768:	687b      	ldr	r3, [r7, #4]
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 800076a:	4b09      	ldr	r3, [pc, #36]	; (8000790 <HAL_MspInit+0x44>)
+ 800076c:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 800076e:	4a08      	ldr	r2, [pc, #32]	; (8000790 <HAL_MspInit+0x44>)
+ 8000770:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8000774:	6593      	str	r3, [r2, #88]	; 0x58
+ 8000776:	4b06      	ldr	r3, [pc, #24]	; (8000790 <HAL_MspInit+0x44>)
+ 8000778:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 800077a:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 800077e:	603b      	str	r3, [r7, #0]
+ 8000780:	683b      	ldr	r3, [r7, #0]
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+ 8000782:	bf00      	nop
+ 8000784:	370c      	adds	r7, #12
+ 8000786:	46bd      	mov	sp, r7
+ 8000788:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800078c:	4770      	bx	lr
+ 800078e:	bf00      	nop
+ 8000790:	40021000 	.word	0x40021000
+
+08000794 <HAL_RTC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+ 8000794:	b480      	push	{r7}
+ 8000796:	b083      	sub	sp, #12
+ 8000798:	af00      	add	r7, sp, #0
+ 800079a:	6078      	str	r0, [r7, #4]
+  if(hrtc->Instance==RTC)
+ 800079c:	687b      	ldr	r3, [r7, #4]
+ 800079e:	681b      	ldr	r3, [r3, #0]
+ 80007a0:	4a08      	ldr	r2, [pc, #32]	; (80007c4 <HAL_RTC_MspInit+0x30>)
+ 80007a2:	4293      	cmp	r3, r2
+ 80007a4:	d107      	bne.n	80007b6 <HAL_RTC_MspInit+0x22>
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+
+  /* USER CODE END RTC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+ 80007a6:	4b08      	ldr	r3, [pc, #32]	; (80007c8 <HAL_RTC_MspInit+0x34>)
+ 80007a8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80007ac:	4a06      	ldr	r2, [pc, #24]	; (80007c8 <HAL_RTC_MspInit+0x34>)
+ 80007ae:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
+ 80007b2:	f8c2 3090 	str.w	r3, [r2, #144]	; 0x90
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+ 80007b6:	bf00      	nop
+ 80007b8:	370c      	adds	r7, #12
+ 80007ba:	46bd      	mov	sp, r7
+ 80007bc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80007c0:	4770      	bx	lr
+ 80007c2:	bf00      	nop
+ 80007c4:	40002800 	.word	0x40002800
+ 80007c8:	40021000 	.word	0x40021000
+
+080007cc <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable interrupt.
   */
 void NMI_Handler(void)
 {
- 800068a:	b480      	push	{r7}
- 800068c:	af00      	add	r7, sp, #0
+ 80007cc:	b480      	push	{r7}
+ 80007ce:	af00      	add	r7, sp, #0
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
 
   /* USER CODE END NonMaskableInt_IRQn 1 */
 }
- 800068e:	bf00      	nop
- 8000690:	46bd      	mov	sp, r7
- 8000692:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000696:	4770      	bx	lr
+ 80007d0:	bf00      	nop
+ 80007d2:	46bd      	mov	sp, r7
+ 80007d4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80007d8:	4770      	bx	lr
 
-08000698 <HardFault_Handler>:
+080007da <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 8000698:	b480      	push	{r7}
- 800069a:	af00      	add	r7, sp, #0
+ 80007da:	b480      	push	{r7}
+ 80007dc:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 800069c:	e7fe      	b.n	800069c <HardFault_Handler+0x4>
+ 80007de:	e7fe      	b.n	80007de <HardFault_Handler+0x4>
 
-0800069e <MemManage_Handler>:
+080007e0 <MemManage_Handler>:
 
 /**
   * @brief This function handles Memory management fault.
   */
 void MemManage_Handler(void)
 {
- 800069e:	b480      	push	{r7}
- 80006a0:	af00      	add	r7, sp, #0
+ 80007e0:	b480      	push	{r7}
+ 80007e2:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
- 80006a2:	e7fe      	b.n	80006a2 <MemManage_Handler+0x4>
+ 80007e4:	e7fe      	b.n	80007e4 <MemManage_Handler+0x4>
 
-080006a4 <BusFault_Handler>:
+080007e6 <BusFault_Handler>:
 
 /**
   * @brief This function handles Prefetch fault, memory access fault.
   */
 void BusFault_Handler(void)
 {
- 80006a4:	b480      	push	{r7}
- 80006a6:	af00      	add	r7, sp, #0
+ 80007e6:	b480      	push	{r7}
+ 80007e8:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
   while (1)
- 80006a8:	e7fe      	b.n	80006a8 <BusFault_Handler+0x4>
+ 80007ea:	e7fe      	b.n	80007ea <BusFault_Handler+0x4>
 
-080006aa <UsageFault_Handler>:
+080007ec <UsageFault_Handler>:
 
 /**
   * @brief This function handles Undefined instruction or illegal state.
   */
 void UsageFault_Handler(void)
 {
- 80006aa:	b480      	push	{r7}
- 80006ac:	af00      	add	r7, sp, #0
+ 80007ec:	b480      	push	{r7}
+ 80007ee:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
   while (1)
- 80006ae:	e7fe      	b.n	80006ae <UsageFault_Handler+0x4>
+ 80007f0:	e7fe      	b.n	80007f0 <UsageFault_Handler+0x4>
 
-080006b0 <SVC_Handler>:
+080007f2 <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 80006b0:	b480      	push	{r7}
- 80006b2:	af00      	add	r7, sp, #0
+ 80007f2:	b480      	push	{r7}
+ 80007f4:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVCall_IRQn 0 */
   /* USER CODE BEGIN SVCall_IRQn 1 */
 
   /* USER CODE END SVCall_IRQn 1 */
 }
- 80006b4:	bf00      	nop
- 80006b6:	46bd      	mov	sp, r7
- 80006b8:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80006bc:	4770      	bx	lr
+ 80007f6:	bf00      	nop
+ 80007f8:	46bd      	mov	sp, r7
+ 80007fa:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80007fe:	4770      	bx	lr
 
-080006be <DebugMon_Handler>:
+08000800 <DebugMon_Handler>:
 
 /**
   * @brief This function handles Debug monitor.
   */
 void DebugMon_Handler(void)
 {
- 80006be:	b480      	push	{r7}
- 80006c0:	af00      	add	r7, sp, #0
+ 8000800:	b480      	push	{r7}
+ 8000802:	af00      	add	r7, sp, #0
 
   /* USER CODE END DebugMonitor_IRQn 0 */
   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 
   /* USER CODE END DebugMonitor_IRQn 1 */
 }
- 80006c2:	bf00      	nop
- 80006c4:	46bd      	mov	sp, r7
- 80006c6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80006ca:	4770      	bx	lr
+ 8000804:	bf00      	nop
+ 8000806:	46bd      	mov	sp, r7
+ 8000808:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800080c:	4770      	bx	lr
 
-080006cc <PendSV_Handler>:
+0800080e <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 80006cc:	b480      	push	{r7}
- 80006ce:	af00      	add	r7, sp, #0
+ 800080e:	b480      	push	{r7}
+ 8000810:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 80006d0:	bf00      	nop
- 80006d2:	46bd      	mov	sp, r7
- 80006d4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80006d8:	4770      	bx	lr
-	...
+ 8000812:	bf00      	nop
+ 8000814:	46bd      	mov	sp, r7
+ 8000816:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800081a:	4770      	bx	lr
 
-080006dc <SystemInit>:
+0800081c <SysTick_Handler>:
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+ 800081c:	b580      	push	{r7, lr}
+ 800081e:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+ 8000820:	f000 f8b6 	bl	8000990 <HAL_IncTick>
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+ 8000824:	bf00      	nop
+ 8000826:	bd80      	pop	{r7, pc}
+
+08000828 <SystemInit>:
   * @param  None
   * @retval None
   */
 
 void SystemInit(void)
 {
- 80006dc:	b480      	push	{r7}
- 80006de:	af00      	add	r7, sp, #0
+ 8000828:	b480      	push	{r7}
+ 800082a:	af00      	add	r7, sp, #0
   /* FPU settings ------------------------------------------------------------*/
   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
- 80006e0:	4b17      	ldr	r3, [pc, #92]	; (8000740 <SystemInit+0x64>)
- 80006e2:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 80006e6:	4a16      	ldr	r2, [pc, #88]	; (8000740 <SystemInit+0x64>)
- 80006e8:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
- 80006ec:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
+ 800082c:	4b17      	ldr	r3, [pc, #92]	; (800088c <SystemInit+0x64>)
+ 800082e:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8000832:	4a16      	ldr	r2, [pc, #88]	; (800088c <SystemInit+0x64>)
+ 8000834:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
+ 8000838:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
   #endif
 
   /* Reset the RCC clock configuration to the default reset state ------------*/
   /* Set MSION bit */
   RCC->CR |= RCC_CR_MSION;
- 80006f0:	4b14      	ldr	r3, [pc, #80]	; (8000744 <SystemInit+0x68>)
- 80006f2:	681b      	ldr	r3, [r3, #0]
- 80006f4:	4a13      	ldr	r2, [pc, #76]	; (8000744 <SystemInit+0x68>)
- 80006f6:	f043 0301 	orr.w	r3, r3, #1
- 80006fa:	6013      	str	r3, [r2, #0]
+ 800083c:	4b14      	ldr	r3, [pc, #80]	; (8000890 <SystemInit+0x68>)
+ 800083e:	681b      	ldr	r3, [r3, #0]
+ 8000840:	4a13      	ldr	r2, [pc, #76]	; (8000890 <SystemInit+0x68>)
+ 8000842:	f043 0301 	orr.w	r3, r3, #1
+ 8000846:	6013      	str	r3, [r2, #0]
 
   /* Reset CFGR register */
   RCC->CFGR = 0x00000000U;
- 80006fc:	4b11      	ldr	r3, [pc, #68]	; (8000744 <SystemInit+0x68>)
- 80006fe:	2200      	movs	r2, #0
- 8000700:	609a      	str	r2, [r3, #8]
+ 8000848:	4b11      	ldr	r3, [pc, #68]	; (8000890 <SystemInit+0x68>)
+ 800084a:	2200      	movs	r2, #0
+ 800084c:	609a      	str	r2, [r3, #8]
 
   /* Reset HSEON, CSSON , HSION, and PLLON bits */
   RCC->CR &= 0xEAF6FFFFU;
- 8000702:	4b10      	ldr	r3, [pc, #64]	; (8000744 <SystemInit+0x68>)
- 8000704:	681b      	ldr	r3, [r3, #0]
- 8000706:	4a0f      	ldr	r2, [pc, #60]	; (8000744 <SystemInit+0x68>)
- 8000708:	f023 53a8 	bic.w	r3, r3, #352321536	; 0x15000000
- 800070c:	f423 2310 	bic.w	r3, r3, #589824	; 0x90000
- 8000710:	6013      	str	r3, [r2, #0]
+ 800084e:	4b10      	ldr	r3, [pc, #64]	; (8000890 <SystemInit+0x68>)
+ 8000850:	681b      	ldr	r3, [r3, #0]
+ 8000852:	4a0f      	ldr	r2, [pc, #60]	; (8000890 <SystemInit+0x68>)
+ 8000854:	f023 53a8 	bic.w	r3, r3, #352321536	; 0x15000000
+ 8000858:	f423 2310 	bic.w	r3, r3, #589824	; 0x90000
+ 800085c:	6013      	str	r3, [r2, #0]
 
   /* Reset PLLCFGR register */
   RCC->PLLCFGR = 0x00001000U;
- 8000712:	4b0c      	ldr	r3, [pc, #48]	; (8000744 <SystemInit+0x68>)
- 8000714:	f44f 5280 	mov.w	r2, #4096	; 0x1000
- 8000718:	60da      	str	r2, [r3, #12]
+ 800085e:	4b0c      	ldr	r3, [pc, #48]	; (8000890 <SystemInit+0x68>)
+ 8000860:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 8000864:	60da      	str	r2, [r3, #12]
 
   /* Reset HSEBYP bit */
   RCC->CR &= 0xFFFBFFFFU;
- 800071a:	4b0a      	ldr	r3, [pc, #40]	; (8000744 <SystemInit+0x68>)
- 800071c:	681b      	ldr	r3, [r3, #0]
- 800071e:	4a09      	ldr	r2, [pc, #36]	; (8000744 <SystemInit+0x68>)
- 8000720:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
- 8000724:	6013      	str	r3, [r2, #0]
+ 8000866:	4b0a      	ldr	r3, [pc, #40]	; (8000890 <SystemInit+0x68>)
+ 8000868:	681b      	ldr	r3, [r3, #0]
+ 800086a:	4a09      	ldr	r2, [pc, #36]	; (8000890 <SystemInit+0x68>)
+ 800086c:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8000870:	6013      	str	r3, [r2, #0]
 
   /* Disable all interrupts */
   RCC->CIER = 0x00000000U;
- 8000726:	4b07      	ldr	r3, [pc, #28]	; (8000744 <SystemInit+0x68>)
- 8000728:	2200      	movs	r2, #0
- 800072a:	619a      	str	r2, [r3, #24]
+ 8000872:	4b07      	ldr	r3, [pc, #28]	; (8000890 <SystemInit+0x68>)
+ 8000874:	2200      	movs	r2, #0
+ 8000876:	619a      	str	r2, [r3, #24]
 
   /* Configure the Vector Table location add offset address ------------------*/
 #ifdef VECT_TAB_SRAM
   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 800072c:	4b04      	ldr	r3, [pc, #16]	; (8000740 <SystemInit+0x64>)
- 800072e:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
- 8000732:	609a      	str	r2, [r3, #8]
+ 8000878:	4b04      	ldr	r3, [pc, #16]	; (800088c <SystemInit+0x64>)
+ 800087a:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
+ 800087e:	609a      	str	r2, [r3, #8]
 #endif
 }
- 8000734:	bf00      	nop
- 8000736:	46bd      	mov	sp, r7
- 8000738:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800073c:	4770      	bx	lr
- 800073e:	bf00      	nop
- 8000740:	e000ed00 	.word	0xe000ed00
- 8000744:	40021000 	.word	0x40021000
+ 8000880:	bf00      	nop
+ 8000882:	46bd      	mov	sp, r7
+ 8000884:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000888:	4770      	bx	lr
+ 800088a:	bf00      	nop
+ 800088c:	e000ed00 	.word	0xe000ed00
+ 8000890:	40021000 	.word	0x40021000
 
-08000748 <SystemCoreClockUpdate>:
-  *
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate(void)
-{
- 8000748:	b480      	push	{r7}
- 800074a:	b087      	sub	sp, #28
- 800074c:	af00      	add	r7, sp, #0
-  uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
- 800074e:	2300      	movs	r3, #0
- 8000750:	60fb      	str	r3, [r7, #12]
- 8000752:	2300      	movs	r3, #0
- 8000754:	617b      	str	r3, [r7, #20]
- 8000756:	2300      	movs	r3, #0
- 8000758:	613b      	str	r3, [r7, #16]
- 800075a:	2302      	movs	r3, #2
- 800075c:	60bb      	str	r3, [r7, #8]
- 800075e:	2300      	movs	r3, #0
- 8000760:	607b      	str	r3, [r7, #4]
- 8000762:	2302      	movs	r3, #2
- 8000764:	603b      	str	r3, [r7, #0]
-
-  /* Get MSI Range frequency--------------------------------------------------*/
-  if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
- 8000766:	4b4f      	ldr	r3, [pc, #316]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000768:	681b      	ldr	r3, [r3, #0]
- 800076a:	f003 0308 	and.w	r3, r3, #8
- 800076e:	2b00      	cmp	r3, #0
- 8000770:	d107      	bne.n	8000782 <SystemCoreClockUpdate+0x3a>
-  { /* MSISRANGE from RCC_CSR applies */
-    msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
- 8000772:	4b4c      	ldr	r3, [pc, #304]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000774:	f8d3 3094 	ldr.w	r3, [r3, #148]	; 0x94
- 8000778:	0a1b      	lsrs	r3, r3, #8
- 800077a:	f003 030f 	and.w	r3, r3, #15
- 800077e:	617b      	str	r3, [r7, #20]
- 8000780:	e005      	b.n	800078e <SystemCoreClockUpdate+0x46>
-  }
-  else
-  { /* MSIRANGE from RCC_CR applies */
-    msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
- 8000782:	4b48      	ldr	r3, [pc, #288]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000784:	681b      	ldr	r3, [r3, #0]
- 8000786:	091b      	lsrs	r3, r3, #4
- 8000788:	f003 030f 	and.w	r3, r3, #15
- 800078c:	617b      	str	r3, [r7, #20]
-  }
-  /*MSI frequency range in HZ*/
-  msirange = MSIRangeTable[msirange];
- 800078e:	4a46      	ldr	r2, [pc, #280]	; (80008a8 <SystemCoreClockUpdate+0x160>)
- 8000790:	697b      	ldr	r3, [r7, #20]
- 8000792:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8000796:	617b      	str	r3, [r7, #20]
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (RCC->CFGR & RCC_CFGR_SWS)
- 8000798:	4b42      	ldr	r3, [pc, #264]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 800079a:	689b      	ldr	r3, [r3, #8]
- 800079c:	f003 030c 	and.w	r3, r3, #12
- 80007a0:	2b0c      	cmp	r3, #12
- 80007a2:	d865      	bhi.n	8000870 <SystemCoreClockUpdate+0x128>
- 80007a4:	a201      	add	r2, pc, #4	; (adr r2, 80007ac <SystemCoreClockUpdate+0x64>)
- 80007a6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 80007aa:	bf00      	nop
- 80007ac:	080007e1 	.word	0x080007e1
- 80007b0:	08000871 	.word	0x08000871
- 80007b4:	08000871 	.word	0x08000871
- 80007b8:	08000871 	.word	0x08000871
- 80007bc:	080007e9 	.word	0x080007e9
- 80007c0:	08000871 	.word	0x08000871
- 80007c4:	08000871 	.word	0x08000871
- 80007c8:	08000871 	.word	0x08000871
- 80007cc:	080007f1 	.word	0x080007f1
- 80007d0:	08000871 	.word	0x08000871
- 80007d4:	08000871 	.word	0x08000871
- 80007d8:	08000871 	.word	0x08000871
- 80007dc:	080007f9 	.word	0x080007f9
-  {
-    case 0x00:  /* MSI used as system clock source */
-      SystemCoreClock = msirange;
- 80007e0:	4a32      	ldr	r2, [pc, #200]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 80007e2:	697b      	ldr	r3, [r7, #20]
- 80007e4:	6013      	str	r3, [r2, #0]
-      break;
- 80007e6:	e047      	b.n	8000878 <SystemCoreClockUpdate+0x130>
-
-    case 0x04:  /* HSI used as system clock source */
-      SystemCoreClock = HSI_VALUE;
- 80007e8:	4b30      	ldr	r3, [pc, #192]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 80007ea:	4a31      	ldr	r2, [pc, #196]	; (80008b0 <SystemCoreClockUpdate+0x168>)
- 80007ec:	601a      	str	r2, [r3, #0]
-      break;
- 80007ee:	e043      	b.n	8000878 <SystemCoreClockUpdate+0x130>
-
-    case 0x08:  /* HSE used as system clock source */
-      SystemCoreClock = HSE_VALUE;
- 80007f0:	4b2e      	ldr	r3, [pc, #184]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 80007f2:	4a30      	ldr	r2, [pc, #192]	; (80008b4 <SystemCoreClockUpdate+0x16c>)
- 80007f4:	601a      	str	r2, [r3, #0]
-      break;
- 80007f6:	e03f      	b.n	8000878 <SystemCoreClockUpdate+0x130>
-
-    case 0x0C:  /* PLL used as system clock  source */
-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
-         SYSCLK = PLL_VCO / PLLR
-         */
-      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
- 80007f8:	4b2a      	ldr	r3, [pc, #168]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 80007fa:	68db      	ldr	r3, [r3, #12]
- 80007fc:	f003 0303 	and.w	r3, r3, #3
- 8000800:	607b      	str	r3, [r7, #4]
-      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
- 8000802:	4b28      	ldr	r3, [pc, #160]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000804:	68db      	ldr	r3, [r3, #12]
- 8000806:	091b      	lsrs	r3, r3, #4
- 8000808:	f003 0307 	and.w	r3, r3, #7
- 800080c:	3301      	adds	r3, #1
- 800080e:	603b      	str	r3, [r7, #0]
-
-      switch (pllsource)
- 8000810:	687b      	ldr	r3, [r7, #4]
- 8000812:	2b02      	cmp	r3, #2
- 8000814:	d002      	beq.n	800081c <SystemCoreClockUpdate+0xd4>
- 8000816:	2b03      	cmp	r3, #3
- 8000818:	d006      	beq.n	8000828 <SystemCoreClockUpdate+0xe0>
- 800081a:	e00b      	b.n	8000834 <SystemCoreClockUpdate+0xec>
-      {
-        case 0x02:  /* HSI used as PLL clock source */
-          pllvco = (HSI_VALUE / pllm);
- 800081c:	4a24      	ldr	r2, [pc, #144]	; (80008b0 <SystemCoreClockUpdate+0x168>)
- 800081e:	683b      	ldr	r3, [r7, #0]
- 8000820:	fbb2 f3f3 	udiv	r3, r2, r3
- 8000824:	613b      	str	r3, [r7, #16]
-          break;
- 8000826:	e00b      	b.n	8000840 <SystemCoreClockUpdate+0xf8>
-
-        case 0x03:  /* HSE used as PLL clock source */
-          pllvco = (HSE_VALUE / pllm);
- 8000828:	4a22      	ldr	r2, [pc, #136]	; (80008b4 <SystemCoreClockUpdate+0x16c>)
- 800082a:	683b      	ldr	r3, [r7, #0]
- 800082c:	fbb2 f3f3 	udiv	r3, r2, r3
- 8000830:	613b      	str	r3, [r7, #16]
-          break;
- 8000832:	e005      	b.n	8000840 <SystemCoreClockUpdate+0xf8>
-
-        default:    /* MSI used as PLL clock source */
-          pllvco = (msirange / pllm);
- 8000834:	697a      	ldr	r2, [r7, #20]
- 8000836:	683b      	ldr	r3, [r7, #0]
- 8000838:	fbb2 f3f3 	udiv	r3, r2, r3
- 800083c:	613b      	str	r3, [r7, #16]
-          break;
- 800083e:	bf00      	nop
-      }
-      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
- 8000840:	4b18      	ldr	r3, [pc, #96]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000842:	68db      	ldr	r3, [r3, #12]
- 8000844:	0a1b      	lsrs	r3, r3, #8
- 8000846:	f003 027f 	and.w	r2, r3, #127	; 0x7f
- 800084a:	693b      	ldr	r3, [r7, #16]
- 800084c:	fb02 f303 	mul.w	r3, r2, r3
- 8000850:	613b      	str	r3, [r7, #16]
-      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
- 8000852:	4b14      	ldr	r3, [pc, #80]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 8000854:	68db      	ldr	r3, [r3, #12]
- 8000856:	0e5b      	lsrs	r3, r3, #25
- 8000858:	f003 0303 	and.w	r3, r3, #3
- 800085c:	3301      	adds	r3, #1
- 800085e:	005b      	lsls	r3, r3, #1
- 8000860:	60bb      	str	r3, [r7, #8]
-      SystemCoreClock = pllvco/pllr;
- 8000862:	693a      	ldr	r2, [r7, #16]
- 8000864:	68bb      	ldr	r3, [r7, #8]
- 8000866:	fbb2 f3f3 	udiv	r3, r2, r3
- 800086a:	4a10      	ldr	r2, [pc, #64]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 800086c:	6013      	str	r3, [r2, #0]
-      break;
- 800086e:	e003      	b.n	8000878 <SystemCoreClockUpdate+0x130>
-
-    default:
-      SystemCoreClock = msirange;
- 8000870:	4a0e      	ldr	r2, [pc, #56]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 8000872:	697b      	ldr	r3, [r7, #20]
- 8000874:	6013      	str	r3, [r2, #0]
-      break;
- 8000876:	bf00      	nop
-  }
-  /* Compute HCLK clock frequency --------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
- 8000878:	4b0a      	ldr	r3, [pc, #40]	; (80008a4 <SystemCoreClockUpdate+0x15c>)
- 800087a:	689b      	ldr	r3, [r3, #8]
- 800087c:	091b      	lsrs	r3, r3, #4
- 800087e:	f003 030f 	and.w	r3, r3, #15
- 8000882:	4a0d      	ldr	r2, [pc, #52]	; (80008b8 <SystemCoreClockUpdate+0x170>)
- 8000884:	5cd3      	ldrb	r3, [r2, r3]
- 8000886:	60fb      	str	r3, [r7, #12]
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;
- 8000888:	4b08      	ldr	r3, [pc, #32]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 800088a:	681a      	ldr	r2, [r3, #0]
- 800088c:	68fb      	ldr	r3, [r7, #12]
- 800088e:	fa22 f303 	lsr.w	r3, r2, r3
- 8000892:	4a06      	ldr	r2, [pc, #24]	; (80008ac <SystemCoreClockUpdate+0x164>)
- 8000894:	6013      	str	r3, [r2, #0]
-}
- 8000896:	bf00      	nop
- 8000898:	371c      	adds	r7, #28
- 800089a:	46bd      	mov	sp, r7
- 800089c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80008a0:	4770      	bx	lr
- 80008a2:	bf00      	nop
- 80008a4:	40021000 	.word	0x40021000
- 80008a8:	080009cc 	.word	0x080009cc
- 80008ac:	20000000 	.word	0x20000000
- 80008b0:	00f42400 	.word	0x00f42400
- 80008b4:	007a1200 	.word	0x007a1200
- 80008b8:	080009bc 	.word	0x080009bc
-
-080008bc <Reset_Handler>:
+08000894 <Reset_Handler>:
 
     .section	.text.Reset_Handler
 	.weak	Reset_Handler
 	.type	Reset_Handler, %function
 Reset_Handler:
   ldr   sp, =_estack    /* Set stack pointer */
- 80008bc:	f8df d034 	ldr.w	sp, [pc, #52]	; 80008f4 <LoopForever+0x2>
+ 8000894:	f8df d034 	ldr.w	sp, [pc, #52]	; 80008cc <LoopForever+0x2>
 
 /* Call the clock system initialization function.*/
     bl  SystemInit
- 80008c0:	f7ff ff0c 	bl	80006dc <SystemInit>
+ 8000898:	f7ff ffc6 	bl	8000828 <SystemInit>
 
 /* Copy the data segment initializers from flash to SRAM */
   movs	r1, #0
- 80008c4:	2100      	movs	r1, #0
+ 800089c:	2100      	movs	r1, #0
   b	LoopCopyDataInit
- 80008c6:	e003      	b.n	80008d0 <LoopCopyDataInit>
+ 800089e:	e003      	b.n	80008a8 <LoopCopyDataInit>
 
-080008c8 <CopyDataInit>:
+080008a0 <CopyDataInit>:
 
 CopyDataInit:
 	ldr	r3, =_sidata
- 80008c8:	4b0b      	ldr	r3, [pc, #44]	; (80008f8 <LoopForever+0x6>)
+ 80008a0:	4b0b      	ldr	r3, [pc, #44]	; (80008d0 <LoopForever+0x6>)
 	ldr	r3, [r3, r1]
- 80008ca:	585b      	ldr	r3, [r3, r1]
+ 80008a2:	585b      	ldr	r3, [r3, r1]
 	str	r3, [r0, r1]
- 80008cc:	5043      	str	r3, [r0, r1]
+ 80008a4:	5043      	str	r3, [r0, r1]
 	adds	r1, r1, #4
- 80008ce:	3104      	adds	r1, #4
+ 80008a6:	3104      	adds	r1, #4
 
-080008d0 <LoopCopyDataInit>:
+080008a8 <LoopCopyDataInit>:
 
 LoopCopyDataInit:
 	ldr	r0, =_sdata
- 80008d0:	480a      	ldr	r0, [pc, #40]	; (80008fc <LoopForever+0xa>)
+ 80008a8:	480a      	ldr	r0, [pc, #40]	; (80008d4 <LoopForever+0xa>)
 	ldr	r3, =_edata
- 80008d2:	4b0b      	ldr	r3, [pc, #44]	; (8000900 <LoopForever+0xe>)
+ 80008aa:	4b0b      	ldr	r3, [pc, #44]	; (80008d8 <LoopForever+0xe>)
 	adds	r2, r0, r1
- 80008d4:	1842      	adds	r2, r0, r1
+ 80008ac:	1842      	adds	r2, r0, r1
 	cmp	r2, r3
- 80008d6:	429a      	cmp	r2, r3
+ 80008ae:	429a      	cmp	r2, r3
 	bcc	CopyDataInit
- 80008d8:	d3f6      	bcc.n	80008c8 <CopyDataInit>
+ 80008b0:	d3f6      	bcc.n	80008a0 <CopyDataInit>
 	ldr	r2, =_sbss
- 80008da:	4a0a      	ldr	r2, [pc, #40]	; (8000904 <LoopForever+0x12>)
+ 80008b2:	4a0a      	ldr	r2, [pc, #40]	; (80008dc <LoopForever+0x12>)
 	b	LoopFillZerobss
- 80008dc:	e002      	b.n	80008e4 <LoopFillZerobss>
+ 80008b4:	e002      	b.n	80008bc <LoopFillZerobss>
 
-080008de <FillZerobss>:
+080008b6 <FillZerobss>:
 /* Zero fill the bss segment. */
 FillZerobss:
 	movs	r3, #0
- 80008de:	2300      	movs	r3, #0
+ 80008b6:	2300      	movs	r3, #0
 	str	r3, [r2], #4
- 80008e0:	f842 3b04 	str.w	r3, [r2], #4
+ 80008b8:	f842 3b04 	str.w	r3, [r2], #4
 
-080008e4 <LoopFillZerobss>:
+080008bc <LoopFillZerobss>:
 
 LoopFillZerobss:
 	ldr	r3, = _ebss
- 80008e4:	4b08      	ldr	r3, [pc, #32]	; (8000908 <LoopForever+0x16>)
+ 80008bc:	4b08      	ldr	r3, [pc, #32]	; (80008e0 <LoopForever+0x16>)
 	cmp	r2, r3
- 80008e6:	429a      	cmp	r2, r3
+ 80008be:	429a      	cmp	r2, r3
 	bcc	FillZerobss
- 80008e8:	d3f9      	bcc.n	80008de <FillZerobss>
+ 80008c0:	d3f9      	bcc.n	80008b6 <FillZerobss>
 
 /* Call static constructors */
     bl __libc_init_array
- 80008ea:	f000 f837 	bl	800095c <__libc_init_array>
+ 80008c2:	f000 fa8d 	bl	8000de0 <__libc_init_array>
 /* Call the application's entry point.*/
 	bl	main
- 80008ee:	f7ff fe7f 	bl	80005f0 <main>
+ 80008c6:	f7ff fe6b 	bl	80005a0 <main>
 
-080008f2 <LoopForever>:
+080008ca <LoopForever>:
 
 LoopForever:
     b LoopForever
- 80008f2:	e7fe      	b.n	80008f2 <LoopForever>
+ 80008ca:	e7fe      	b.n	80008ca <LoopForever>
   ldr   sp, =_estack    /* Set stack pointer */
- 80008f4:	20018000 	.word	0x20018000
+ 80008cc:	20018000 	.word	0x20018000
 	ldr	r3, =_sidata
- 80008f8:	08000a04 	.word	0x08000a04
+ 80008d0:	08000e48 	.word	0x08000e48
 	ldr	r0, =_sdata
- 80008fc:	20000000 	.word	0x20000000
+ 80008d4:	20000000 	.word	0x20000000
 	ldr	r3, =_edata
- 8000900:	20000004 	.word	0x20000004
+ 80008d8:	2000000c 	.word	0x2000000c
 	ldr	r2, =_sbss
- 8000904:	20000004 	.word	0x20000004
+ 80008dc:	2000000c 	.word	0x2000000c
 	ldr	r3, = _ebss
- 8000908:	20000028 	.word	0x20000028
+ 80008e0:	20000050 	.word	0x20000050
 
-0800090c <ADC1_2_IRQHandler>:
+080008e4 <ADC1_2_IRQHandler>:
  * @retval : None
 */
     .section	.text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
 	b	Infinite_Loop
- 800090c:	e7fe      	b.n	800090c <ADC1_2_IRQHandler>
+ 80008e4:	e7fe      	b.n	80008e4 <ADC1_2_IRQHandler>
+
+080008e6 <HAL_Init>:
+  *         each 1ms in the SysTick_Handler() interrupt handler.
+  *
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 80008e6:	b580      	push	{r7, lr}
+ 80008e8:	b082      	sub	sp, #8
+ 80008ea:	af00      	add	r7, sp, #0
+  HAL_StatusTypeDef  status = HAL_OK;
+ 80008ec:	2300      	movs	r3, #0
+ 80008ee:	71fb      	strb	r3, [r7, #7]
+#if (PREFETCH_ENABLE != 0)
+  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+#endif /* PREFETCH_ENABLE */
+
+  /* Set Interrupt Group Priority */
+  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 80008f0:	2003      	movs	r0, #3
+ 80008f2:	f000 f91f 	bl	8000b34 <HAL_NVIC_SetPriorityGrouping>
+
+  /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
+  if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
+ 80008f6:	2000      	movs	r0, #0
+ 80008f8:	f000 f80e 	bl	8000918 <HAL_InitTick>
+ 80008fc:	4603      	mov	r3, r0
+ 80008fe:	2b00      	cmp	r3, #0
+ 8000900:	d002      	beq.n	8000908 <HAL_Init+0x22>
+  {
+    status = HAL_ERROR;
+ 8000902:	2301      	movs	r3, #1
+ 8000904:	71fb      	strb	r3, [r7, #7]
+ 8000906:	e001      	b.n	800090c <HAL_Init+0x26>
+  }
+  else
+  {
+    /* Init the low level hardware */
+    HAL_MspInit();
+ 8000908:	f7ff ff20 	bl	800074c <HAL_MspInit>
+  }
+
+  /* Return function status */
+  return status;
+ 800090c:	79fb      	ldrb	r3, [r7, #7]
+}
+ 800090e:	4618      	mov	r0, r3
+ 8000910:	3708      	adds	r7, #8
+ 8000912:	46bd      	mov	sp, r7
+ 8000914:	bd80      	pop	{r7, pc}
 	...
 
-08000910 <LL_InitTick>:
-  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
-  * @param  Ticks Number of ticks
+08000918 <HAL_InitTick>:
+  *       implementation  in user file.
+  * @param TickPriority  Tick interrupt priority.
+  * @retval HAL status
+  */
+__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 8000918:	b580      	push	{r7, lr}
+ 800091a:	b084      	sub	sp, #16
+ 800091c:	af00      	add	r7, sp, #0
+ 800091e:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef  status = HAL_OK;
+ 8000920:	2300      	movs	r3, #0
+ 8000922:	73fb      	strb	r3, [r7, #15]
+
+  /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/
+  if ((uint32_t)uwTickFreq != 0U)
+ 8000924:	4b17      	ldr	r3, [pc, #92]	; (8000984 <HAL_InitTick+0x6c>)
+ 8000926:	781b      	ldrb	r3, [r3, #0]
+ 8000928:	2b00      	cmp	r3, #0
+ 800092a:	d023      	beq.n	8000974 <HAL_InitTick+0x5c>
+  {
+    /*Configure the SysTick to have interrupt in 1ms time basis*/
+    if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)uwTickFreq)) == 0U)
+ 800092c:	4b16      	ldr	r3, [pc, #88]	; (8000988 <HAL_InitTick+0x70>)
+ 800092e:	681a      	ldr	r2, [r3, #0]
+ 8000930:	4b14      	ldr	r3, [pc, #80]	; (8000984 <HAL_InitTick+0x6c>)
+ 8000932:	781b      	ldrb	r3, [r3, #0]
+ 8000934:	4619      	mov	r1, r3
+ 8000936:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
+ 800093a:	fbb3 f3f1 	udiv	r3, r3, r1
+ 800093e:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8000942:	4618      	mov	r0, r3
+ 8000944:	f000 f91d 	bl	8000b82 <HAL_SYSTICK_Config>
+ 8000948:	4603      	mov	r3, r0
+ 800094a:	2b00      	cmp	r3, #0
+ 800094c:	d10f      	bne.n	800096e <HAL_InitTick+0x56>
+    {
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 800094e:	687b      	ldr	r3, [r7, #4]
+ 8000950:	2b0f      	cmp	r3, #15
+ 8000952:	d809      	bhi.n	8000968 <HAL_InitTick+0x50>
+      {
+        HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
+ 8000954:	2200      	movs	r2, #0
+ 8000956:	6879      	ldr	r1, [r7, #4]
+ 8000958:	f04f 30ff 	mov.w	r0, #4294967295
+ 800095c:	f000 f8f5 	bl	8000b4a <HAL_NVIC_SetPriority>
+        uwTickPrio = TickPriority;
+ 8000960:	4a0a      	ldr	r2, [pc, #40]	; (800098c <HAL_InitTick+0x74>)
+ 8000962:	687b      	ldr	r3, [r7, #4]
+ 8000964:	6013      	str	r3, [r2, #0]
+ 8000966:	e007      	b.n	8000978 <HAL_InitTick+0x60>
+      }
+      else
+      {
+        status = HAL_ERROR;
+ 8000968:	2301      	movs	r3, #1
+ 800096a:	73fb      	strb	r3, [r7, #15]
+ 800096c:	e004      	b.n	8000978 <HAL_InitTick+0x60>
+      }
+    }
+    else
+    {
+      status = HAL_ERROR;
+ 800096e:	2301      	movs	r3, #1
+ 8000970:	73fb      	strb	r3, [r7, #15]
+ 8000972:	e001      	b.n	8000978 <HAL_InitTick+0x60>
+    }
+  }
+  else
+  {
+    status = HAL_ERROR;
+ 8000974:	2301      	movs	r3, #1
+ 8000976:	73fb      	strb	r3, [r7, #15]
+  }
+
+  /* Return function status */
+  return status;
+ 8000978:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 800097a:	4618      	mov	r0, r3
+ 800097c:	3710      	adds	r7, #16
+ 800097e:	46bd      	mov	sp, r7
+ 8000980:	bd80      	pop	{r7, pc}
+ 8000982:	bf00      	nop
+ 8000984:	20000008 	.word	0x20000008
+ 8000988:	20000000 	.word	0x20000000
+ 800098c:	20000004 	.word	0x20000004
+
+08000990 <HAL_IncTick>:
+ * @note This function is declared as __weak to be overwritten in case of other
+  *      implementations in user file.
   * @retval None
   */
-__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
+__weak void HAL_IncTick(void)
 {
- 8000910:	b480      	push	{r7}
- 8000912:	b083      	sub	sp, #12
- 8000914:	af00      	add	r7, sp, #0
- 8000916:	6078      	str	r0, [r7, #4]
- 8000918:	6039      	str	r1, [r7, #0]
-  /* Configure the SysTick to have interrupt in 1ms time base */
-  SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
- 800091a:	687a      	ldr	r2, [r7, #4]
- 800091c:	683b      	ldr	r3, [r7, #0]
- 800091e:	fbb2 f3f3 	udiv	r3, r2, r3
- 8000922:	4a07      	ldr	r2, [pc, #28]	; (8000940 <LL_InitTick+0x30>)
- 8000924:	3b01      	subs	r3, #1
- 8000926:	6053      	str	r3, [r2, #4]
-  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
- 8000928:	4b05      	ldr	r3, [pc, #20]	; (8000940 <LL_InitTick+0x30>)
- 800092a:	2200      	movs	r2, #0
- 800092c:	609a      	str	r2, [r3, #8]
+ 8000990:	b480      	push	{r7}
+ 8000992:	af00      	add	r7, sp, #0
+  uwTick += (uint32_t)uwTickFreq;
+ 8000994:	4b06      	ldr	r3, [pc, #24]	; (80009b0 <HAL_IncTick+0x20>)
+ 8000996:	781b      	ldrb	r3, [r3, #0]
+ 8000998:	461a      	mov	r2, r3
+ 800099a:	4b06      	ldr	r3, [pc, #24]	; (80009b4 <HAL_IncTick+0x24>)
+ 800099c:	681b      	ldr	r3, [r3, #0]
+ 800099e:	4413      	add	r3, r2
+ 80009a0:	4a04      	ldr	r2, [pc, #16]	; (80009b4 <HAL_IncTick+0x24>)
+ 80009a2:	6013      	str	r3, [r2, #0]
+}
+ 80009a4:	bf00      	nop
+ 80009a6:	46bd      	mov	sp, r7
+ 80009a8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80009ac:	4770      	bx	lr
+ 80009ae:	bf00      	nop
+ 80009b0:	20000008 	.word	0x20000008
+ 80009b4:	2000004c 	.word	0x2000004c
+
+080009b8 <HAL_GetTick>:
+  * @note This function is declared as __weak to be overwritten in case of other
+  *       implementations in user file.
+  * @retval tick value
+  */
+__weak uint32_t HAL_GetTick(void)
+{
+ 80009b8:	b480      	push	{r7}
+ 80009ba:	af00      	add	r7, sp, #0
+  return uwTick;
+ 80009bc:	4b03      	ldr	r3, [pc, #12]	; (80009cc <HAL_GetTick+0x14>)
+ 80009be:	681b      	ldr	r3, [r3, #0]
+}
+ 80009c0:	4618      	mov	r0, r3
+ 80009c2:	46bd      	mov	sp, r7
+ 80009c4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80009c8:	4770      	bx	lr
+ 80009ca:	bf00      	nop
+ 80009cc:	2000004c 	.word	0x2000004c
+
+080009d0 <__NVIC_SetPriorityGrouping>:
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 80009d0:	b480      	push	{r7}
+ 80009d2:	b085      	sub	sp, #20
+ 80009d4:	af00      	add	r7, sp, #0
+ 80009d6:	6078      	str	r0, [r7, #4]
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+ 80009d8:	687b      	ldr	r3, [r7, #4]
+ 80009da:	f003 0307 	and.w	r3, r3, #7
+ 80009de:	60fb      	str	r3, [r7, #12]
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+ 80009e0:	4b0c      	ldr	r3, [pc, #48]	; (8000a14 <__NVIC_SetPriorityGrouping+0x44>)
+ 80009e2:	68db      	ldr	r3, [r3, #12]
+ 80009e4:	60bb      	str	r3, [r7, #8]
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+ 80009e6:	68ba      	ldr	r2, [r7, #8]
+ 80009e8:	f64f 03ff 	movw	r3, #63743	; 0xf8ff
+ 80009ec:	4013      	ands	r3, r2
+ 80009ee:	60bb      	str	r3, [r7, #8]
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+ 80009f0:	68fb      	ldr	r3, [r7, #12]
+ 80009f2:	021a      	lsls	r2, r3, #8
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 80009f4:	68bb      	ldr	r3, [r7, #8]
+ 80009f6:	4313      	orrs	r3, r2
+  reg_value  =  (reg_value                                   |
+ 80009f8:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
+ 80009fc:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8000a00:	60bb      	str	r3, [r7, #8]
+  SCB->AIRCR =  reg_value;
+ 8000a02:	4a04      	ldr	r2, [pc, #16]	; (8000a14 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000a04:	68bb      	ldr	r3, [r7, #8]
+ 8000a06:	60d3      	str	r3, [r2, #12]
+}
+ 8000a08:	bf00      	nop
+ 8000a0a:	3714      	adds	r7, #20
+ 8000a0c:	46bd      	mov	sp, r7
+ 8000a0e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000a12:	4770      	bx	lr
+ 8000a14:	e000ed00 	.word	0xe000ed00
+
+08000a18 <__NVIC_GetPriorityGrouping>:
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 8000a18:	b480      	push	{r7}
+ 8000a1a:	af00      	add	r7, sp, #0
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 8000a1c:	4b04      	ldr	r3, [pc, #16]	; (8000a30 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000a1e:	68db      	ldr	r3, [r3, #12]
+ 8000a20:	0a1b      	lsrs	r3, r3, #8
+ 8000a22:	f003 0307 	and.w	r3, r3, #7
+}
+ 8000a26:	4618      	mov	r0, r3
+ 8000a28:	46bd      	mov	sp, r7
+ 8000a2a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000a2e:	4770      	bx	lr
+ 8000a30:	e000ed00 	.word	0xe000ed00
+
+08000a34 <__NVIC_SetPriority>:
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 8000a34:	b480      	push	{r7}
+ 8000a36:	b083      	sub	sp, #12
+ 8000a38:	af00      	add	r7, sp, #0
+ 8000a3a:	4603      	mov	r3, r0
+ 8000a3c:	6039      	str	r1, [r7, #0]
+ 8000a3e:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 8000a40:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000a44:	2b00      	cmp	r3, #0
+ 8000a46:	db0a      	blt.n	8000a5e <__NVIC_SetPriority+0x2a>
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000a48:	683b      	ldr	r3, [r7, #0]
+ 8000a4a:	b2da      	uxtb	r2, r3
+ 8000a4c:	490c      	ldr	r1, [pc, #48]	; (8000a80 <__NVIC_SetPriority+0x4c>)
+ 8000a4e:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000a52:	0112      	lsls	r2, r2, #4
+ 8000a54:	b2d2      	uxtb	r2, r2
+ 8000a56:	440b      	add	r3, r1
+ 8000a58:	f883 2300 	strb.w	r2, [r3, #768]	; 0x300
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+ 8000a5c:	e00a      	b.n	8000a74 <__NVIC_SetPriority+0x40>
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000a5e:	683b      	ldr	r3, [r7, #0]
+ 8000a60:	b2da      	uxtb	r2, r3
+ 8000a62:	4908      	ldr	r1, [pc, #32]	; (8000a84 <__NVIC_SetPriority+0x50>)
+ 8000a64:	79fb      	ldrb	r3, [r7, #7]
+ 8000a66:	f003 030f 	and.w	r3, r3, #15
+ 8000a6a:	3b04      	subs	r3, #4
+ 8000a6c:	0112      	lsls	r2, r2, #4
+ 8000a6e:	b2d2      	uxtb	r2, r2
+ 8000a70:	440b      	add	r3, r1
+ 8000a72:	761a      	strb	r2, [r3, #24]
+}
+ 8000a74:	bf00      	nop
+ 8000a76:	370c      	adds	r7, #12
+ 8000a78:	46bd      	mov	sp, r7
+ 8000a7a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000a7e:	4770      	bx	lr
+ 8000a80:	e000e100 	.word	0xe000e100
+ 8000a84:	e000ed00 	.word	0xe000ed00
+
+08000a88 <NVIC_EncodePriority>:
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 8000a88:	b480      	push	{r7}
+ 8000a8a:	b089      	sub	sp, #36	; 0x24
+ 8000a8c:	af00      	add	r7, sp, #0
+ 8000a8e:	60f8      	str	r0, [r7, #12]
+ 8000a90:	60b9      	str	r1, [r7, #8]
+ 8000a92:	607a      	str	r2, [r7, #4]
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+ 8000a94:	68fb      	ldr	r3, [r7, #12]
+ 8000a96:	f003 0307 	and.w	r3, r3, #7
+ 8000a9a:	61fb      	str	r3, [r7, #28]
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 8000a9c:	69fb      	ldr	r3, [r7, #28]
+ 8000a9e:	f1c3 0307 	rsb	r3, r3, #7
+ 8000aa2:	2b04      	cmp	r3, #4
+ 8000aa4:	bf28      	it	cs
+ 8000aa6:	2304      	movcs	r3, #4
+ 8000aa8:	61bb      	str	r3, [r7, #24]
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 8000aaa:	69fb      	ldr	r3, [r7, #28]
+ 8000aac:	3304      	adds	r3, #4
+ 8000aae:	2b06      	cmp	r3, #6
+ 8000ab0:	d902      	bls.n	8000ab8 <NVIC_EncodePriority+0x30>
+ 8000ab2:	69fb      	ldr	r3, [r7, #28]
+ 8000ab4:	3b03      	subs	r3, #3
+ 8000ab6:	e000      	b.n	8000aba <NVIC_EncodePriority+0x32>
+ 8000ab8:	2300      	movs	r3, #0
+ 8000aba:	617b      	str	r3, [r7, #20]
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000abc:	f04f 32ff 	mov.w	r2, #4294967295
+ 8000ac0:	69bb      	ldr	r3, [r7, #24]
+ 8000ac2:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ac6:	43da      	mvns	r2, r3
+ 8000ac8:	68bb      	ldr	r3, [r7, #8]
+ 8000aca:	401a      	ands	r2, r3
+ 8000acc:	697b      	ldr	r3, [r7, #20]
+ 8000ace:	409a      	lsls	r2, r3
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+ 8000ad0:	f04f 31ff 	mov.w	r1, #4294967295
+ 8000ad4:	697b      	ldr	r3, [r7, #20]
+ 8000ad6:	fa01 f303 	lsl.w	r3, r1, r3
+ 8000ada:	43d9      	mvns	r1, r3
+ 8000adc:	687b      	ldr	r3, [r7, #4]
+ 8000ade:	400b      	ands	r3, r1
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000ae0:	4313      	orrs	r3, r2
+         );
+}
+ 8000ae2:	4618      	mov	r0, r3
+ 8000ae4:	3724      	adds	r7, #36	; 0x24
+ 8000ae6:	46bd      	mov	sp, r7
+ 8000ae8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000aec:	4770      	bx	lr
+	...
+
+08000af0 <SysTick_Config>:
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ 8000af0:	b580      	push	{r7, lr}
+ 8000af2:	b082      	sub	sp, #8
+ 8000af4:	af00      	add	r7, sp, #0
+ 8000af6:	6078      	str	r0, [r7, #4]
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ 8000af8:	687b      	ldr	r3, [r7, #4]
+ 8000afa:	3b01      	subs	r3, #1
+ 8000afc:	f1b3 7f80 	cmp.w	r3, #16777216	; 0x1000000
+ 8000b00:	d301      	bcc.n	8000b06 <SysTick_Config+0x16>
+  {
+    return (1UL);                                                   /* Reload value impossible */
+ 8000b02:	2301      	movs	r3, #1
+ 8000b04:	e00f      	b.n	8000b26 <SysTick_Config+0x36>
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+ 8000b06:	4a0a      	ldr	r2, [pc, #40]	; (8000b30 <SysTick_Config+0x40>)
+ 8000b08:	687b      	ldr	r3, [r7, #4]
+ 8000b0a:	3b01      	subs	r3, #1
+ 8000b0c:	6053      	str	r3, [r2, #4]
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ 8000b0e:	210f      	movs	r1, #15
+ 8000b10:	f04f 30ff 	mov.w	r0, #4294967295
+ 8000b14:	f7ff ff8e 	bl	8000a34 <__NVIC_SetPriority>
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+ 8000b18:	4b05      	ldr	r3, [pc, #20]	; (8000b30 <SysTick_Config+0x40>)
+ 8000b1a:	2200      	movs	r2, #0
+ 8000b1c:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 800092e:	4b04      	ldr	r3, [pc, #16]	; (8000940 <LL_InitTick+0x30>)
- 8000930:	2205      	movs	r2, #5
- 8000932:	601a      	str	r2, [r3, #0]
-                   SysTick_CTRL_ENABLE_Msk;
+ 8000b1e:	4b04      	ldr	r3, [pc, #16]	; (8000b30 <SysTick_Config+0x40>)
+ 8000b20:	2207      	movs	r2, #7
+ 8000b22:	601a      	str	r2, [r3, #0]
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+ 8000b24:	2300      	movs	r3, #0
 }
- 8000934:	bf00      	nop
- 8000936:	370c      	adds	r7, #12
- 8000938:	46bd      	mov	sp, r7
- 800093a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800093e:	4770      	bx	lr
- 8000940:	e000e010 	.word	0xe000e010
+ 8000b26:	4618      	mov	r0, r3
+ 8000b28:	3708      	adds	r7, #8
+ 8000b2a:	46bd      	mov	sp, r7
+ 8000b2c:	bd80      	pop	{r7, pc}
+ 8000b2e:	bf00      	nop
+ 8000b30:	e000e010 	.word	0xe000e010
 
-08000944 <LL_Init1msTick>:
-  * @param  HCLKFrequency HCLK frequency in Hz
-  * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
+08000b34 <HAL_NVIC_SetPriorityGrouping>:
+  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
+  *         The pending IRQ priority will be managed only by the subpriority.
   * @retval None
   */
-void LL_Init1msTick(uint32_t HCLKFrequency)
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
- 8000944:	b580      	push	{r7, lr}
- 8000946:	b082      	sub	sp, #8
- 8000948:	af00      	add	r7, sp, #0
- 800094a:	6078      	str	r0, [r7, #4]
-  /* Use frequency provided in argument */
-  LL_InitTick(HCLKFrequency, 100U);
- 800094c:	2164      	movs	r1, #100	; 0x64
- 800094e:	6878      	ldr	r0, [r7, #4]
- 8000950:	f7ff ffde 	bl	8000910 <LL_InitTick>
+ 8000b34:	b580      	push	{r7, lr}
+ 8000b36:	b082      	sub	sp, #8
+ 8000b38:	af00      	add	r7, sp, #0
+ 8000b3a:	6078      	str	r0, [r7, #4]
+  /* Check the parameters */
+  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+
+  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+  NVIC_SetPriorityGrouping(PriorityGroup);
+ 8000b3c:	6878      	ldr	r0, [r7, #4]
+ 8000b3e:	f7ff ff47 	bl	80009d0 <__NVIC_SetPriorityGrouping>
 }
- 8000954:	bf00      	nop
- 8000956:	3708      	adds	r7, #8
- 8000958:	46bd      	mov	sp, r7
- 800095a:	bd80      	pop	{r7, pc}
+ 8000b42:	bf00      	nop
+ 8000b44:	3708      	adds	r7, #8
+ 8000b46:	46bd      	mov	sp, r7
+ 8000b48:	bd80      	pop	{r7, pc}
 
-0800095c <__libc_init_array>:
- 800095c:	b570      	push	{r4, r5, r6, lr}
- 800095e:	4e0d      	ldr	r6, [pc, #52]	; (8000994 <__libc_init_array+0x38>)
- 8000960:	4c0d      	ldr	r4, [pc, #52]	; (8000998 <__libc_init_array+0x3c>)
- 8000962:	1ba4      	subs	r4, r4, r6
- 8000964:	10a4      	asrs	r4, r4, #2
- 8000966:	2500      	movs	r5, #0
- 8000968:	42a5      	cmp	r5, r4
- 800096a:	d109      	bne.n	8000980 <__libc_init_array+0x24>
- 800096c:	4e0b      	ldr	r6, [pc, #44]	; (800099c <__libc_init_array+0x40>)
- 800096e:	4c0c      	ldr	r4, [pc, #48]	; (80009a0 <__libc_init_array+0x44>)
- 8000970:	f000 f818 	bl	80009a4 <_init>
- 8000974:	1ba4      	subs	r4, r4, r6
- 8000976:	10a4      	asrs	r4, r4, #2
- 8000978:	2500      	movs	r5, #0
- 800097a:	42a5      	cmp	r5, r4
- 800097c:	d105      	bne.n	800098a <__libc_init_array+0x2e>
- 800097e:	bd70      	pop	{r4, r5, r6, pc}
- 8000980:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 8000984:	4798      	blx	r3
- 8000986:	3501      	adds	r5, #1
- 8000988:	e7ee      	b.n	8000968 <__libc_init_array+0xc>
- 800098a:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 800098e:	4798      	blx	r3
- 8000990:	3501      	adds	r5, #1
- 8000992:	e7f2      	b.n	800097a <__libc_init_array+0x1e>
- 8000994:	080009fc 	.word	0x080009fc
- 8000998:	080009fc 	.word	0x080009fc
- 800099c:	080009fc 	.word	0x080009fc
- 80009a0:	08000a00 	.word	0x08000a00
+08000b4a <HAL_NVIC_SetPriority>:
+  *         This parameter can be a value between 0 and 15
+  *         A lower priority value indicates a higher priority.
+  * @retval None
+  */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 8000b4a:	b580      	push	{r7, lr}
+ 8000b4c:	b086      	sub	sp, #24
+ 8000b4e:	af00      	add	r7, sp, #0
+ 8000b50:	4603      	mov	r3, r0
+ 8000b52:	60b9      	str	r1, [r7, #8]
+ 8000b54:	607a      	str	r2, [r7, #4]
+ 8000b56:	73fb      	strb	r3, [r7, #15]
+  uint32_t prioritygroup = 0x00;
+ 8000b58:	2300      	movs	r3, #0
+ 8000b5a:	617b      	str	r3, [r7, #20]
 
-080009a4 <_init>:
- 80009a4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 80009a6:	bf00      	nop
- 80009a8:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 80009aa:	bc08      	pop	{r3}
- 80009ac:	469e      	mov	lr, r3
- 80009ae:	4770      	bx	lr
+  /* Check the parameters */
+  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
 
-080009b0 <_fini>:
- 80009b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 80009b2:	bf00      	nop
- 80009b4:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 80009b6:	bc08      	pop	{r3}
- 80009b8:	469e      	mov	lr, r3
- 80009ba:	4770      	bx	lr
+  prioritygroup = NVIC_GetPriorityGrouping();
+ 8000b5c:	f7ff ff5c 	bl	8000a18 <__NVIC_GetPriorityGrouping>
+ 8000b60:	6178      	str	r0, [r7, #20]
+
+  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 8000b62:	687a      	ldr	r2, [r7, #4]
+ 8000b64:	68b9      	ldr	r1, [r7, #8]
+ 8000b66:	6978      	ldr	r0, [r7, #20]
+ 8000b68:	f7ff ff8e 	bl	8000a88 <NVIC_EncodePriority>
+ 8000b6c:	4602      	mov	r2, r0
+ 8000b6e:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8000b72:	4611      	mov	r1, r2
+ 8000b74:	4618      	mov	r0, r3
+ 8000b76:	f7ff ff5d 	bl	8000a34 <__NVIC_SetPriority>
+}
+ 8000b7a:	bf00      	nop
+ 8000b7c:	3718      	adds	r7, #24
+ 8000b7e:	46bd      	mov	sp, r7
+ 8000b80:	bd80      	pop	{r7, pc}
+
+08000b82 <HAL_SYSTICK_Config>:
+  * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
+  * @retval status:  - 0  Function succeeded.
+  *                  - 1  Function failed.
+  */
+uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
+{
+ 8000b82:	b580      	push	{r7, lr}
+ 8000b84:	b082      	sub	sp, #8
+ 8000b86:	af00      	add	r7, sp, #0
+ 8000b88:	6078      	str	r0, [r7, #4]
+   return SysTick_Config(TicksNumb);
+ 8000b8a:	6878      	ldr	r0, [r7, #4]
+ 8000b8c:	f7ff ffb0 	bl	8000af0 <SysTick_Config>
+ 8000b90:	4603      	mov	r3, r0
+}
+ 8000b92:	4618      	mov	r0, r3
+ 8000b94:	3708      	adds	r7, #8
+ 8000b96:	46bd      	mov	sp, r7
+ 8000b98:	bd80      	pop	{r7, pc}
+
+08000b9a <HAL_RTC_Init>:
+  * @brief  Initialize the RTC peripheral
+  * @param  hrtc RTC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
+{
+ 8000b9a:	b580      	push	{r7, lr}
+ 8000b9c:	b084      	sub	sp, #16
+ 8000b9e:	af00      	add	r7, sp, #0
+ 8000ba0:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef status = HAL_ERROR;
+ 8000ba2:	2301      	movs	r3, #1
+ 8000ba4:	73fb      	strb	r3, [r7, #15]
+
+  /* Check the RTC peripheral state */
+  if (hrtc != NULL)
+ 8000ba6:	687b      	ldr	r3, [r7, #4]
+ 8000ba8:	2b00      	cmp	r3, #0
+ 8000baa:	d06c      	beq.n	8000c86 <HAL_RTC_Init+0xec>
+      {
+        hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
+      }
+    }
+#else /* #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) */
+    if (hrtc->State == HAL_RTC_STATE_RESET)
+ 8000bac:	687b      	ldr	r3, [r7, #4]
+ 8000bae:	f893 3021 	ldrb.w	r3, [r3, #33]	; 0x21
+ 8000bb2:	b2db      	uxtb	r3, r3
+ 8000bb4:	2b00      	cmp	r3, #0
+ 8000bb6:	d106      	bne.n	8000bc6 <HAL_RTC_Init+0x2c>
+    {
+      /* Allocate lock resource and initialize it */
+      hrtc->Lock = HAL_UNLOCKED;
+ 8000bb8:	687b      	ldr	r3, [r7, #4]
+ 8000bba:	2200      	movs	r2, #0
+ 8000bbc:	f883 2020 	strb.w	r2, [r3, #32]
+
+      /* Initialize RTC MSP */
+      HAL_RTC_MspInit(hrtc);
+ 8000bc0:	6878      	ldr	r0, [r7, #4]
+ 8000bc2:	f7ff fde7 	bl	8000794 <HAL_RTC_MspInit>
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx)
+    /* Process TAMP ip offset from RTC one */
+    hrtc->TampOffset = (TAMP_BASE - RTC_BASE);
+#endif
+    /* Set RTC state */
+    hrtc->State = HAL_RTC_STATE_BUSY;
+ 8000bc6:	687b      	ldr	r3, [r7, #4]
+ 8000bc8:	2202      	movs	r2, #2
+ 8000bca:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
+
+    /* Disable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 8000bce:	687b      	ldr	r3, [r7, #4]
+ 8000bd0:	681b      	ldr	r3, [r3, #0]
+ 8000bd2:	22ca      	movs	r2, #202	; 0xca
+ 8000bd4:	625a      	str	r2, [r3, #36]	; 0x24
+ 8000bd6:	687b      	ldr	r3, [r7, #4]
+ 8000bd8:	681b      	ldr	r3, [r3, #0]
+ 8000bda:	2253      	movs	r2, #83	; 0x53
+ 8000bdc:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* Enter Initialization mode */
+    status = RTC_EnterInitMode(hrtc);
+ 8000bde:	6878      	ldr	r0, [r7, #4]
+ 8000be0:	f000 f87c 	bl	8000cdc <RTC_EnterInitMode>
+ 8000be4:	4603      	mov	r3, r0
+ 8000be6:	73fb      	strb	r3, [r7, #15]
+
+    if (status == HAL_OK)
+ 8000be8:	7bfb      	ldrb	r3, [r7, #15]
+ 8000bea:	2b00      	cmp	r3, #0
+ 8000bec:	d14b      	bne.n	8000c86 <HAL_RTC_Init+0xec>
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx)
+      /* Clear RTC_CR FMT, OSEL, POL and TAMPOE Bits */
+      hrtc->Instance->CR &= ~(RTC_CR_FMT | RTC_CR_POL | RTC_CR_OSEL | RTC_CR_TAMPOE);
+#else
+      /* Clear RTC_CR FMT, OSEL and POL Bits */
+      hrtc->Instance->CR &= ~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL);
+ 8000bee:	687b      	ldr	r3, [r7, #4]
+ 8000bf0:	681b      	ldr	r3, [r3, #0]
+ 8000bf2:	689b      	ldr	r3, [r3, #8]
+ 8000bf4:	687a      	ldr	r2, [r7, #4]
+ 8000bf6:	6812      	ldr	r2, [r2, #0]
+ 8000bf8:	f423 03e0 	bic.w	r3, r3, #7340032	; 0x700000
+ 8000bfc:	f023 0340 	bic.w	r3, r3, #64	; 0x40
+ 8000c00:	6093      	str	r3, [r2, #8]
+#endif
+      /* Set RTC_CR register */
+      hrtc->Instance->CR |= (hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
+ 8000c02:	687b      	ldr	r3, [r7, #4]
+ 8000c04:	681b      	ldr	r3, [r3, #0]
+ 8000c06:	6899      	ldr	r1, [r3, #8]
+ 8000c08:	687b      	ldr	r3, [r7, #4]
+ 8000c0a:	685a      	ldr	r2, [r3, #4]
+ 8000c0c:	687b      	ldr	r3, [r7, #4]
+ 8000c0e:	691b      	ldr	r3, [r3, #16]
+ 8000c10:	431a      	orrs	r2, r3
+ 8000c12:	687b      	ldr	r3, [r7, #4]
+ 8000c14:	699b      	ldr	r3, [r3, #24]
+ 8000c16:	431a      	orrs	r2, r3
+ 8000c18:	687b      	ldr	r3, [r7, #4]
+ 8000c1a:	681b      	ldr	r3, [r3, #0]
+ 8000c1c:	430a      	orrs	r2, r1
+ 8000c1e:	609a      	str	r2, [r3, #8]
+
+      /* Configure the RTC PRER */
+      hrtc->Instance->PRER = (hrtc->Init.SynchPrediv);
+ 8000c20:	687b      	ldr	r3, [r7, #4]
+ 8000c22:	681b      	ldr	r3, [r3, #0]
+ 8000c24:	687a      	ldr	r2, [r7, #4]
+ 8000c26:	68d2      	ldr	r2, [r2, #12]
+ 8000c28:	611a      	str	r2, [r3, #16]
+      hrtc->Instance->PRER |= (hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos);
+ 8000c2a:	687b      	ldr	r3, [r7, #4]
+ 8000c2c:	681b      	ldr	r3, [r3, #0]
+ 8000c2e:	6919      	ldr	r1, [r3, #16]
+ 8000c30:	687b      	ldr	r3, [r7, #4]
+ 8000c32:	689b      	ldr	r3, [r3, #8]
+ 8000c34:	041a      	lsls	r2, r3, #16
+ 8000c36:	687b      	ldr	r3, [r7, #4]
+ 8000c38:	681b      	ldr	r3, [r3, #0]
+ 8000c3a:	430a      	orrs	r2, r1
+ 8000c3c:	611a      	str	r2, [r3, #16]
+      /* Configure the Binary mode */
+      MODIFY_REG(RTC->ICSR, RTC_ICSR_BIN | RTC_ICSR_BCDU, hrtc->Init.BinMode | hrtc->Init.BinMixBcdU);
+#endif
+
+      /* Exit Initialization mode */
+      status = RTC_ExitInitMode(hrtc);
+ 8000c3e:	6878      	ldr	r0, [r7, #4]
+ 8000c40:	f000 f880 	bl	8000d44 <RTC_ExitInitMode>
+ 8000c44:	4603      	mov	r3, r0
+ 8000c46:	73fb      	strb	r3, [r7, #15]
+
+      if (status == HAL_OK)
+ 8000c48:	7bfb      	ldrb	r3, [r7, #15]
+ 8000c4a:	2b00      	cmp	r3, #0
+ 8000c4c:	d11b      	bne.n	8000c86 <HAL_RTC_Init+0xec>
+      {
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx)
+        hrtc->Instance->CR &= ~(RTC_CR_TAMPALRM_PU | RTC_CR_TAMPALRM_TYPE | RTC_CR_OUT2EN);
+        hrtc->Instance->CR |= (hrtc->Init.OutPutPullUp | hrtc->Init.OutPutType | hrtc->Init.OutPutRemap);
+#else
+        hrtc->Instance->OR &= ~(RTC_OR_ALARMOUTTYPE | RTC_OR_OUT_RMP);
+ 8000c4e:	687b      	ldr	r3, [r7, #4]
+ 8000c50:	681b      	ldr	r3, [r3, #0]
+ 8000c52:	6cda      	ldr	r2, [r3, #76]	; 0x4c
+ 8000c54:	687b      	ldr	r3, [r7, #4]
+ 8000c56:	681b      	ldr	r3, [r3, #0]
+ 8000c58:	f022 0203 	bic.w	r2, r2, #3
+ 8000c5c:	64da      	str	r2, [r3, #76]	; 0x4c
+        hrtc->Instance->OR |= (hrtc->Init.OutPutType | hrtc->Init.OutPutRemap);
+ 8000c5e:	687b      	ldr	r3, [r7, #4]
+ 8000c60:	681b      	ldr	r3, [r3, #0]
+ 8000c62:	6cd9      	ldr	r1, [r3, #76]	; 0x4c
+ 8000c64:	687b      	ldr	r3, [r7, #4]
+ 8000c66:	69da      	ldr	r2, [r3, #28]
+ 8000c68:	687b      	ldr	r3, [r7, #4]
+ 8000c6a:	695b      	ldr	r3, [r3, #20]
+ 8000c6c:	431a      	orrs	r2, r3
+ 8000c6e:	687b      	ldr	r3, [r7, #4]
+ 8000c70:	681b      	ldr	r3, [r3, #0]
+ 8000c72:	430a      	orrs	r2, r1
+ 8000c74:	64da      	str	r2, [r3, #76]	; 0x4c
+#endif
+
+        /* Enable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 8000c76:	687b      	ldr	r3, [r7, #4]
+ 8000c78:	681b      	ldr	r3, [r3, #0]
+ 8000c7a:	22ff      	movs	r2, #255	; 0xff
+ 8000c7c:	625a      	str	r2, [r3, #36]	; 0x24
+
+          hrtc->State = HAL_RTC_STATE_READY;
+ 8000c7e:	687b      	ldr	r3, [r7, #4]
+ 8000c80:	2201      	movs	r2, #1
+ 8000c82:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
+      }
+    }
+  }
+
+  return status;
+ 8000c86:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8000c88:	4618      	mov	r0, r3
+ 8000c8a:	3710      	adds	r7, #16
+ 8000c8c:	46bd      	mov	sp, r7
+ 8000c8e:	bd80      	pop	{r7, pc}
+
+08000c90 <HAL_RTC_WaitForSynchro>:
+  *         correctly copied into the RTC_TR and RTC_DR shadow registers.
+  * @param  hrtc RTC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc)
+{
+ 8000c90:	b580      	push	{r7, lr}
+ 8000c92:	b084      	sub	sp, #16
+ 8000c94:	af00      	add	r7, sp, #0
+ 8000c96:	6078      	str	r0, [r7, #4]
+
+  /* Clear RSF flag */
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx)
+  hrtc->Instance->ICSR &= (uint32_t)RTC_RSF_MASK;
+#else
+  hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
+ 8000c98:	687b      	ldr	r3, [r7, #4]
+ 8000c9a:	681b      	ldr	r3, [r3, #0]
+ 8000c9c:	68da      	ldr	r2, [r3, #12]
+ 8000c9e:	687b      	ldr	r3, [r7, #4]
+ 8000ca0:	681b      	ldr	r3, [r3, #0]
+ 8000ca2:	f022 02a0 	bic.w	r2, r2, #160	; 0xa0
+ 8000ca6:	60da      	str	r2, [r3, #12]
+#endif
+
+  tickstart = HAL_GetTick();
+ 8000ca8:	f7ff fe86 	bl	80009b8 <HAL_GetTick>
+ 8000cac:	60f8      	str	r0, [r7, #12]
+
+  /* Wait the registers to be synchronised */
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx)
+  while ((hrtc->Instance->ICSR & RTC_ICSR_RSF) == 0U)
+#else
+  while ((hrtc->Instance->ISR & RTC_ISR_RSF) == 0U)
+ 8000cae:	e009      	b.n	8000cc4 <HAL_RTC_WaitForSynchro+0x34>
+#endif
+  {
+    if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
+ 8000cb0:	f7ff fe82 	bl	80009b8 <HAL_GetTick>
+ 8000cb4:	4602      	mov	r2, r0
+ 8000cb6:	68fb      	ldr	r3, [r7, #12]
+ 8000cb8:	1ad3      	subs	r3, r2, r3
+ 8000cba:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 8000cbe:	d901      	bls.n	8000cc4 <HAL_RTC_WaitForSynchro+0x34>
+    {
+      return HAL_TIMEOUT;
+ 8000cc0:	2303      	movs	r3, #3
+ 8000cc2:	e007      	b.n	8000cd4 <HAL_RTC_WaitForSynchro+0x44>
+  while ((hrtc->Instance->ISR & RTC_ISR_RSF) == 0U)
+ 8000cc4:	687b      	ldr	r3, [r7, #4]
+ 8000cc6:	681b      	ldr	r3, [r3, #0]
+ 8000cc8:	68db      	ldr	r3, [r3, #12]
+ 8000cca:	f003 0320 	and.w	r3, r3, #32
+ 8000cce:	2b00      	cmp	r3, #0
+ 8000cd0:	d0ee      	beq.n	8000cb0 <HAL_RTC_WaitForSynchro+0x20>
+    }
+  }
+
+  return HAL_OK;
+ 8000cd2:	2300      	movs	r3, #0
+}
+ 8000cd4:	4618      	mov	r0, r3
+ 8000cd6:	3710      	adds	r7, #16
+ 8000cd8:	46bd      	mov	sp, r7
+ 8000cda:	bd80      	pop	{r7, pc}
+
+08000cdc <RTC_EnterInitMode>:
+  *         __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
+  * @param  hrtc RTC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc)
+{
+ 8000cdc:	b580      	push	{r7, lr}
+ 8000cde:	b084      	sub	sp, #16
+ 8000ce0:	af00      	add	r7, sp, #0
+ 8000ce2:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart;
+  HAL_StatusTypeDef status = HAL_OK;
+ 8000ce4:	2300      	movs	r3, #0
+ 8000ce6:	73fb      	strb	r3, [r7, #15]
+        hrtc->State = HAL_RTC_STATE_TIMEOUT;
+      }
+    }
+  }
+#else /* #if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) */
+  if ((hrtc->Instance->ISR & RTC_ISR_INITF) == 0U)
+ 8000ce8:	687b      	ldr	r3, [r7, #4]
+ 8000cea:	681b      	ldr	r3, [r3, #0]
+ 8000cec:	68db      	ldr	r3, [r3, #12]
+ 8000cee:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8000cf2:	2b00      	cmp	r3, #0
+ 8000cf4:	d120      	bne.n	8000d38 <RTC_EnterInitMode+0x5c>
+  {
+    /* Set the Initialization mode */
+    hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
+ 8000cf6:	687b      	ldr	r3, [r7, #4]
+ 8000cf8:	681b      	ldr	r3, [r3, #0]
+ 8000cfa:	f04f 32ff 	mov.w	r2, #4294967295
+ 8000cfe:	60da      	str	r2, [r3, #12]
+
+    tickstart = HAL_GetTick();
+ 8000d00:	f7ff fe5a 	bl	80009b8 <HAL_GetTick>
+ 8000d04:	60b8      	str	r0, [r7, #8]
+    /* Wait till RTC is in INIT state and if Time out is reached exit */
+    while ((READ_BIT(hrtc->Instance->ISR, RTC_ISR_INITF) == 0U) && (status != HAL_TIMEOUT))
+ 8000d06:	e00d      	b.n	8000d24 <RTC_EnterInitMode+0x48>
+    {
+      if ((HAL_GetTick()  - tickstart) > RTC_TIMEOUT_VALUE)
+ 8000d08:	f7ff fe56 	bl	80009b8 <HAL_GetTick>
+ 8000d0c:	4602      	mov	r2, r0
+ 8000d0e:	68bb      	ldr	r3, [r7, #8]
+ 8000d10:	1ad3      	subs	r3, r2, r3
+ 8000d12:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 8000d16:	d905      	bls.n	8000d24 <RTC_EnterInitMode+0x48>
+      {
+        status = HAL_TIMEOUT;
+ 8000d18:	2303      	movs	r3, #3
+ 8000d1a:	73fb      	strb	r3, [r7, #15]
+        hrtc->State = HAL_RTC_STATE_TIMEOUT;
+ 8000d1c:	687b      	ldr	r3, [r7, #4]
+ 8000d1e:	2203      	movs	r2, #3
+ 8000d20:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
+    while ((READ_BIT(hrtc->Instance->ISR, RTC_ISR_INITF) == 0U) && (status != HAL_TIMEOUT))
+ 8000d24:	687b      	ldr	r3, [r7, #4]
+ 8000d26:	681b      	ldr	r3, [r3, #0]
+ 8000d28:	68db      	ldr	r3, [r3, #12]
+ 8000d2a:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8000d2e:	2b00      	cmp	r3, #0
+ 8000d30:	d102      	bne.n	8000d38 <RTC_EnterInitMode+0x5c>
+ 8000d32:	7bfb      	ldrb	r3, [r7, #15]
+ 8000d34:	2b03      	cmp	r3, #3
+ 8000d36:	d1e7      	bne.n	8000d08 <RTC_EnterInitMode+0x2c>
+      }
+    }
+  }
+#endif /* #if defined(STM32L412xx) || defined(STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) */
+
+  return status;
+ 8000d38:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8000d3a:	4618      	mov	r0, r3
+ 8000d3c:	3710      	adds	r7, #16
+ 8000d3e:	46bd      	mov	sp, r7
+ 8000d40:	bd80      	pop	{r7, pc}
+	...
+
+08000d44 <RTC_ExitInitMode>:
+  * @brief  Exit the RTC Initialization mode.
+  * @param  hrtc RTC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
+{
+ 8000d44:	b580      	push	{r7, lr}
+ 8000d46:	b084      	sub	sp, #16
+ 8000d48:	af00      	add	r7, sp, #0
+ 8000d4a:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef status = HAL_OK;
+ 8000d4c:	2300      	movs	r3, #0
+ 8000d4e:	73fb      	strb	r3, [r7, #15]
+  /* Exit Initialization mode */
+#if defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L4P5xx) || defined(STM32L4Q5xx)
+  CLEAR_BIT(RTC->ICSR, RTC_ICSR_INIT);
+#else
+  /* Exit Initialization mode */
+  CLEAR_BIT(RTC->ISR, RTC_ISR_INIT);
+ 8000d50:	4b1a      	ldr	r3, [pc, #104]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000d52:	68db      	ldr	r3, [r3, #12]
+ 8000d54:	4a19      	ldr	r2, [pc, #100]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000d56:	f023 0380 	bic.w	r3, r3, #128	; 0x80
+ 8000d5a:	60d3      	str	r3, [r2, #12]
+#endif
+
+  /* If CR_BYPSHAD bit = 0, wait for synchro */
+  if (READ_BIT(RTC->CR, RTC_CR_BYPSHAD) == 0U)
+ 8000d5c:	4b17      	ldr	r3, [pc, #92]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000d5e:	689b      	ldr	r3, [r3, #8]
+ 8000d60:	f003 0320 	and.w	r3, r3, #32
+ 8000d64:	2b00      	cmp	r3, #0
+ 8000d66:	d10c      	bne.n	8000d82 <RTC_ExitInitMode+0x3e>
+  {
+    if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
+ 8000d68:	6878      	ldr	r0, [r7, #4]
+ 8000d6a:	f7ff ff91 	bl	8000c90 <HAL_RTC_WaitForSynchro>
+ 8000d6e:	4603      	mov	r3, r0
+ 8000d70:	2b00      	cmp	r3, #0
+ 8000d72:	d01e      	beq.n	8000db2 <RTC_ExitInitMode+0x6e>
+    {
+      hrtc->State = HAL_RTC_STATE_TIMEOUT;
+ 8000d74:	687b      	ldr	r3, [r7, #4]
+ 8000d76:	2203      	movs	r2, #3
+ 8000d78:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
+      status = HAL_TIMEOUT;
+ 8000d7c:	2303      	movs	r3, #3
+ 8000d7e:	73fb      	strb	r3, [r7, #15]
+ 8000d80:	e017      	b.n	8000db2 <RTC_ExitInitMode+0x6e>
+    }
+  }
+  else /* WA 2.9.6 Calendar initialization may fail in case of consecutive INIT mode entry */
+  {
+    /* Clear BYPSHAD bit */
+    CLEAR_BIT(RTC->CR, RTC_CR_BYPSHAD);
+ 8000d82:	4b0e      	ldr	r3, [pc, #56]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000d84:	689b      	ldr	r3, [r3, #8]
+ 8000d86:	4a0d      	ldr	r2, [pc, #52]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000d88:	f023 0320 	bic.w	r3, r3, #32
+ 8000d8c:	6093      	str	r3, [r2, #8]
+    if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
+ 8000d8e:	6878      	ldr	r0, [r7, #4]
+ 8000d90:	f7ff ff7e 	bl	8000c90 <HAL_RTC_WaitForSynchro>
+ 8000d94:	4603      	mov	r3, r0
+ 8000d96:	2b00      	cmp	r3, #0
+ 8000d98:	d005      	beq.n	8000da6 <RTC_ExitInitMode+0x62>
+    {
+      hrtc->State = HAL_RTC_STATE_TIMEOUT;
+ 8000d9a:	687b      	ldr	r3, [r7, #4]
+ 8000d9c:	2203      	movs	r2, #3
+ 8000d9e:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
+      status = HAL_TIMEOUT;
+ 8000da2:	2303      	movs	r3, #3
+ 8000da4:	73fb      	strb	r3, [r7, #15]
+    }
+    /* Restore BYPSHAD bit */
+    SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
+ 8000da6:	4b05      	ldr	r3, [pc, #20]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000da8:	689b      	ldr	r3, [r3, #8]
+ 8000daa:	4a04      	ldr	r2, [pc, #16]	; (8000dbc <RTC_ExitInitMode+0x78>)
+ 8000dac:	f043 0320 	orr.w	r3, r3, #32
+ 8000db0:	6093      	str	r3, [r2, #8]
+  }
+
+  return status;
+ 8000db2:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8000db4:	4618      	mov	r0, r3
+ 8000db6:	3710      	adds	r7, #16
+ 8000db8:	46bd      	mov	sp, r7
+ 8000dba:	bd80      	pop	{r7, pc}
+ 8000dbc:	40002800 	.word	0x40002800
+
+08000dc0 <LL_SetSystemCoreClock>:
+  * @note   Variable can be calculated also through SystemCoreClockUpdate function.
+  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
+  * @retval None
+  */
+void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
+{
+ 8000dc0:	b480      	push	{r7}
+ 8000dc2:	b083      	sub	sp, #12
+ 8000dc4:	af00      	add	r7, sp, #0
+ 8000dc6:	6078      	str	r0, [r7, #4]
+  /* HCLK clock frequency */
+  SystemCoreClock = HCLKFrequency;
+ 8000dc8:	4a04      	ldr	r2, [pc, #16]	; (8000ddc <LL_SetSystemCoreClock+0x1c>)
+ 8000dca:	687b      	ldr	r3, [r7, #4]
+ 8000dcc:	6013      	str	r3, [r2, #0]
+}
+ 8000dce:	bf00      	nop
+ 8000dd0:	370c      	adds	r7, #12
+ 8000dd2:	46bd      	mov	sp, r7
+ 8000dd4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000dd8:	4770      	bx	lr
+ 8000dda:	bf00      	nop
+ 8000ddc:	20000000 	.word	0x20000000
+
+08000de0 <__libc_init_array>:
+ 8000de0:	b570      	push	{r4, r5, r6, lr}
+ 8000de2:	4e0d      	ldr	r6, [pc, #52]	; (8000e18 <__libc_init_array+0x38>)
+ 8000de4:	4c0d      	ldr	r4, [pc, #52]	; (8000e1c <__libc_init_array+0x3c>)
+ 8000de6:	1ba4      	subs	r4, r4, r6
+ 8000de8:	10a4      	asrs	r4, r4, #2
+ 8000dea:	2500      	movs	r5, #0
+ 8000dec:	42a5      	cmp	r5, r4
+ 8000dee:	d109      	bne.n	8000e04 <__libc_init_array+0x24>
+ 8000df0:	4e0b      	ldr	r6, [pc, #44]	; (8000e20 <__libc_init_array+0x40>)
+ 8000df2:	4c0c      	ldr	r4, [pc, #48]	; (8000e24 <__libc_init_array+0x44>)
+ 8000df4:	f000 f818 	bl	8000e28 <_init>
+ 8000df8:	1ba4      	subs	r4, r4, r6
+ 8000dfa:	10a4      	asrs	r4, r4, #2
+ 8000dfc:	2500      	movs	r5, #0
+ 8000dfe:	42a5      	cmp	r5, r4
+ 8000e00:	d105      	bne.n	8000e0e <__libc_init_array+0x2e>
+ 8000e02:	bd70      	pop	{r4, r5, r6, pc}
+ 8000e04:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 8000e08:	4798      	blx	r3
+ 8000e0a:	3501      	adds	r5, #1
+ 8000e0c:	e7ee      	b.n	8000dec <__libc_init_array+0xc>
+ 8000e0e:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 8000e12:	4798      	blx	r3
+ 8000e14:	3501      	adds	r5, #1
+ 8000e16:	e7f2      	b.n	8000dfe <__libc_init_array+0x1e>
+ 8000e18:	08000e40 	.word	0x08000e40
+ 8000e1c:	08000e40 	.word	0x08000e40
+ 8000e20:	08000e40 	.word	0x08000e40
+ 8000e24:	08000e44 	.word	0x08000e44
+
+08000e28 <_init>:
+ 8000e28:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8000e2a:	bf00      	nop
+ 8000e2c:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8000e2e:	bc08      	pop	{r3}
+ 8000e30:	469e      	mov	lr, r3
+ 8000e32:	4770      	bx	lr
+
+08000e34 <_fini>:
+ 8000e34:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8000e36:	bf00      	nop
+ 8000e38:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8000e3a:	bc08      	pop	{r3}
+ 8000e3c:	469e      	mov	lr, r3
+ 8000e3e:	4770      	bx	lr
diff --git a/L476_ats_blink-master/Debug/L476_ats_blink-master.map b/L476_ats_blink-master/Debug/L476_ats_blink-master.map
index c8907a6..eb60769 100644
--- a/L476_ats_blink-master/Debug/L476_ats_blink-master.map
+++ b/L476_ats_blink-master/Debug/L476_ats_blink-master.map
@@ -1,7 +1,5 @@
 Archive member included to satisfy reference by file (symbol)
 
-c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
-                              Core/Src/syscalls.o (__errno)
 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
                               c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (exit)
 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
@@ -10,6 +8,14 @@ c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externalt
                               c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (__libc_init_array)
 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
                               c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (memset)
+c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+                              c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) (_exit)
+
+Allocating common symbols
+Common symbol       size              file
+
+uwTick              0x4               Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+hrtc                0x24              Core/Src/main.o
 
 Discarded input sections
 
@@ -24,27 +30,31 @@ Discarded input sections
  .ARM.exidx     0x0000000000000000        0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
  .ARM.attributes
                 0x0000000000000000       0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .group         0x0000000000000000        0xc Core/Src/gpio.o
- .text          0x0000000000000000        0x0 Core/Src/gpio.o
- .data          0x0000000000000000        0x0 Core/Src/gpio.o
- .bss           0x0000000000000000        0x0 Core/Src/gpio.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
  .group         0x0000000000000000        0xc Core/Src/main.o
  .group         0x0000000000000000        0xc Core/Src/main.o
  .group         0x0000000000000000        0xc Core/Src/main.o
@@ -70,25 +80,130 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Core/Src/main.o
  .data          0x0000000000000000        0x0 Core/Src/main.o
  .bss           0x0000000000000000        0x0 Core/Src/main.o
- .bss.expe      0x0000000000000000        0x1 Core/Src/main.o
- .debug_macro   0x0000000000000000      0xaa8 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/main.o
- .debug_macro   0x0000000000000000       0x28 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/main.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xef Core/Src/main.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/main.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/main.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/main.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x101 Core/Src/main.o
- .debug_macro   0x0000000000000000     0x1011 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/main.o
- .debug_macro   0x0000000000000000    0x1a13d Core/Src/main.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x1b9 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x16a Core/Src/main.o
+ .rodata.CHANNEL_OFFSET_TAB
+                0x0000000000000000        0x7 Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_hal_msp.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32l4xx_hal_msp.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32l4xx_hal_msp.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32l4xx_hal_msp.o
+ .rodata.CHANNEL_OFFSET_TAB
+                0x0000000000000000        0x7 Core/Src/stm32l4xx_hal_msp.o
+ .text.HAL_RTC_MspDeInit
+                0x0000000000000000       0x38 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0xaae Core/Src/stm32l4xx_hal_msp.o
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+ .debug_macro   0x0000000000000000    0x1a13d Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32l4xx_hal_msp.o
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+ .debug_macro   0x0000000000000000     0x155f Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x59e Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x13d Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x18b Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x26b Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x23d Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x241 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x37c Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32l4xx_hal_msp.o
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+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x122 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x3e9 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x31a Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x4fb Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xe4 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x331 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x708 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x1bf Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x2f5 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x164 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x1a7 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xa7 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x208 Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x2cb Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x16a Core/Src/stm32l4xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
  .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
  .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
  .group         0x0000000000000000        0xc Core/Src/stm32l4xx_it.o
@@ -120,7 +235,8 @@ Discarded input sections
  .bss           0x0000000000000000        0x0 Core/Src/stm32l4xx_it.o
  .rodata.CHANNEL_OFFSET_TAB
                 0x0000000000000000        0x7 Core/Src/stm32l4xx_it.o
- .debug_macro   0x0000000000000000      0xaa8 Core/Src/stm32l4xx_it.o
+ .debug_macro   0x0000000000000000      0xaae Core/Src/stm32l4xx_it.o
+ .debug_macro   0x0000000000000000      0x17a Core/Src/stm32l4xx_it.o
  .debug_macro   0x0000000000000000       0x2e Core/Src/stm32l4xx_it.o
  .debug_macro   0x0000000000000000       0x28 Core/Src/stm32l4xx_it.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/stm32l4xx_it.o
@@ -136,191 +252,58 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x11f Core/Src/stm32l4xx_it.o
  .debug_macro   0x0000000000000000    0x1a13d Core/Src/stm32l4xx_it.o
  .debug_macro   0x0000000000000000       0x43 Core/Src/stm32l4xx_it.o
- .debug_macro   0x0000000000000000      0x716 Core/Src/stm32l4xx_it.o
+ .debug_macro   0x0000000000000000     0x3890 Core/Src/stm32l4xx_it.o
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+ .debug_macro   0x0000000000000000      0x59e Core/Src/stm32l4xx_it.o
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+ .debug_macro   0x0000000000000000      0x18b Core/Src/stm32l4xx_it.o
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  .text.LL_EXTI_StructInit
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@@ -685,16 +3009,31 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x11f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
  .debug_macro   0x0000000000000000    0x1a13d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
  .debug_macro   0x0000000000000000       0x43 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
- .debug_macro   0x0000000000000000      0x716 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x17a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000     0x3890 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000       0x5c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000     0x155f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x59e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x13d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x18b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x26b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x23d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x241 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x37c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x122 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x3e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x31a Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x4fb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000       0xe4 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x331 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x0000000000000000      0x708 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
  .debug_macro   0x0000000000000000      0x2f5 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
  .debug_macro   0x0000000000000000      0x208 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
- .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .text.__errno  0x0000000000000000        0xc c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .debug_frame   0x0000000000000000       0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .ARM.attributes
-                0x0000000000000000       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
  .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
  .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
  .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
@@ -723,6 +3062,13 @@ Discarded input sections
  .debug_frame   0x0000000000000000       0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
  .ARM.attributes
                 0x0000000000000000       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+ .text._exit    0x0000000000000000        0x2 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+ .debug_frame   0x0000000000000000       0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a(_exit.o)
  .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
  .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
  .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
@@ -746,16 +3092,31 @@ Linker script and memory map
 LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
 LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
 LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
-LOAD Core/Src/gpio.o
 LOAD Core/Src/main.o
+LOAD Core/Src/stm32l4xx_hal_msp.o
 LOAD Core/Src/stm32l4xx_it.o
-LOAD Core/Src/syscalls.o
-LOAD Core/Src/sysmem.o
 LOAD Core/Src/system_stm32l4xx.o
 LOAD Core/Startup/startup_stm32l476rgtx.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o
+LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o
 LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o
-LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o
-LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o
 LOAD Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 START GROUP
 LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a
@@ -788,275 +3149,326 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000000                g_pfnVectors
                 0x0000000008000188                . = ALIGN (0x4)
 
-.text           0x0000000008000188      0x834
+.text           0x0000000008000188      0xcb8
                 0x0000000008000188                . = ALIGN (0x4)
  *(.text)
  .text          0x0000000008000188       0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
  *(.text*)
- .text.LL_AHB2_GRP1_EnableClock
-                0x00000000080001c8       0x30 Core/Src/gpio.o
- .text.LL_GPIO_SetPinMode
-                0x00000000080001f8       0x7a Core/Src/gpio.o
- .text.LL_GPIO_SetPinOutputType
-                0x0000000008000272       0x30 Core/Src/gpio.o
- .text.LL_GPIO_IsInputPinSet
-                0x00000000080002a2       0x2a Core/Src/gpio.o
- .text.LL_GPIO_SetOutputPin
-                0x00000000080002cc       0x1c Core/Src/gpio.o
- .text.LL_GPIO_ResetOutputPin
-                0x00000000080002e8       0x1c Core/Src/gpio.o
- .text.GPIO_init
-                0x0000000008000304       0x3c Core/Src/gpio.o
-                0x0000000008000304                GPIO_init
- .text.LED_GREEN
-                0x0000000008000340       0x2c Core/Src/gpio.o
-                0x0000000008000340                LED_GREEN
- .text.BLUE_BUTTON
-                0x000000000800036c       0x24 Core/Src/gpio.o
-                0x000000000800036c                BLUE_BUTTON
+ .text.LL_RCC_LSE_Enable
+                0x00000000080001c8       0x24 Core/Src/main.o
+ .text.LL_RCC_LSE_SetDriveCapability
+                0x00000000080001ec       0x2c Core/Src/main.o
+ .text.LL_RCC_LSE_IsReady
+                0x0000000008000218       0x28 Core/Src/main.o
  .text.LL_RCC_MSI_Enable
-                0x0000000008000390       0x20 Core/Src/main.o
+                0x0000000008000240       0x20 Core/Src/main.o
  .text.LL_RCC_MSI_IsReady
-                0x00000000080003b0       0x24 Core/Src/main.o
+                0x0000000008000260       0x24 Core/Src/main.o
+ .text.LL_RCC_MSI_EnablePLLMode
+                0x0000000008000284       0x20 Core/Src/main.o
+ .text.LL_RCC_MSI_EnableRangeSelection
+                0x00000000080002a4       0x20 Core/Src/main.o
+ .text.LL_RCC_MSI_SetRange
+                0x00000000080002c4       0x28 Core/Src/main.o
+ .text.LL_RCC_MSI_SetCalibTrimming
+                0x00000000080002ec       0x2c Core/Src/main.o
  .text.LL_RCC_SetSysClkSource
-                0x00000000080003d4       0x28 Core/Src/main.o
+                0x0000000008000318       0x28 Core/Src/main.o
  .text.LL_RCC_GetSysClkSource
-                0x00000000080003fc       0x1c Core/Src/main.o
+                0x0000000008000340       0x1c Core/Src/main.o
  .text.LL_RCC_SetAHBPrescaler
-                0x0000000008000418       0x28 Core/Src/main.o
+                0x000000000800035c       0x28 Core/Src/main.o
  .text.LL_RCC_SetAPB1Prescaler
-                0x0000000008000440       0x28 Core/Src/main.o
+                0x0000000008000384       0x28 Core/Src/main.o
  .text.LL_RCC_SetAPB2Prescaler
-                0x0000000008000468       0x28 Core/Src/main.o
+                0x00000000080003ac       0x28 Core/Src/main.o
+ .text.LL_RCC_SetRTCClockSource
+                0x00000000080003d4       0x2c Core/Src/main.o
+ .text.LL_RCC_EnableRTC
+                0x0000000008000400       0x24 Core/Src/main.o
+ .text.LL_RCC_ForceBackupDomainReset
+                0x0000000008000424       0x24 Core/Src/main.o
+ .text.LL_RCC_ReleaseBackupDomainReset
+                0x0000000008000448       0x24 Core/Src/main.o
  .text.LL_RCC_PLL_Enable
-                0x0000000008000490       0x20 Core/Src/main.o
+                0x000000000800046c       0x20 Core/Src/main.o
  .text.LL_RCC_PLL_IsReady
-                0x00000000080004b0       0x28 Core/Src/main.o
+                0x000000000800048c       0x28 Core/Src/main.o
  .text.LL_RCC_PLL_ConfigDomain_SYS
-                0x00000000080004d8       0x40 Core/Src/main.o
+                0x00000000080004b4       0x40 Core/Src/main.o
  .text.LL_RCC_PLL_EnableDomain_SYS
-                0x0000000008000518       0x20 Core/Src/main.o
+                0x00000000080004f4       0x20 Core/Src/main.o
  .text.LL_FLASH_SetLatency
-                0x0000000008000538       0x28 Core/Src/main.o
- .text.LL_SYSTICK_EnableIT
-                0x0000000008000560       0x20 Core/Src/main.o
- .text.LL_LPM_EnableSleep
+                0x0000000008000514       0x28 Core/Src/main.o
+ .text.LL_FLASH_GetLatency
+                0x000000000800053c       0x1c Core/Src/main.o
+ .text.LL_PWR_SetRegulVoltageScaling
+                0x0000000008000558       0x28 Core/Src/main.o
+ .text.LL_PWR_EnableBkUpAccess
                 0x0000000008000580       0x20 Core/Src/main.o
- .text.SysTick_Handler
-                0x00000000080005a0       0x50 Core/Src/main.o
-                0x00000000080005a0                SysTick_Handler
- .text.main     0x00000000080005f0       0x34 Core/Src/main.o
-                0x00000000080005f0                main
+ .text.main     0x00000000080005a0       0x16 Core/Src/main.o
+                0x00000000080005a0                main
+ *fill*         0x00000000080005b6        0x2 
  .text.SystemClock_Config
-                0x0000000008000624       0x66 Core/Src/main.o
-                0x0000000008000624                SystemClock_Config
+                0x00000000080005b8       0xd4 Core/Src/main.o
+                0x00000000080005b8                SystemClock_Config
+ .text.MX_RTC_Init
+                0x000000000800068c       0x50 Core/Src/main.o
+ .text.MX_GPIO_Init
+                0x00000000080006dc       0x60 Core/Src/main.o
+ .text.Error_Handler
+                0x000000000800073c        0xe Core/Src/main.o
+                0x000000000800073c                Error_Handler
+ *fill*         0x000000000800074a        0x2 
+ .text.HAL_MspInit
+                0x000000000800074c       0x48 Core/Src/stm32l4xx_hal_msp.o
+                0x000000000800074c                HAL_MspInit
+ .text.HAL_RTC_MspInit
+                0x0000000008000794       0x38 Core/Src/stm32l4xx_hal_msp.o
+                0x0000000008000794                HAL_RTC_MspInit
  .text.NMI_Handler
-                0x000000000800068a        0xe Core/Src/stm32l4xx_it.o
-                0x000000000800068a                NMI_Handler
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+
+.rodata         0x0000000008000e40        0x0
+                0x0000000008000e40                . = ALIGN (0x4)
  *(.rodata)
  *(.rodata*)
- .rodata.AHBPrescTable
-                0x00000000080009bc       0x10 Core/Src/system_stm32l4xx.o
-                0x00000000080009bc                AHBPrescTable
- .rodata.MSIRangeTable
-                0x00000000080009cc       0x30 Core/Src/system_stm32l4xx.o
-                0x00000000080009cc                MSIRangeTable
-                0x00000000080009fc                . = ALIGN (0x4)
+                0x0000000008000e40                . = ALIGN (0x4)
 
-.rel.dyn        0x00000000080009fc        0x0
- .rel.iplt      0x00000000080009fc        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-
-.ARM.extab      0x00000000080009fc        0x0
-                0x00000000080009fc                . = ALIGN (0x4)
+.ARM.extab      0x0000000008000e40        0x0
+                0x0000000008000e40                . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x00000000080009fc                . = ALIGN (0x4)
+                0x0000000008000e40                . = ALIGN (0x4)
 
-.ARM            0x00000000080009fc        0x0
-                0x00000000080009fc                . = ALIGN (0x4)
-                0x00000000080009fc                __exidx_start = .
+.ARM            0x0000000008000e40        0x0
+                0x0000000008000e40                . = ALIGN (0x4)
+                0x0000000008000e40                __exidx_start = .
  *(.ARM.exidx*)
-                0x00000000080009fc                __exidx_end = .
-                0x00000000080009fc                . = ALIGN (0x4)
+                0x0000000008000e40                __exidx_end = .
+                0x0000000008000e40                . = ALIGN (0x4)
 
-.preinit_array  0x00000000080009fc        0x0
-                0x00000000080009fc                . = ALIGN (0x4)
-                0x00000000080009fc                PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0000000008000e40        0x0
+                0x0000000008000e40                . = ALIGN (0x4)
+                0x0000000008000e40                PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x00000000080009fc                PROVIDE (__preinit_array_end = .)
-                0x00000000080009fc                . = ALIGN (0x4)
+                0x0000000008000e40                PROVIDE (__preinit_array_end = .)
+                0x0000000008000e40                . = ALIGN (0x4)
 
-.init_array     0x00000000080009fc        0x4
-                0x00000000080009fc                . = ALIGN (0x4)
-                0x00000000080009fc                PROVIDE (__init_array_start = .)
+.init_array     0x0000000008000e40        0x4
+                0x0000000008000e40                . = ALIGN (0x4)
+                0x0000000008000e40                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x00000000080009fc        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                0x0000000008000a00                PROVIDE (__init_array_end = .)
-                0x0000000008000a00                . = ALIGN (0x4)
+ .init_array    0x0000000008000e40        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                0x0000000008000e44                PROVIDE (__init_array_end = .)
+                0x0000000008000e44                . = ALIGN (0x4)
 
-.fini_array     0x0000000008000a00        0x4
-                0x0000000008000a00                . = ALIGN (0x4)
+.fini_array     0x0000000008000e44        0x4
+                0x0000000008000e44                . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0000000008000a00        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .fini_array    0x0000000008000e44        0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x0000000008000a04                . = ALIGN (0x4)
-                0x0000000008000a04                _sidata = LOADADDR (.data)
+                0x0000000008000e48                . = ALIGN (0x4)
+                0x0000000008000e48                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000        0x4 load address 0x0000000008000a04
+.data           0x0000000020000000        0xc load address 0x0000000008000e48
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -1064,40 +3476,45 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .data.SystemCoreClock
                 0x0000000020000000        0x4 Core/Src/system_stm32l4xx.o
                 0x0000000020000000                SystemCoreClock
-                0x0000000020000004                . = ALIGN (0x4)
-                0x0000000020000004                _edata = .
+ .data.uwTickPrio
+                0x0000000020000004        0x4 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+                0x0000000020000004                uwTickPrio
+ .data.uwTickFreq
+                0x0000000020000008        0x1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+                0x0000000020000008                uwTickFreq
+                0x000000002000000c                . = ALIGN (0x4)
+ *fill*         0x0000000020000009        0x3 
+                0x000000002000000c                _edata = .
 
-.igot.plt       0x0000000020000004        0x0 load address 0x0000000008000a08
- .igot.plt      0x0000000020000004        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                0x0000000020000004                . = ALIGN (0x4)
+.igot.plt       0x000000002000000c        0x0 load address 0x0000000008000e54
+ .igot.plt      0x000000002000000c        0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                0x000000002000000c                . = ALIGN (0x4)
 
-.bss            0x0000000020000004       0x24 load address 0x0000000008000a08
-                0x0000000020000004                _sbss = .
-                0x0000000020000004                __bss_start__ = _sbss
+.bss            0x000000002000000c       0x44 load address 0x0000000008000e54
+                0x000000002000000c                _sbss = .
+                0x000000002000000c                __bss_start__ = _sbss
  *(.bss)
- .bss           0x0000000020000004       0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .bss           0x000000002000000c       0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
  *(.bss*)
- .bss.msTicks   0x0000000020000020        0x4 Core/Src/main.o
-                0x0000000020000020                msTicks
- .bss.blue_mode
-                0x0000000020000024        0x1 Core/Src/main.o
-                0x0000000020000024                blue_mode
  *(COMMON)
-                0x0000000020000028                . = ALIGN (0x4)
- *fill*         0x0000000020000025        0x3 
-                0x0000000020000028                _ebss = .
-                0x0000000020000028                __bss_end__ = _ebss
+ COMMON         0x0000000020000028       0x24 Core/Src/main.o
+                0x0000000020000028                hrtc
+ COMMON         0x000000002000004c        0x4 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+                0x000000002000004c                uwTick
+                0x0000000020000050                . = ALIGN (0x4)
+                0x0000000020000050                _ebss = .
+                0x0000000020000050                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000028      0x600 load address 0x0000000008000a08
-                0x0000000020000028                . = ALIGN (0x8)
+                0x0000000020000050      0x600 load address 0x0000000008000e54
+                0x0000000020000050                . = ALIGN (0x8)
                 [!provide]                        PROVIDE (end = .)
-                0x0000000020000028                PROVIDE (_end = .)
-                0x0000000020000228                . = (. + _Min_Heap_Size)
- *fill*         0x0000000020000028      0x200 
-                0x0000000020000628                . = (. + _Min_Stack_Size)
- *fill*         0x0000000020000228      0x400 
-                0x0000000020000628                . = ALIGN (0x8)
+                [!provide]                        PROVIDE (_end = .)
+                0x0000000020000250                . = (. + _Min_Heap_Size)
+ *fill*         0x0000000020000050      0x200 
+                0x0000000020000650                . = (. + _Min_Stack_Size)
+ *fill*         0x0000000020000250      0x400 
+                0x0000000020000650                . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -1112,9 +3529,9 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .ARM.attributes
                 0x0000000000000022       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
  .ARM.attributes
-                0x0000000000000056       0x39 Core/Src/gpio.o
+                0x0000000000000056       0x39 Core/Src/main.o
  .ARM.attributes
-                0x000000000000008f       0x39 Core/Src/main.o
+                0x000000000000008f       0x39 Core/Src/stm32l4xx_hal_msp.o
  .ARM.attributes
                 0x00000000000000c8       0x39 Core/Src/stm32l4xx_it.o
  .ARM.attributes
@@ -1122,120 +3539,179 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .ARM.attributes
                 0x000000000000013a       0x21 Core/Startup/startup_stm32l476rgtx.o
  .ARM.attributes
-                0x000000000000015b       0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+                0x000000000000015b       0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
  .ARM.attributes
-                0x0000000000000194       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+                0x0000000000000194       0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
  .ARM.attributes
-                0x00000000000001c8       0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+                0x00000000000001cd       0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .ARM.attributes
+                0x0000000000000206       0x39 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .ARM.attributes
+                0x000000000000023f       0x34 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .ARM.attributes
+                0x0000000000000273       0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
 OUTPUT(L476_ats_blink-master.elf elf32-littlearm)
 
-.debug_info     0x0000000000000000     0x22b2
- .debug_info    0x0000000000000000      0x682 Core/Src/gpio.o
- .debug_info    0x0000000000000682      0x853 Core/Src/main.o
- .debug_info    0x0000000000000ed5      0x1e6 Core/Src/stm32l4xx_it.o
- .debug_info    0x00000000000010bb      0x5b4 Core/Src/system_stm32l4xx.o
- .debug_info    0x000000000000166f       0x22 Core/Startup/startup_stm32l476rgtx.o
- .debug_info    0x0000000000001691      0xc21 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+.debug_info     0x0000000000000000     0x5a68
+ .debug_info    0x0000000000000000      0xeaf Core/Src/main.o
+ .debug_info    0x0000000000000eaf      0x911 Core/Src/stm32l4xx_hal_msp.o
+ .debug_info    0x00000000000017c0      0x36f Core/Src/stm32l4xx_it.o
+ .debug_info    0x0000000000001b2f      0x727 Core/Src/system_stm32l4xx.o
+ .debug_info    0x0000000000002256       0x22 Core/Startup/startup_stm32l476rgtx.o
+ .debug_info    0x0000000000002278      0xc20 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_info    0x0000000000002e98      0xf6d Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_info    0x0000000000003e05      0xecf Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_info    0x0000000000004cd4      0xd94 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_abbrev   0x0000000000000000      0x771
- .debug_abbrev  0x0000000000000000      0x1ee Core/Src/gpio.o
- .debug_abbrev  0x00000000000001ee      0x162 Core/Src/main.o
- .debug_abbrev  0x0000000000000350       0xa3 Core/Src/stm32l4xx_it.o
- .debug_abbrev  0x00000000000003f3      0x134 Core/Src/system_stm32l4xx.o
- .debug_abbrev  0x0000000000000527       0x12 Core/Startup/startup_stm32l476rgtx.o
- .debug_abbrev  0x0000000000000539      0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+.debug_abbrev   0x0000000000000000      0xea3
+ .debug_abbrev  0x0000000000000000      0x1f4 Core/Src/main.o
+ .debug_abbrev  0x00000000000001f4      0x157 Core/Src/stm32l4xx_hal_msp.o
+ .debug_abbrev  0x000000000000034b       0xf1 Core/Src/stm32l4xx_it.o
+ .debug_abbrev  0x000000000000043c      0x150 Core/Src/system_stm32l4xx.o
+ .debug_abbrev  0x000000000000058c       0x12 Core/Startup/startup_stm32l476rgtx.o
+ .debug_abbrev  0x000000000000059e      0x1fb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_abbrev  0x0000000000000799      0x2fa Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_abbrev  0x0000000000000a93      0x1d8 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_abbrev  0x0000000000000c6b      0x238 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_aranges  0x0000000000000000      0x2e0
+.debug_aranges  0x0000000000000000      0x630
  .debug_aranges
-                0x0000000000000000       0x60 Core/Src/gpio.o
+                0x0000000000000000      0x110 Core/Src/main.o
  .debug_aranges
-                0x0000000000000060       0xa0 Core/Src/main.o
+                0x0000000000000110       0x30 Core/Src/stm32l4xx_hal_msp.o
  .debug_aranges
-                0x0000000000000100       0x58 Core/Src/stm32l4xx_it.o
+                0x0000000000000140       0x60 Core/Src/stm32l4xx_it.o
  .debug_aranges
-                0x0000000000000158       0x28 Core/Src/system_stm32l4xx.o
+                0x00000000000001a0       0x28 Core/Src/system_stm32l4xx.o
  .debug_aranges
-                0x0000000000000180       0x28 Core/Startup/startup_stm32l476rgtx.o
+                0x00000000000001c8       0x28 Core/Startup/startup_stm32l476rgtx.o
  .debug_aranges
-                0x00000000000001a8      0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+                0x00000000000001f0      0x130 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_aranges
+                0x0000000000000320      0x118 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_aranges
+                0x0000000000000438       0xc0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_aranges
+                0x00000000000004f8      0x138 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_ranges   0x0000000000000000      0x288
- .debug_ranges  0x0000000000000000       0x50 Core/Src/gpio.o
- .debug_ranges  0x0000000000000050       0x90 Core/Src/main.o
- .debug_ranges  0x00000000000000e0       0x48 Core/Src/stm32l4xx_it.o
- .debug_ranges  0x0000000000000128       0x18 Core/Src/system_stm32l4xx.o
- .debug_ranges  0x0000000000000140       0x20 Core/Startup/startup_stm32l476rgtx.o
- .debug_ranges  0x0000000000000160      0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+.debug_ranges   0x0000000000000000      0x5a8
+ .debug_ranges  0x0000000000000000      0x100 Core/Src/main.o
+ .debug_ranges  0x0000000000000100       0x20 Core/Src/stm32l4xx_hal_msp.o
+ .debug_ranges  0x0000000000000120       0x50 Core/Src/stm32l4xx_it.o
+ .debug_ranges  0x0000000000000170       0x18 Core/Src/system_stm32l4xx.o
+ .debug_ranges  0x0000000000000188       0x20 Core/Startup/startup_stm32l476rgtx.o
+ .debug_ranges  0x00000000000001a8      0x120 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_ranges  0x00000000000002c8      0x108 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_ranges  0x00000000000003d0       0xb0 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_ranges  0x0000000000000480      0x128 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_macro    0x0000000000000000    0x1e120
- .debug_macro   0x0000000000000000      0x102 Core/Src/gpio.o
- .debug_macro   0x0000000000000102      0xaa8 Core/Src/gpio.o
- .debug_macro   0x0000000000000baa       0x2e Core/Src/gpio.o
- .debug_macro   0x0000000000000bd8       0x28 Core/Src/gpio.o
- .debug_macro   0x0000000000000c00       0x22 Core/Src/gpio.o
- .debug_macro   0x0000000000000c22       0x8e Core/Src/gpio.o
- .debug_macro   0x0000000000000cb0       0x51 Core/Src/gpio.o
- .debug_macro   0x0000000000000d01       0xef Core/Src/gpio.o
- .debug_macro   0x0000000000000df0       0x6a Core/Src/gpio.o
- .debug_macro   0x0000000000000e5a      0x1df Core/Src/gpio.o
- .debug_macro   0x0000000000001039       0x1c Core/Src/gpio.o
- .debug_macro   0x0000000000001055       0x22 Core/Src/gpio.o
- .debug_macro   0x0000000000001077      0x101 Core/Src/gpio.o
- .debug_macro   0x0000000000001178     0x1011 Core/Src/gpio.o
- .debug_macro   0x0000000000002189      0x11f Core/Src/gpio.o
- .debug_macro   0x00000000000022a8    0x1a13d Core/Src/gpio.o
- .debug_macro   0x000000000001c3e5       0x43 Core/Src/gpio.o
- .debug_macro   0x000000000001c428      0x1b9 Core/Src/gpio.o
- .debug_macro   0x000000000001c5e1      0x16a Core/Src/gpio.o
- .debug_macro   0x000000000001c74b      0x10e Core/Src/main.o
- .debug_macro   0x000000000001c859      0x716 Core/Src/main.o
- .debug_macro   0x000000000001cf6f      0x2f5 Core/Src/main.o
- .debug_macro   0x000000000001d264       0xa7 Core/Src/main.o
- .debug_macro   0x000000000001d30b      0x1a7 Core/Src/main.o
- .debug_macro   0x000000000001d4b2      0x142 Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001d5f4      0x1bf Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001d7b3      0x164 Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001d917      0x208 Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001db1f      0x2cb Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001ddea       0x22 Core/Src/stm32l4xx_it.o
- .debug_macro   0x000000000001de0c       0xd4 Core/Src/system_stm32l4xx.o
- .debug_macro   0x000000000001dee0      0x19f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
- .debug_macro   0x000000000001e07f       0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+.debug_macro    0x0000000000000000    0x26368
+ .debug_macro   0x0000000000000000      0x22f Core/Src/main.o
+ .debug_macro   0x000000000000022f      0xaae Core/Src/main.o
+ .debug_macro   0x0000000000000cdd      0x17a Core/Src/main.o
+ .debug_macro   0x0000000000000e57       0x2e Core/Src/main.o
+ .debug_macro   0x0000000000000e85       0x28 Core/Src/main.o
+ .debug_macro   0x0000000000000ead       0x22 Core/Src/main.o
+ .debug_macro   0x0000000000000ecf       0x8e Core/Src/main.o
+ .debug_macro   0x0000000000000f5d       0x51 Core/Src/main.o
+ .debug_macro   0x0000000000000fae       0xef Core/Src/main.o
+ .debug_macro   0x000000000000109d       0x6a Core/Src/main.o
+ .debug_macro   0x0000000000001107      0x1df Core/Src/main.o
+ .debug_macro   0x00000000000012e6       0x1c Core/Src/main.o
+ .debug_macro   0x0000000000001302       0x22 Core/Src/main.o
+ .debug_macro   0x0000000000001324      0x101 Core/Src/main.o
+ .debug_macro   0x0000000000001425     0x1011 Core/Src/main.o
+ .debug_macro   0x0000000000002436      0x11f Core/Src/main.o
+ .debug_macro   0x0000000000002555    0x1a13d Core/Src/main.o
+ .debug_macro   0x000000000001c692       0x43 Core/Src/main.o
+ .debug_macro   0x000000000001c6d5     0x3890 Core/Src/main.o
+ .debug_macro   0x000000000001ff65      0x174 Core/Src/main.o
+ .debug_macro   0x00000000000200d9       0x5c Core/Src/main.o
+ .debug_macro   0x0000000000020135     0x155f Core/Src/main.o
+ .debug_macro   0x0000000000021694      0x59e Core/Src/main.o
+ .debug_macro   0x0000000000021c32      0x13d Core/Src/main.o
+ .debug_macro   0x0000000000021d6f      0x18b Core/Src/main.o
+ .debug_macro   0x0000000000021efa      0x26b Core/Src/main.o
+ .debug_macro   0x0000000000022165      0x23d Core/Src/main.o
+ .debug_macro   0x00000000000223a2      0x241 Core/Src/main.o
+ .debug_macro   0x00000000000225e3      0x37c Core/Src/main.o
+ .debug_macro   0x000000000002295f       0xd6 Core/Src/main.o
+ .debug_macro   0x0000000000022a35      0x22c Core/Src/main.o
+ .debug_macro   0x0000000000022c61       0x61 Core/Src/main.o
+ .debug_macro   0x0000000000022cc2       0xa5 Core/Src/main.o
+ .debug_macro   0x0000000000022d67      0x122 Core/Src/main.o
+ .debug_macro   0x0000000000022e89      0x3e9 Core/Src/main.o
+ .debug_macro   0x0000000000023272      0x31a Core/Src/main.o
+ .debug_macro   0x000000000002358c      0x4fb Core/Src/main.o
+ .debug_macro   0x0000000000023a87       0xe4 Core/Src/main.o
+ .debug_macro   0x0000000000023b6b      0x331 Core/Src/main.o
+ .debug_macro   0x0000000000023e9c      0x708 Core/Src/main.o
+ .debug_macro   0x00000000000245a4      0x1bf Core/Src/main.o
+ .debug_macro   0x0000000000024763      0x2f5 Core/Src/main.o
+ .debug_macro   0x0000000000024a58      0x164 Core/Src/main.o
+ .debug_macro   0x0000000000024bbc      0x1a7 Core/Src/main.o
+ .debug_macro   0x0000000000024d63       0xa7 Core/Src/main.o
+ .debug_macro   0x0000000000024e0a      0x208 Core/Src/main.o
+ .debug_macro   0x0000000000025012      0x2cb Core/Src/main.o
+ .debug_macro   0x00000000000252dd      0x16a Core/Src/main.o
+ .debug_macro   0x0000000000025447      0x22f Core/Src/stm32l4xx_hal_msp.o
+ .debug_macro   0x0000000000025676      0x239 Core/Src/stm32l4xx_it.o
+ .debug_macro   0x00000000000258af      0x1d0 Core/Src/system_stm32l4xx.o
+ .debug_macro   0x0000000000025a7f      0x218 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_macro   0x0000000000025c97      0x1ca Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_macro   0x0000000000025e61      0x1cb Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_macro   0x000000000002602c      0x29b Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_macro   0x00000000000262c7       0xa1 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_line     0x0000000000000000     0x2035
- .debug_line    0x0000000000000000      0x58c Core/Src/gpio.o
- .debug_line    0x000000000000058c      0x687 Core/Src/main.o
- .debug_line    0x0000000000000c13      0x613 Core/Src/stm32l4xx_it.o
- .debug_line    0x0000000000001226      0x496 Core/Src/system_stm32l4xx.o
- .debug_line    0x00000000000016bc       0x87 Core/Startup/startup_stm32l476rgtx.o
- .debug_line    0x0000000000001743      0x8f2 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+.debug_line     0x0000000000000000     0x4aac
+ .debug_line    0x0000000000000000      0xa48 Core/Src/main.o
+ .debug_line    0x0000000000000a48      0x7cc Core/Src/stm32l4xx_hal_msp.o
+ .debug_line    0x0000000000001214      0x84a Core/Src/stm32l4xx_it.o
+ .debug_line    0x0000000000001a5e      0x6eb Core/Src/system_stm32l4xx.o
+ .debug_line    0x0000000000002149       0x87 Core/Startup/startup_stm32l476rgtx.o
+ .debug_line    0x00000000000021d0      0x961 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_line    0x0000000000002b31      0x9e9 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_line    0x000000000000351a      0xa6f Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_line    0x0000000000003f89      0xb23 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_str      0x0000000000000000    0xa94c1
- .debug_str     0x0000000000000000    0x9f87a Core/Src/gpio.o
-                                      0x9fa3d (size before relaxing)
- .debug_str     0x000000000009f87a     0x6082 Core/Src/main.o
-                                      0xa595a (size before relaxing)
- .debug_str     0x00000000000a58fc     0x2c92 Core/Src/stm32l4xx_it.o
-                                      0xa821a (size before relaxing)
- .debug_str     0x00000000000a858e       0x7f Core/Src/system_stm32l4xx.o
-                                      0x9e61f (size before relaxing)
- .debug_str     0x00000000000a860d       0x36 Core/Startup/startup_stm32l476rgtx.o
+.debug_str      0x0000000000000000    0xeeb27
+ .debug_str     0x0000000000000000    0xecaa8 Core/Src/main.o
+                                      0xedb00 (size before relaxing)
+ .debug_str     0x00000000000ecaa8       0x4e Core/Src/stm32l4xx_hal_msp.o
+                                      0xed740 (size before relaxing)
+ .debug_str     0x00000000000ecaf6       0xbd Core/Src/stm32l4xx_it.o
+                                      0xed422 (size before relaxing)
+ .debug_str     0x00000000000ecbb3       0xcd Core/Src/system_stm32l4xx.o
+                                      0xe3967 (size before relaxing)
+ .debug_str     0x00000000000ecc80       0x36 Core/Startup/startup_stm32l476rgtx.o
                                          0x70 (size before relaxing)
- .debug_str     0x00000000000a8643      0xe7e Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
-                                      0xa52e5 (size before relaxing)
+ .debug_str     0x00000000000eccb6      0xa06 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+                                      0xe444b (size before relaxing)
+ .debug_str     0x00000000000ed6bc      0x3a6 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+                                      0xe41bb (size before relaxing)
+ .debug_str     0x00000000000eda62      0x2fd Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+                                      0xe3d33 (size before relaxing)
+ .debug_str     0x00000000000edd5f      0xdc8 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+                                      0xea59b (size before relaxing)
 
 .comment        0x0000000000000000       0x7b
- .comment       0x0000000000000000       0x7b Core/Src/gpio.o
+ .comment       0x0000000000000000       0x7b Core/Src/main.o
                                          0x7c (size before relaxing)
- .comment       0x000000000000007b       0x7c Core/Src/main.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32l4xx_hal_msp.o
  .comment       0x000000000000007b       0x7c Core/Src/stm32l4xx_it.o
  .comment       0x000000000000007b       0x7c Core/Src/system_stm32l4xx.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
  .comment       0x000000000000007b       0x7c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
 
-.debug_frame    0x0000000000000000      0xa20
- .debug_frame   0x0000000000000000      0x15c Core/Src/gpio.o
- .debug_frame   0x000000000000015c      0x254 Core/Src/main.o
- .debug_frame   0x00000000000003b0       0xf0 Core/Src/stm32l4xx_it.o
- .debug_frame   0x00000000000004a0       0x58 Core/Src/system_stm32l4xx.o
- .debug_frame   0x00000000000004f8      0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
- .debug_frame   0x00000000000009f4       0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+.debug_frame    0x0000000000000000     0x17b4
+ .debug_frame   0x0000000000000000      0x444 Core/Src/main.o
+ .debug_frame   0x0000000000000444       0x88 Core/Src/stm32l4xx_hal_msp.o
+ .debug_frame   0x00000000000004cc      0x10c Core/Src/stm32l4xx_it.o
+ .debug_frame   0x00000000000005d8       0x58 Core/Src/system_stm32l4xx.o
+ .debug_frame   0x0000000000000630      0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
+ .debug_frame   0x0000000000000ac8      0x498 Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
+ .debug_frame   0x0000000000000f60      0x32c Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o
+ .debug_frame   0x000000000000128c      0x4fc Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o
+ .debug_frame   0x0000000000001788       0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
diff --git a/L476_ats_blink-master/Debug/objects.list b/L476_ats_blink-master/Debug/objects.list
index c4d2e3c..e75b384 100644
--- a/L476_ats_blink-master/Debug/objects.list
+++ b/L476_ats_blink-master/Debug/objects.list
@@ -1,11 +1,26 @@
-"Core/Src/gpio.o"
 "Core/Src/main.o"
+"Core/Src/stm32l4xx_hal_msp.o"
 "Core/Src/stm32l4xx_it.o"
-"Core/Src/syscalls.o"
-"Core/Src/sysmem.o"
 "Core/Src/system_stm32l4xx.o"
 "Core/Startup/startup_stm32l476rgtx.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.o"
+"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.o"
 "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.o"
-"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.o"
-"Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_pwr.o"
 "Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.o"
diff --git a/L476_ats_blink-master/L476_ats_blink-master.ioc b/L476_ats_blink-master/L476_ats_blink-master.ioc
index aaace26..b8c2a75 100644
--- a/L476_ats_blink-master/L476_ats_blink-master.ioc
+++ b/L476_ats_blink-master/L476_ats_blink-master.ioc
@@ -4,16 +4,20 @@ KeepUserPlacement=false
 Mcu.Family=STM32L4
 Mcu.IP0=NVIC
 Mcu.IP1=RCC
-Mcu.IP2=SYS
-Mcu.IPNb=3
+Mcu.IP2=RTC
+Mcu.IP3=SYS
+Mcu.IPNb=4
 Mcu.Name=STM32L476R(C-E-G)Tx
 Mcu.Package=LQFP64
-Mcu.Pin0=PA13 (JTMS-SWDIO)
-Mcu.Pin1=PA14 (JTCK-SWCLK)
-Mcu.Pin2=PA15 (JTDI)
-Mcu.Pin3=PB3 (JTDO-TRACESWO)
-Mcu.Pin4=VP_SYS_VS_Systick
-Mcu.PinsNb=5
+Mcu.Pin0=PC14-OSC32_IN (PC14)
+Mcu.Pin1=PC15-OSC32_OUT (PC15)
+Mcu.Pin2=PA13 (JTMS-SWDIO)
+Mcu.Pin3=PA14 (JTCK-SWCLK)
+Mcu.Pin4=PA15 (JTDI)
+Mcu.Pin5=PB3 (JTDO-TRACESWO)
+Mcu.Pin6=VP_RTC_VS_RTC_Activate
+Mcu.Pin7=VP_SYS_VS_Systick
+Mcu.PinsNb=8
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32L476RGTx
@@ -38,6 +42,10 @@ PA15\ (JTDI).Mode=JTAG_4_pins
 PA15\ (JTDI).Signal=SYS_JTDI
 PB3\ (JTDO-TRACESWO).Mode=JTAG_4_pins
 PB3\ (JTDO-TRACESWO).Signal=SYS_JTDO-SWO
+PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
+PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
+PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator
+PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
@@ -82,12 +90,12 @@ RCC.HSI_VALUE=16000000
 RCC.I2C1Freq_Value=24000000
 RCC.I2C2Freq_Value=24000000
 RCC.I2C3Freq_Value=24000000
-RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.LCDFreq_Value=32768
 RCC.LPTIM1Freq_Value=24000000
 RCC.LPTIM2Freq_Value=24000000
 RCC.LPUART1Freq_Value=24000000
 RCC.LSCOPinFreq_Value=32000
-RCC.LSE_VALUE=32768
 RCC.LSI_VALUE=32000
 RCC.MCO1PinFreq_Value=24000000
 RCC.MSI_VALUE=4000000
@@ -102,6 +110,8 @@ RCC.PLLSAI1RoutputFreq_Value=16000000
 RCC.PLLSAI2PoutputFreq_Value=4571428.571428572
 RCC.PLLSAI2RoutputFreq_Value=16000000
 RCC.PWRFreq_Value=24000000
+RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
+RCC.RTCFreq_Value=32768
 RCC.SAI1Freq_Value=4571428.571428572
 RCC.SAI2Freq_Value=4571428.571428572
 RCC.SWPMI1Freq_Value=24000000
@@ -116,6 +126,8 @@ RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=96000000
 RCC.VCOSAI1OutputFreq_Value=32000000
 RCC.VCOSAI2OutputFreq_Value=32000000
+VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
+VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom