first commit
This commit is contained in:
Barbanson Adrien
commit
4d361e1f24
13 changed files with 5451 additions and 0 deletions
1352
PjtKEIL_StepDeb_1/BacASable.uvprojx
Executable file
1352
PjtKEIL_StepDeb_1/BacASable.uvprojx
Executable file
File diff suppressed because it is too large
Load diff
61
PjtKEIL_StepDeb_1/Src/Delay.s
Executable file
61
PjtKEIL_StepDeb_1/Src/Delay.s
Executable file
|
|
@ -0,0 +1,61 @@
|
|||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; ====================== zone de réservation de données, ======================================
|
||||
;Section RAM (read only) :
|
||||
area mesdata,data,readonly
|
||||
|
||||
|
||||
;Section RAM (read write):
|
||||
area maram,data,readwrite
|
||||
|
||||
VarTime dcd 0 ; retournera une adresse où sera stocké le zéro
|
||||
|
||||
EXPORT VarTime
|
||||
; ===============================================================================================
|
||||
|
||||
;constantes (équivalent du #define en C)
|
||||
TimeValue equ 900000 ; le compilateur va remplacer simplement timevalue par le nombre
|
||||
|
||||
|
||||
EXPORT Delay_100ms ; la fonction Delay_100ms est rendue publique donc utilisable par d'autres modules.
|
||||
|
||||
|
||||
;Section ROM code (read only) :
|
||||
area moncode,code,readonly
|
||||
|
||||
|
||||
|
||||
; REMARQUE IMPORTANTE
|
||||
; Cette manière de créer une temporisation n'est clairement pas la bonne manière de procéder :
|
||||
; - elle est peu précise
|
||||
; - la fonction prend tout le temps CPU pour... ne rien faire...
|
||||
;
|
||||
; Pour autant, la fonction montre :
|
||||
; - les boucles en ASM
|
||||
; - l'accés écr/lec de variable en RAM
|
||||
; - le mécanisme d'appel / retour sous programme
|
||||
;
|
||||
; et donc possède un intérêt pour débuter en ASM pur
|
||||
|
||||
Delay_100ms proc
|
||||
|
||||
ldr r0,=VarTime
|
||||
|
||||
ldr r1,=TimeValue
|
||||
str r1,[r0]
|
||||
|
||||
BoucleTempo
|
||||
; on s'occupe de décrémenter le compteur de TimeValue à zéro
|
||||
ldr r1,[r0]
|
||||
|
||||
subs r1,#1
|
||||
str r1,[r0]
|
||||
bne BoucleTempo
|
||||
|
||||
bx lr
|
||||
endp
|
||||
|
||||
|
||||
END
|
||||
35
PjtKEIL_StepDeb_1/Src/principal.c
Executable file
35
PjtKEIL_StepDeb_1/Src/principal.c
Executable file
|
|
@ -0,0 +1,35 @@
|
|||
#include "DriverJeuLaser.h"
|
||||
|
||||
extern void Delay_100ms(void);
|
||||
|
||||
int x;
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
// ===========================================================================
|
||||
// ============= INIT PERIPH (faites qu'une seule fois) =====================
|
||||
// ===========================================================================
|
||||
|
||||
// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
|
||||
CLOCK_Configure();
|
||||
|
||||
// configuration de PortB.1 (PB1) en sortie push-pull
|
||||
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
|
||||
|
||||
|
||||
|
||||
|
||||
//============================================================================
|
||||
|
||||
|
||||
while (1)
|
||||
{
|
||||
Delay_100ms();
|
||||
x=1;
|
||||
GPIOB_Set(1);
|
||||
Delay_100ms();
|
||||
GPIOB_Clear(1);
|
||||
x=0;
|
||||
}
|
||||
}
|
||||
335
PjtKEIL_StepDeb_1/Src/startup-rvds.s
Executable file
335
PjtKEIL_StepDeb_1/Src/startup-rvds.s
Executable file
|
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
||||
1352
PjtKEIL_StepDeb_2/BacASable.uvprojx
Executable file
1352
PjtKEIL_StepDeb_2/BacASable.uvprojx
Executable file
File diff suppressed because it is too large
Load diff
68
PjtKEIL_StepDeb_2/Src/Cligno.s
Executable file
68
PjtKEIL_StepDeb_2/Src/Cligno.s
Executable file
|
|
@ -0,0 +1,68 @@
|
|||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; ====================== zone de réservation de données, ======================================
|
||||
;Section RAM (read only) :
|
||||
area mesdata,data,readonly
|
||||
|
||||
|
||||
;Section RAM (read write):
|
||||
area maram,data,readwrite
|
||||
|
||||
FlagCligno dcd 0
|
||||
|
||||
EXPORT FlagCligno
|
||||
|
||||
|
||||
EXPORT timer_callback
|
||||
|
||||
; ===============================================================================================
|
||||
|
||||
include DriverJeuLaser.inc
|
||||
|
||||
|
||||
;Section ROM code (read only) :
|
||||
area moncode,code,readonly
|
||||
; écrire le code ici
|
||||
|
||||
timer_callback proc
|
||||
|
||||
;push {lr}
|
||||
|
||||
ldr r0,=FlagCligno
|
||||
|
||||
ldr r1, [r0]
|
||||
|
||||
cmp r1,#1
|
||||
|
||||
beq Eteindre
|
||||
|
||||
mov r1,#1
|
||||
str r1, [r0]
|
||||
mov r0, #1
|
||||
b GPIOB_Set
|
||||
;bl GPIOB_Set ; optimisation possible : tail branching / recursion
|
||||
|
||||
;pop {pc}
|
||||
|
||||
Eteindre
|
||||
mov r1,#0
|
||||
str r1, [r0]
|
||||
mov r0, #1
|
||||
b GPIOB_Clear
|
||||
;bl GPIOB_Clear
|
||||
;pop {pc}
|
||||
|
||||
endp
|
||||
|
||||
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
END
|
||||
70
PjtKEIL_StepDeb_2/Src/principal.c
Executable file
70
PjtKEIL_StepDeb_2/Src/principal.c
Executable file
|
|
@ -0,0 +1,70 @@
|
|||
|
||||
|
||||
#include "DriverJeuLaser.h"
|
||||
|
||||
void timer_callback(void);
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
// ===========================================================================
|
||||
// ============= INIT PERIPH (faites qu'une seule fois) =====================
|
||||
// ===========================================================================
|
||||
|
||||
// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
|
||||
CLOCK_Configure();
|
||||
|
||||
// configuration du Timer 4 en débordement 100ms
|
||||
|
||||
//** Placez votre code là ** //
|
||||
|
||||
//on a la clock a 72 Mhz donc pour avoir 100 ms il nus faut
|
||||
|
||||
// 1 sec = 72 . 10^6 donc en
|
||||
|
||||
// 7,2 Millions de cycles
|
||||
|
||||
//c'est 100 ms
|
||||
Timer_1234_Init_ff( TIM1, 7200000);
|
||||
|
||||
Active_IT_Debordement_Timer( TIM1, 2, timer_callback );
|
||||
|
||||
// Activation des interruptions issues du Timer 4
|
||||
// Association de la fonction à exécuter lors de l'interruption : timer_callback
|
||||
// cette fonction (si écrite en ASM) doit être conforme à l'AAPCS
|
||||
|
||||
//** Placez votre code là ** //
|
||||
|
||||
|
||||
|
||||
// configuration de PortB.1 (PB1) en sortie push-pull
|
||||
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
|
||||
|
||||
|
||||
|
||||
|
||||
//============================================================================
|
||||
|
||||
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//char FlagCligno;
|
||||
|
||||
//void timer_callback(void)
|
||||
//{
|
||||
// if (FlagCligno==1)
|
||||
// {
|
||||
// FlagCligno=0;
|
||||
// GPIOB_Set(1);
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// FlagCligno=1;
|
||||
// GPIOB_Clear(1);
|
||||
// }
|
||||
//
|
||||
//}
|
||||
|
||||
335
PjtKEIL_StepDeb_2/Src/startup-rvds.s
Executable file
335
PjtKEIL_StepDeb_2/Src/startup-rvds.s
Executable file
|
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
||||
88
PjtKEIL_StepSon/Src/GestionSon.s
Executable file
88
PjtKEIL_StepSon/Src/GestionSon.s
Executable file
|
|
@ -0,0 +1,88 @@
|
|||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; ====================== zone de réservation de données, ======================================
|
||||
;Section RAM (read only) :
|
||||
area mesdata,data,readonly
|
||||
|
||||
|
||||
;Section RAM (read write):
|
||||
area maram,data,readwrite
|
||||
|
||||
TableauIndex dcd 0
|
||||
SortieSon dcd 0
|
||||
|
||||
import LongueurSon
|
||||
import Son
|
||||
|
||||
; ===============================================================================================
|
||||
|
||||
export CallBackSon
|
||||
export SortieSon
|
||||
|
||||
|
||||
;Section ROM code (read only) :
|
||||
area moncode,code,readonly
|
||||
; écrire le code ici
|
||||
|
||||
|
||||
CallBackSon proc
|
||||
ldr r0, =TableauIndex
|
||||
ldr r1, [r0] ; r1 = valeur tableauIndex
|
||||
|
||||
ldr r2, =LongueurSon
|
||||
ldr r2, [r2]
|
||||
|
||||
cmp r1, r2
|
||||
bne jouer
|
||||
; dans le cas où on joue pas, on laisse la valeur à zéro
|
||||
mov r0, #0
|
||||
ldr r2, =SortieSon
|
||||
str r0, [r2]
|
||||
bx lr
|
||||
|
||||
jouer
|
||||
|
||||
; on incrémente l'index pour la prochaine fois
|
||||
add r1, #1
|
||||
; on l'écrit dans l'espace mémoire à l'avance
|
||||
str r1, [r0]
|
||||
|
||||
|
||||
|
||||
; puis on décrémente pour récupérer l'index de départ
|
||||
sub r1, #1
|
||||
|
||||
; donc r0 est maintenant libre vu que j'ai plus besoin d'aller écrire dans la mémoire l'index
|
||||
|
||||
ldr r3, =Son
|
||||
; on multiplie par deux l'index pour avoir le bon décalage qui est sur 8 bits dans ce cas
|
||||
|
||||
; dans r4 on a la valeur de l'index du tableau, je peux donc incrémenter mon index et le store pour libérer r1 dans la suite du code
|
||||
|
||||
mov r0, #2
|
||||
mul r1, r0
|
||||
ldrsh r3, [r3,r1]
|
||||
|
||||
;on met le signal en full positif
|
||||
add r3, #32768
|
||||
|
||||
; on fait une règle de trois
|
||||
mov r0, #719
|
||||
mul r3,r0
|
||||
mov r0, #65535
|
||||
udiv r3, r0
|
||||
|
||||
;r0 est libre ici car on a fini les calculs
|
||||
ldr r0, =SortieSon
|
||||
str r3, [r0] ; il faut modifier sortie son pour pouvoir être dans la plage 0;719 au lieu de -32767
|
||||
|
||||
|
||||
bx lr
|
||||
endp
|
||||
|
||||
|
||||
|
||||
|
||||
END
|
||||
38
PjtKEIL_StepSon/Src/principal.c
Executable file
38
PjtKEIL_StepSon/Src/principal.c
Executable file
|
|
@ -0,0 +1,38 @@
|
|||
|
||||
|
||||
#include "DriverJeuLaser.h"
|
||||
|
||||
extern int PeriodeSonMicroSec;
|
||||
|
||||
extern void CallBackSon(void);
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
// ===========================================================================
|
||||
// ============= INIT PERIPH (faites qu'une seule fois) =====================
|
||||
// ===========================================================================
|
||||
|
||||
// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
|
||||
CLOCK_Configure();
|
||||
|
||||
|
||||
int nbCycles = PeriodeSonMicroSec * 72; //PeriodeSonMicroSec * 0.000001 * 72 000 000
|
||||
|
||||
Timer_1234_Init_ff( TIM4, nbCycles);
|
||||
|
||||
Active_IT_Debordement_Timer( TIM4, 2, CallBackSon );
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//============================================================================
|
||||
|
||||
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
335
PjtKEIL_StepSon/Src/startup-rvds.s
Executable file
335
PjtKEIL_StepSon/Src/startup-rvds.s
Executable file
|
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
||||
1382
PjtKEIL_StepSon/StepSon.uvprojx
Executable file
1382
PjtKEIL_StepSon/StepSon.uvprojx
Executable file
File diff suppressed because it is too large
Load diff
0
README.md
Normal file
0
README.md
Normal file
Loading…
Reference in a new issue