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first commit

Barbanson Adrien 3 months ago
commit
4d361e1f24

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PjtKEIL_StepDeb_1/BacASable.uvprojx
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PjtKEIL_StepDeb_1/Src/Delay.s View File

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+	PRESERVE8
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+	THUMB   
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+		
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+
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+; ====================== zone de réservation de données,  ======================================
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+;Section RAM (read only) :
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+	area    mesdata,data,readonly
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+
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+
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+;Section RAM (read write):
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+	area    maram,data,readwrite
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+		
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+VarTime	dcd 0  ; retournera une adresse où sera stocké le zéro 
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+
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+    EXPORT VarTime
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+; ===============================================================================================
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+	
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+;constantes (équivalent du #define en C)
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+TimeValue	equ 900000 ; le compilateur va remplacer simplement timevalue par le nombre
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+
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+
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+	EXPORT Delay_100ms ; la fonction Delay_100ms est rendue publique donc utilisable par d'autres modules.
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+
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+		
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+;Section ROM code (read only) :		
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+	area    moncode,code,readonly
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+		
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+
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+
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+; REMARQUE IMPORTANTE 
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+; Cette manière de créer une temporisation n'est clairement pas la bonne manière de procéder :
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+; - elle est peu précise
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+; - la fonction prend tout le temps CPU pour... ne rien faire...
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+;
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+; Pour autant, la fonction montre :
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+; - les boucles en ASM
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+; - l'accés écr/lec de variable en RAM
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+; - le mécanisme d'appel / retour sous programme
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+;
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+; et donc possède un intérêt pour débuter en ASM pur
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+
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+Delay_100ms proc
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+	
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+	    ldr r0,=VarTime  		  
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+						  
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+		ldr r1,=TimeValue
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+		str r1,[r0]
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+		
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+BoucleTempo	
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+		; on s'occupe de décrémenter le compteur de TimeValue à zéro
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+		ldr r1,[r0]     				
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+						
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+		subs r1,#1
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+		str  r1,[r0]
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+		bne	 BoucleTempo
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+			
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+		bx lr
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+		endp
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+		
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+		
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+	END	

+ 35
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PjtKEIL_StepDeb_1/Src/principal.c View File

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+#include "DriverJeuLaser.h"
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+
3
+extern void Delay_100ms(void);
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+
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+int x;
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+
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+int main(void)
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+{
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+
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+// ===========================================================================
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+// ============= INIT PERIPH (faites qu'une seule fois)  =====================
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+// ===========================================================================
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+
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+// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
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+CLOCK_Configure();
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+
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+// configuration de PortB.1 (PB1) en sortie push-pull
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+GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
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+	
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+	
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+	
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+
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+//============================================================================	
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+	
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+	
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+while	(1)
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+	{
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+		Delay_100ms();
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+		x=1;
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+		GPIOB_Set(1);
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+		Delay_100ms();
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+		GPIOB_Clear(1);
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+		x=0;
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+	}
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+}

+ 335
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PjtKEIL_StepDeb_1/Src/startup-rvds.s View File

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1
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
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+;* File Name          : startup_stm32f10x_md.s
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+;* Author             : MCD Application Team
4
+;* Version            : V3.5.0
5
+;* Date               : 11-March-2011
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+;* Description        : STM32F10x Medium Density Devices vector table for MDK-ARM 
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+;*                      toolchain.  
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+;*                      This module performs:
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+;*                      - Set the initial SP
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+;*                      - Set the initial PC == Reset_Handler
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+;*                      - Set the vector table entries with the exceptions ISR address
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+;*                      - Configure the clock system
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+;*                      - Branches to __main in the C library (which eventually
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+;*                        calls main()).
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+;*                      After Reset the CortexM3 processor is in Thread mode,
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+;*                      priority is Privileged, and the Stack is set to Main.
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+;* <<< Use Configuration Wizard in Context Menu >>>   
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+;*******************************************************************************
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+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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+;*******************************************************************************
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+
27
+; Amount of memory (in bytes) allocated for Stack
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+; Tailor this value to your application needs
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+; <h> Stack Configuration
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+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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+; </h>
32
+
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+Stack_Size      EQU     0x00000400
34
+
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+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
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+Stack_Mem       SPACE   Stack_Size
37
+__initial_sp
38
+
39
+
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+; <h> Heap Configuration
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+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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+; </h>
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+
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+Heap_Size       EQU     0x00000200
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+
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+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
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+__heap_base
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+Heap_Mem        SPACE   Heap_Size
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+__heap_limit
50
+
51
+                PRESERVE8
52
+                THUMB
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+
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+
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+; Vector Table Mapped to Address 0 at Reset
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+                AREA    RESET, DATA, READONLY
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+                EXPORT  __Vectors
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+                EXPORT  __Vectors_End
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+                EXPORT  __Vectors_Size
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+
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+__Vectors       DCD     __initial_sp               ; Top of Stack
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+                DCD     Reset_Handler              ; Reset Handler
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+                DCD     NMI_Handler                ; NMI Handler
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+                DCD     HardFault_Handler          ; Hard Fault Handler
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+                DCD     MemManage_Handler          ; MPU Fault Handler
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+                DCD     BusFault_Handler           ; Bus Fault Handler
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+                DCD     UsageFault_Handler         ; Usage Fault Handler
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+                DCD     0                          ; Reserved
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+                DCD     0                          ; Reserved
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+                DCD     0                          ; Reserved
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+                DCD     0                          ; Reserved
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+                DCD     SVC_Handler                ; SVCall Handler
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+                DCD     DebugMon_Handler           ; Debug Monitor Handler
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+                DCD     0                          ; Reserved
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+                DCD     PendSV_Handler             ; PendSV Handler
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+                DCD     SysTick_Handler            ; SysTick Handler
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+
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+                ; External Interrupts
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+                DCD     WWDG_IRQHandler            ; Window Watchdog
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+                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
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+                DCD     TAMPER_IRQHandler          ; Tamper
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+                DCD     RTC_IRQHandler             ; RTC
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+                DCD     FLASH_IRQHandler           ; Flash
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+                DCD     RCC_IRQHandler             ; RCC
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+                DCD     EXTI0_IRQHandler           ; EXTI Line 0
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+                DCD     EXTI1_IRQHandler           ; EXTI Line 1
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+                DCD     EXTI2_IRQHandler           ; EXTI Line 2
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+                DCD     EXTI3_IRQHandler           ; EXTI Line 3
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+                DCD     EXTI4_IRQHandler           ; EXTI Line 4
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+                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
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+                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
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+                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
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+                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
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+                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
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+                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
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+                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
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+                DCD     ADC1_2_IRQHandler          ; ADC1_2
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+                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
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+                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
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+                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
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+                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
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+                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
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+                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
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+                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
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+                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
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+                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
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+                DCD     TIM2_IRQHandler            ; TIM2
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+                DCD     TIM3_IRQHandler            ; TIM3
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+                DCD     TIM4_IRQHandler            ; TIM4
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+                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
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+                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
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+                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
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+                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
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+                DCD     SPI1_IRQHandler            ; SPI1
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+                DCD     SPI2_IRQHandler            ; SPI2
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+                DCD     USART1_IRQHandler          ; USART1
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+                DCD     USART2_IRQHandler          ; USART2
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+                DCD     USART3_IRQHandler          ; USART3
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+                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
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+                DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
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+                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
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+__Vectors_End
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+
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+__Vectors_Size  EQU  __Vectors_End - __Vectors
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+
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+                AREA    |.text|, CODE, READONLY
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+
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+; Reset handler
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+Reset_Handler    PROC
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+                 EXPORT  Reset_Handler             [WEAK]
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+     IMPORT  __main
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+     
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+                 LDR     R0, =SystemInit
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+                 BLX     R0
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+
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+;
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+; Enable UsageFault, MemFault and Busfault interrupts
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+;
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+_SHCSR			EQU     0xE000ED24		; SHCSR is located at address 0xE000ED24
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+				LDR.W	R0, =_SHCSR				
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+				LDR 	R1, [R0]				; Read CPACR
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+				ORR 	R1, R1, #(0x7 << 16)	; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
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+				STR 	R1, [R0]				; Write back the modified value to the CPACR
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+				DSB								; Wait for store to complete
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+
146
+;
147
+; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
148
+;
149
+_AIRCR			EQU		0xE000ED0C
150
+_AIRCR_VAL		EQU		0x05FA0300
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+				LDR.W	R0, =_AIRCR
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+				LDR.W	R1, =_AIRCR_VAL
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+				STR		R1,[R0]
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+		
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+;
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+; Finaly, jump to main function (void main (void))
157
+;
158
+                LDR     R0, =__main
159
+                BX      R0
160
+                ENDP
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+
162
+SystemInit		PROC				 
163
+				EXPORT  SystemInit                    [WEAK]    
164
+				BX		LR
165
+				ENDP
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+
167
+; Dummy Exception Handlers (infinite loops which can be modified)
168
+
169
+NMI_Handler     PROC
170
+                EXPORT  NMI_Handler                [WEAK]
171
+                B       .
172
+                ENDP
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+HardFault_Handler\
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+                PROC
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+                EXPORT  HardFault_Handler          [WEAK]
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+                B       .
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+                ENDP
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+MemManage_Handler\
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+                PROC
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+                EXPORT  MemManage_Handler          [WEAK]
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+                B       .
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+                ENDP
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+BusFault_Handler\
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+                PROC
185
+                EXPORT  BusFault_Handler           [WEAK]
186
+                B       .
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+                ENDP
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+UsageFault_Handler\
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+                PROC
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+                EXPORT  UsageFault_Handler         [WEAK]
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+                B       .
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+                ENDP
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+SVC_Handler     PROC
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+                EXPORT  SVC_Handler                [WEAK]
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+                B       .
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+                ENDP
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+DebugMon_Handler\
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+                PROC
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+                EXPORT  DebugMon_Handler           [WEAK]
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+                B       .
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+                ENDP
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+PendSV_Handler  PROC
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+                EXPORT  PendSV_Handler             [WEAK]
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+                B       .
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+                ENDP
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+SysTick_Handler PROC
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+                EXPORT  SysTick_Handler            [WEAK]
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+                B       .
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+                ENDP
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+
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+Default_Handler PROC
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+
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+                EXPORT  WWDG_IRQHandler            [WEAK]
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+                EXPORT  PVD_IRQHandler             [WEAK]
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+                EXPORT  TAMPER_IRQHandler          [WEAK]
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+                EXPORT  RTC_IRQHandler             [WEAK]
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+                EXPORT  FLASH_IRQHandler           [WEAK]
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+                EXPORT  RCC_IRQHandler             [WEAK]
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+                EXPORT  EXTI0_IRQHandler           [WEAK]
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+                EXPORT  EXTI1_IRQHandler           [WEAK]
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+                EXPORT  EXTI2_IRQHandler           [WEAK]
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+                EXPORT  EXTI3_IRQHandler           [WEAK]
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+                EXPORT  EXTI4_IRQHandler           [WEAK]
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+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
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+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
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+                EXPORT  ADC1_2_IRQHandler          [WEAK]
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+                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
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+                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
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+                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
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+                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
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+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
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+                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
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+                EXPORT  TIM1_UP_IRQHandler         [WEAK]
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+                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
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+                EXPORT  TIM1_CC_IRQHandler         [WEAK]
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+                EXPORT  TIM2_IRQHandler            [WEAK]
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+                EXPORT  TIM3_IRQHandler            [WEAK]
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+                EXPORT  TIM4_IRQHandler            [WEAK]
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+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
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+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
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+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
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+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
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+                EXPORT  SPI1_IRQHandler            [WEAK]
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+                EXPORT  SPI2_IRQHandler            [WEAK]
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+                EXPORT  USART1_IRQHandler          [WEAK]
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+                EXPORT  USART2_IRQHandler          [WEAK]
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+                EXPORT  USART3_IRQHandler          [WEAK]
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+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
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+                EXPORT  RTCAlarm_IRQHandler        [WEAK]
255
+                EXPORT  USBWakeUp_IRQHandler       [WEAK]
256
+
257
+WWDG_IRQHandler
258
+PVD_IRQHandler
259
+TAMPER_IRQHandler
260
+RTC_IRQHandler
261
+FLASH_IRQHandler
262
+RCC_IRQHandler
263
+EXTI0_IRQHandler
264
+EXTI1_IRQHandler
265
+EXTI2_IRQHandler
266
+EXTI3_IRQHandler
267
+EXTI4_IRQHandler
268
+DMA1_Channel1_IRQHandler
269
+DMA1_Channel2_IRQHandler
270
+DMA1_Channel3_IRQHandler
271
+DMA1_Channel4_IRQHandler
272
+DMA1_Channel5_IRQHandler
273
+DMA1_Channel6_IRQHandler
274
+DMA1_Channel7_IRQHandler
275
+ADC1_2_IRQHandler
276
+USB_HP_CAN1_TX_IRQHandler
277
+USB_LP_CAN1_RX0_IRQHandler
278
+CAN1_RX1_IRQHandler
279
+CAN1_SCE_IRQHandler
280
+EXTI9_5_IRQHandler
281
+TIM1_BRK_IRQHandler
282
+TIM1_UP_IRQHandler
283
+TIM1_TRG_COM_IRQHandler
284
+TIM1_CC_IRQHandler
285
+TIM2_IRQHandler
286
+TIM3_IRQHandler
287
+TIM4_IRQHandler
288
+I2C1_EV_IRQHandler
289
+I2C1_ER_IRQHandler
290
+I2C2_EV_IRQHandler
291
+I2C2_ER_IRQHandler
292
+SPI1_IRQHandler
293
+SPI2_IRQHandler
294
+USART1_IRQHandler
295
+USART2_IRQHandler
296
+USART3_IRQHandler
297
+EXTI15_10_IRQHandler
298
+RTCAlarm_IRQHandler
299
+USBWakeUp_IRQHandler
300
+
301
+                B       .
302
+
303
+                ENDP
304
+
305
+                ALIGN
306
+
307
+;*******************************************************************************
308
+; User Stack and Heap initialization
309
+;*******************************************************************************
310
+                 IF      :DEF:__MICROLIB           
311
+                
312
+                 EXPORT  __initial_sp
313
+                 EXPORT  __heap_base
314
+                 EXPORT  __heap_limit
315
+                
316
+                 ELSE
317
+                
318
+                 IMPORT  __use_two_region_memory
319
+                 EXPORT  __user_initial_stackheap
320
+                 
321
+__user_initial_stackheap
322
+
323
+                 LDR     R0, =  Heap_Mem
324
+                 LDR     R1, =(Stack_Mem + Stack_Size)
325
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
326
+                 LDR     R3, = Stack_Mem
327
+                 BX      LR
328
+
329
+                 ALIGN
330
+
331
+                 ENDIF
332
+
333
+                 END
334
+
335
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

+ 1352
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PjtKEIL_StepDeb_2/BacASable.uvprojx
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View File


+ 68
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PjtKEIL_StepDeb_2/Src/Cligno.s View File

@@ -0,0 +1,68 @@
1
+	PRESERVE8
2
+	THUMB   
3
+		
4
+
5
+; ====================== zone de réservation de données,  ======================================
6
+;Section RAM (read only) :
7
+	area    mesdata,data,readonly
8
+
9
+
10
+;Section RAM (read write):
11
+	area    maram,data,readwrite
12
+		
13
+FlagCligno	dcd 0
14
+	
15
+   EXPORT FlagCligno
16
+
17
+
18
+   EXPORT timer_callback
19
+	
20
+; ===============================================================================================
21
+	
22
+   include	DriverJeuLaser.inc
23
+
24
+		
25
+;Section ROM code (read only) :		
26
+	area    moncode,code,readonly
27
+; écrire le code ici		
28
+
29
+timer_callback proc
30
+	
31
+	    ;push {lr}
32
+		
33
+	    ldr r0,=FlagCligno  		  
34
+		
35
+		ldr r1, [r0]
36
+			
37
+		cmp r1,#1
38
+
39
+        beq Eteindre
40
+		
41
+		mov r1,#1
42
+		str r1, [r0]
43
+		mov r0, #1
44
+		b GPIOB_Set
45
+		;bl GPIOB_Set  ; optimisation possible : tail branching / recursion
46
+		
47
+		;pop {pc}
48
+
49
+Eteindre
50
+		mov r1,#0
51
+		str r1, [r0]
52
+		mov r0, #1
53
+		b GPIOB_Clear
54
+		;bl GPIOB_Clear
55
+		;pop {pc}
56
+		
57
+		endp
58
+			
59
+		
60
+		
61
+	END	
62
+
63
+
64
+
65
+
66
+		
67
+		
68
+	END	

+ 70
- 0
PjtKEIL_StepDeb_2/Src/principal.c View File

@@ -0,0 +1,70 @@
1
+
2
+
3
+#include "DriverJeuLaser.h"
4
+
5
+void timer_callback(void);
6
+
7
+int main(void)
8
+{
9
+
10
+// ===========================================================================
11
+// ============= INIT PERIPH (faites qu'une seule fois)  =====================
12
+// ===========================================================================
13
+
14
+// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
15
+CLOCK_Configure();
16
+
17
+// configuration du Timer 4 en débordement 100ms
18
+	
19
+//** Placez votre code là ** // 
20
+
21
+	//on a la clock a 72 Mhz donc pour avoir 100 ms il nus faut 
22
+	
23
+	// 1 sec = 72 . 10^6 donc en 
24
+	
25
+	// 7,2 Millions de cycles
26
+	
27
+	//c'est 100 ms
28
+	Timer_1234_Init_ff( TIM1, 7200000);
29
+	
30
+	Active_IT_Debordement_Timer( TIM1, 2, timer_callback );
31
+	
32
+// Activation des interruptions issues du Timer 4
33
+// Association de la fonction à exécuter lors de l'interruption : timer_callback
34
+// cette fonction (si écrite en ASM) doit être conforme à l'AAPCS
35
+	
36
+//** Placez votre code là ** // 	
37
+	
38
+	
39
+	
40
+// configuration de PortB.1 (PB1) en sortie push-pull
41
+GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
42
+	
43
+	
44
+	
45
+
46
+//============================================================================	
47
+	
48
+	
49
+while	(1)
50
+	{
51
+	}
52
+}
53
+
54
+//char FlagCligno;
55
+
56
+//void timer_callback(void)
57
+//{
58
+//	if (FlagCligno==1)
59
+//	{
60
+//		FlagCligno=0;
61
+//		GPIOB_Set(1);
62
+//	}
63
+//	else
64
+//	{
65
+//		FlagCligno=1;
66
+//		GPIOB_Clear(1);
67
+//	}
68
+//		
69
+//}
70
+

+ 335
- 0
PjtKEIL_StepDeb_2/Src/startup-rvds.s View File

@@ -0,0 +1,335 @@
1
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2
+;* File Name          : startup_stm32f10x_md.s
3
+;* Author             : MCD Application Team
4
+;* Version            : V3.5.0
5
+;* Date               : 11-March-2011
6
+;* Description        : STM32F10x Medium Density Devices vector table for MDK-ARM 
7
+;*                      toolchain.  
8
+;*                      This module performs:
9
+;*                      - Set the initial SP
10
+;*                      - Set the initial PC == Reset_Handler
11
+;*                      - Set the vector table entries with the exceptions ISR address
12
+;*                      - Configure the clock system
13
+;*                      - Branches to __main in the C library (which eventually
14
+;*                        calls main()).
15
+;*                      After Reset the CortexM3 processor is in Thread mode,
16
+;*                      priority is Privileged, and the Stack is set to Main.
17
+;* <<< Use Configuration Wizard in Context Menu >>>   
18
+;*******************************************************************************
19
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25
+;*******************************************************************************
26
+
27
+; Amount of memory (in bytes) allocated for Stack
28
+; Tailor this value to your application needs
29
+; <h> Stack Configuration
30
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31
+; </h>
32
+
33
+Stack_Size      EQU     0x00000400
34
+
35
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
36
+Stack_Mem       SPACE   Stack_Size
37
+__initial_sp
38
+
39
+
40
+; <h> Heap Configuration
41
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
42
+; </h>
43
+
44
+Heap_Size       EQU     0x00000200
45
+
46
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
47
+__heap_base
48
+Heap_Mem        SPACE   Heap_Size
49
+__heap_limit
50
+
51
+                PRESERVE8
52
+                THUMB
53
+
54
+
55
+; Vector Table Mapped to Address 0 at Reset
56
+                AREA    RESET, DATA, READONLY
57
+                EXPORT  __Vectors
58
+                EXPORT  __Vectors_End
59
+                EXPORT  __Vectors_Size
60
+
61
+__Vectors       DCD     __initial_sp               ; Top of Stack
62
+                DCD     Reset_Handler              ; Reset Handler
63
+                DCD     NMI_Handler                ; NMI Handler
64
+                DCD     HardFault_Handler          ; Hard Fault Handler
65
+                DCD     MemManage_Handler          ; MPU Fault Handler
66
+                DCD     BusFault_Handler           ; Bus Fault Handler
67
+                DCD     UsageFault_Handler         ; Usage Fault Handler
68
+                DCD     0                          ; Reserved
69
+                DCD     0                          ; Reserved
70
+                DCD     0                          ; Reserved
71
+                DCD     0                          ; Reserved
72
+                DCD     SVC_Handler                ; SVCall Handler
73
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
74
+                DCD     0                          ; Reserved
75
+                DCD     PendSV_Handler             ; PendSV Handler
76
+                DCD     SysTick_Handler            ; SysTick Handler
77
+
78
+                ; External Interrupts
79
+                DCD     WWDG_IRQHandler            ; Window Watchdog
80
+                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
81
+                DCD     TAMPER_IRQHandler          ; Tamper
82
+                DCD     RTC_IRQHandler             ; RTC
83
+                DCD     FLASH_IRQHandler           ; Flash
84
+                DCD     RCC_IRQHandler             ; RCC
85
+                DCD     EXTI0_IRQHandler           ; EXTI Line 0
86
+                DCD     EXTI1_IRQHandler           ; EXTI Line 1
87
+                DCD     EXTI2_IRQHandler           ; EXTI Line 2
88
+                DCD     EXTI3_IRQHandler           ; EXTI Line 3
89
+                DCD     EXTI4_IRQHandler           ; EXTI Line 4
90
+                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
91
+                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
92
+                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
93
+                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
94
+                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
95
+                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
96
+                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
97
+                DCD     ADC1_2_IRQHandler          ; ADC1_2
98
+                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
99
+                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
100
+                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
101
+                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
102
+                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
103
+                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
104
+                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
105
+                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
106
+                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
107
+                DCD     TIM2_IRQHandler            ; TIM2
108
+                DCD     TIM3_IRQHandler            ; TIM3
109
+                DCD     TIM4_IRQHandler            ; TIM4
110
+                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
111
+                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
112
+                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
113
+                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
114
+                DCD     SPI1_IRQHandler            ; SPI1
115
+                DCD     SPI2_IRQHandler            ; SPI2
116
+                DCD     USART1_IRQHandler          ; USART1
117
+                DCD     USART2_IRQHandler          ; USART2
118
+                DCD     USART3_IRQHandler          ; USART3
119
+                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
120
+                DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
121
+                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
122
+__Vectors_End
123
+
124
+__Vectors_Size  EQU  __Vectors_End - __Vectors
125
+
126
+                AREA    |.text|, CODE, READONLY
127
+
128
+; Reset handler
129
+Reset_Handler    PROC
130
+                 EXPORT  Reset_Handler             [WEAK]
131
+     IMPORT  __main
132
+     
133
+                 LDR     R0, =SystemInit
134
+                 BLX     R0
135
+
136
+;
137
+; Enable UsageFault, MemFault and Busfault interrupts
138
+;
139
+_SHCSR			EQU     0xE000ED24		; SHCSR is located at address 0xE000ED24
140
+				LDR.W	R0, =_SHCSR				
141
+				LDR 	R1, [R0]				; Read CPACR
142
+				ORR 	R1, R1, #(0x7 << 16)	; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
143
+				STR 	R1, [R0]				; Write back the modified value to the CPACR
144
+				DSB								; Wait for store to complete
145
+
146
+;
147
+; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
148
+;
149
+_AIRCR			EQU		0xE000ED0C
150
+_AIRCR_VAL		EQU		0x05FA0300
151
+				LDR.W	R0, =_AIRCR
152
+				LDR.W	R1, =_AIRCR_VAL
153
+				STR		R1,[R0]
154
+		
155
+;
156
+; Finaly, jump to main function (void main (void))
157
+;
158
+                LDR     R0, =__main
159
+                BX      R0
160
+                ENDP
161
+
162
+SystemInit		PROC				 
163
+				EXPORT  SystemInit                    [WEAK]    
164
+				BX		LR
165
+				ENDP
166
+
167
+; Dummy Exception Handlers (infinite loops which can be modified)
168
+
169
+NMI_Handler     PROC
170
+                EXPORT  NMI_Handler                [WEAK]
171
+                B       .
172
+                ENDP
173
+HardFault_Handler\
174
+                PROC
175
+                EXPORT  HardFault_Handler          [WEAK]
176
+                B       .
177
+                ENDP
178
+MemManage_Handler\
179
+                PROC
180
+                EXPORT  MemManage_Handler          [WEAK]
181
+                B       .
182
+                ENDP
183
+BusFault_Handler\
184
+                PROC
185
+                EXPORT  BusFault_Handler           [WEAK]
186
+                B       .
187
+                ENDP
188
+UsageFault_Handler\
189
+                PROC
190
+                EXPORT  UsageFault_Handler         [WEAK]
191
+                B       .
192
+                ENDP
193
+SVC_Handler     PROC
194
+                EXPORT  SVC_Handler                [WEAK]
195
+                B       .
196
+                ENDP
197
+DebugMon_Handler\
198
+                PROC
199
+                EXPORT  DebugMon_Handler           [WEAK]
200
+                B       .
201
+                ENDP
202
+PendSV_Handler  PROC
203
+                EXPORT  PendSV_Handler             [WEAK]
204
+                B       .
205
+                ENDP
206
+SysTick_Handler PROC
207
+                EXPORT  SysTick_Handler            [WEAK]
208
+                B       .
209
+                ENDP
210
+
211
+Default_Handler PROC
212
+
213
+                EXPORT  WWDG_IRQHandler            [WEAK]
214
+                EXPORT  PVD_IRQHandler             [WEAK]
215
+                EXPORT  TAMPER_IRQHandler          [WEAK]
216
+                EXPORT  RTC_IRQHandler             [WEAK]
217
+                EXPORT  FLASH_IRQHandler           [WEAK]
218
+                EXPORT  RCC_IRQHandler             [WEAK]
219
+                EXPORT  EXTI0_IRQHandler           [WEAK]
220
+                EXPORT  EXTI1_IRQHandler           [WEAK]
221
+                EXPORT  EXTI2_IRQHandler           [WEAK]
222
+                EXPORT  EXTI3_IRQHandler           [WEAK]
223
+                EXPORT  EXTI4_IRQHandler           [WEAK]
224
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
225
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
226
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
227
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
228
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
229
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
230
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
231
+                EXPORT  ADC1_2_IRQHandler          [WEAK]
232
+                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
233
+                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
234
+                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
235
+                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
236
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
237
+                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
238
+                EXPORT  TIM1_UP_IRQHandler         [WEAK]
239
+                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
240
+                EXPORT  TIM1_CC_IRQHandler         [WEAK]
241
+                EXPORT  TIM2_IRQHandler            [WEAK]
242
+                EXPORT  TIM3_IRQHandler            [WEAK]
243
+                EXPORT  TIM4_IRQHandler            [WEAK]
244
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
245
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
246
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
247
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
248
+                EXPORT  SPI1_IRQHandler            [WEAK]
249
+                EXPORT  SPI2_IRQHandler            [WEAK]
250
+                EXPORT  USART1_IRQHandler          [WEAK]
251
+                EXPORT  USART2_IRQHandler          [WEAK]
252
+                EXPORT  USART3_IRQHandler          [WEAK]
253
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
254
+                EXPORT  RTCAlarm_IRQHandler        [WEAK]
255
+                EXPORT  USBWakeUp_IRQHandler       [WEAK]
256
+
257
+WWDG_IRQHandler
258
+PVD_IRQHandler
259
+TAMPER_IRQHandler
260
+RTC_IRQHandler
261
+FLASH_IRQHandler
262
+RCC_IRQHandler
263
+EXTI0_IRQHandler
264
+EXTI1_IRQHandler
265
+EXTI2_IRQHandler
266
+EXTI3_IRQHandler
267
+EXTI4_IRQHandler
268
+DMA1_Channel1_IRQHandler
269
+DMA1_Channel2_IRQHandler
270
+DMA1_Channel3_IRQHandler
271
+DMA1_Channel4_IRQHandler
272
+DMA1_Channel5_IRQHandler
273
+DMA1_Channel6_IRQHandler
274
+DMA1_Channel7_IRQHandler
275
+ADC1_2_IRQHandler
276
+USB_HP_CAN1_TX_IRQHandler
277
+USB_LP_CAN1_RX0_IRQHandler
278
+CAN1_RX1_IRQHandler
279
+CAN1_SCE_IRQHandler
280
+EXTI9_5_IRQHandler
281
+TIM1_BRK_IRQHandler
282
+TIM1_UP_IRQHandler
283
+TIM1_TRG_COM_IRQHandler
284
+TIM1_CC_IRQHandler
285
+TIM2_IRQHandler
286
+TIM3_IRQHandler
287
+TIM4_IRQHandler
288
+I2C1_EV_IRQHandler
289
+I2C1_ER_IRQHandler
290
+I2C2_EV_IRQHandler
291
+I2C2_ER_IRQHandler
292
+SPI1_IRQHandler
293
+SPI2_IRQHandler
294
+USART1_IRQHandler
295
+USART2_IRQHandler
296
+USART3_IRQHandler
297
+EXTI15_10_IRQHandler
298
+RTCAlarm_IRQHandler
299
+USBWakeUp_IRQHandler
300
+
301
+                B       .
302
+
303
+                ENDP
304
+
305
+                ALIGN
306
+
307
+;*******************************************************************************
308
+; User Stack and Heap initialization
309
+;*******************************************************************************
310
+                 IF      :DEF:__MICROLIB           
311
+                
312
+                 EXPORT  __initial_sp
313
+                 EXPORT  __heap_base
314
+                 EXPORT  __heap_limit
315
+                
316
+                 ELSE
317
+                
318
+                 IMPORT  __use_two_region_memory
319
+                 EXPORT  __user_initial_stackheap
320
+                 
321
+__user_initial_stackheap
322
+
323
+                 LDR     R0, =  Heap_Mem
324
+                 LDR     R1, =(Stack_Mem + Stack_Size)
325
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
326
+                 LDR     R3, = Stack_Mem
327
+                 BX      LR
328
+
329
+                 ALIGN
330
+
331
+                 ENDIF
332
+
333
+                 END
334
+
335
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

+ 88
- 0
PjtKEIL_StepSon/Src/GestionSon.s View File

@@ -0,0 +1,88 @@
1
+	PRESERVE8
2
+	THUMB   
3
+		
4
+
5
+; ====================== zone de réservation de données,  ======================================
6
+;Section RAM (read only) :
7
+	area    mesdata,data,readonly
8
+
9
+
10
+;Section RAM (read write):
11
+	area    maram,data,readwrite
12
+		
13
+TableauIndex   	dcd 0
14
+SortieSon    	dcd 0
15
+
16
+   import LongueurSon
17
+   import Son
18
+	
19
+; ===============================================================================================
20
+	
21
+    export CallBackSon
22
+	export SortieSon
23
+
24
+		
25
+;Section ROM code (read only) :		
26
+	area    moncode,code,readonly
27
+; écrire le code ici		
28
+
29
+
30
+CallBackSon proc 
31
+	ldr r0, =TableauIndex
32
+	ldr r1, [r0]  ; r1 = valeur tableauIndex
33
+	
34
+	ldr r2, =LongueurSon
35
+	ldr r2, [r2]
36
+		
37
+	cmp r1, r2
38
+	bne jouer
39
+	; dans le cas où on joue pas, on laisse la valeur à zéro
40
+	mov r0, #0
41
+	ldr r2, =SortieSon
42
+	str r0, [r2]
43
+	bx lr
44
+
45
+jouer
46
+
47
+	; on incrémente l'index pour la prochaine fois
48
+	add r1, #1
49
+	; on l'écrit dans l'espace mémoire à l'avance
50
+	str r1, [r0]
51
+	
52
+	
53
+	
54
+	; puis on décrémente pour récupérer l'index de départ
55
+	sub r1, #1
56
+	
57
+	; donc r0 est maintenant libre vu que j'ai plus besoin d'aller écrire dans la mémoire l'index
58
+    
59
+    ldr r3, =Son
60
+	; on multiplie par deux l'index pour avoir le bon décalage qui est sur 8 bits dans ce cas
61
+	
62
+	; dans r4 on a la valeur de l'index du tableau, je peux donc incrémenter mon index et le store pour libérer r1 dans la suite du code
63
+	
64
+	mov r0, #2
65
+	mul r1, r0
66
+	ldrsh r3, [r3,r1]	
67
+	
68
+	;on met le signal en full positif
69
+	add r3, #32768
70
+	
71
+	; on fait une règle de trois
72
+	mov r0, #719
73
+	mul r3,r0
74
+	mov r0, #65535
75
+	udiv r3, r0
76
+	
77
+	;r0 est libre ici car on a  fini les calculs
78
+	ldr r0, =SortieSon
79
+	str r3, [r0] ; il faut modifier sortie son pour pouvoir être dans la plage 0;719  au lieu de -32767
80
+	
81
+
82
+	bx lr
83
+   endp
84
+
85
+
86
+		
87
+		
88
+	END	

+ 38
- 0
PjtKEIL_StepSon/Src/principal.c View File

@@ -0,0 +1,38 @@
1
+
2
+
3
+#include "DriverJeuLaser.h"
4
+
5
+extern int PeriodeSonMicroSec;
6
+
7
+extern void CallBackSon(void);
8
+
9
+int main(void)
10
+{
11
+
12
+// ===========================================================================
13
+// ============= INIT PERIPH (faites qu'une seule fois)  =====================
14
+// ===========================================================================
15
+
16
+// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
17
+CLOCK_Configure();
18
+	
19
+	
20
+	int nbCycles = PeriodeSonMicroSec * 72;    //PeriodeSonMicroSec * 0.000001 * 72 000 000
21
+	
22
+  Timer_1234_Init_ff( TIM4, nbCycles);
23
+	
24
+  Active_IT_Debordement_Timer( TIM4, 2, CallBackSon );
25
+
26
+	
27
+
28
+	
29
+	
30
+
31
+//============================================================================	
32
+	
33
+	
34
+while	(1)
35
+	{
36
+	}
37
+}
38
+

+ 335
- 0
PjtKEIL_StepSon/Src/startup-rvds.s View File

@@ -0,0 +1,335 @@
1
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2
+;* File Name          : startup_stm32f10x_md.s
3
+;* Author             : MCD Application Team
4
+;* Version            : V3.5.0
5
+;* Date               : 11-March-2011
6
+;* Description        : STM32F10x Medium Density Devices vector table for MDK-ARM 
7
+;*                      toolchain.  
8
+;*                      This module performs:
9
+;*                      - Set the initial SP
10
+;*                      - Set the initial PC == Reset_Handler
11
+;*                      - Set the vector table entries with the exceptions ISR address
12
+;*                      - Configure the clock system
13
+;*                      - Branches to __main in the C library (which eventually
14
+;*                        calls main()).
15
+;*                      After Reset the CortexM3 processor is in Thread mode,
16
+;*                      priority is Privileged, and the Stack is set to Main.
17
+;* <<< Use Configuration Wizard in Context Menu >>>   
18
+;*******************************************************************************
19
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25
+;*******************************************************************************
26
+
27
+; Amount of memory (in bytes) allocated for Stack
28
+; Tailor this value to your application needs
29
+; <h> Stack Configuration
30
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31
+; </h>
32
+
33
+Stack_Size      EQU     0x00000400
34
+
35
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
36
+Stack_Mem       SPACE   Stack_Size
37
+__initial_sp
38
+
39
+
40
+; <h> Heap Configuration
41
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
42
+; </h>
43
+
44
+Heap_Size       EQU     0x00000200
45
+
46
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
47
+__heap_base
48
+Heap_Mem        SPACE   Heap_Size
49
+__heap_limit
50
+
51
+                PRESERVE8
52
+                THUMB
53
+
54
+
55
+; Vector Table Mapped to Address 0 at Reset
56
+                AREA    RESET, DATA, READONLY
57
+                EXPORT  __Vectors
58
+                EXPORT  __Vectors_End
59
+                EXPORT  __Vectors_Size
60
+
61
+__Vectors       DCD     __initial_sp               ; Top of Stack
62
+                DCD     Reset_Handler              ; Reset Handler
63
+                DCD     NMI_Handler                ; NMI Handler
64
+                DCD     HardFault_Handler          ; Hard Fault Handler
65
+                DCD     MemManage_Handler          ; MPU Fault Handler
66
+                DCD     BusFault_Handler           ; Bus Fault Handler
67
+                DCD     UsageFault_Handler         ; Usage Fault Handler
68
+                DCD     0                          ; Reserved
69
+                DCD     0                          ; Reserved
70
+                DCD     0                          ; Reserved
71
+                DCD     0                          ; Reserved
72
+                DCD     SVC_Handler                ; SVCall Handler
73
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
74
+                DCD     0                          ; Reserved
75
+                DCD     PendSV_Handler             ; PendSV Handler
76
+                DCD     SysTick_Handler            ; SysTick Handler
77
+
78
+                ; External Interrupts
79
+                DCD     WWDG_IRQHandler            ; Window Watchdog
80
+                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
81
+                DCD     TAMPER_IRQHandler          ; Tamper
82
+                DCD     RTC_IRQHandler             ; RTC
83
+                DCD     FLASH_IRQHandler           ; Flash
84
+                DCD     RCC_IRQHandler             ; RCC
85
+                DCD     EXTI0_IRQHandler           ; EXTI Line 0
86
+                DCD     EXTI1_IRQHandler           ; EXTI Line 1
87
+                DCD     EXTI2_IRQHandler           ; EXTI Line 2
88
+                DCD     EXTI3_IRQHandler           ; EXTI Line 3
89
+                DCD     EXTI4_IRQHandler           ; EXTI Line 4
90
+                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
91
+                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
92
+                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
93
+                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
94
+                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
95
+                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
96
+                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
97
+                DCD     ADC1_2_IRQHandler          ; ADC1_2
98
+                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
99
+                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
100
+                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
101
+                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
102
+                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
103
+                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
104
+                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
105
+                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
106
+                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
107
+                DCD     TIM2_IRQHandler            ; TIM2
108
+                DCD     TIM3_IRQHandler            ; TIM3
109
+                DCD     TIM4_IRQHandler            ; TIM4
110
+                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
111
+                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
112
+                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
113
+                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
114
+                DCD     SPI1_IRQHandler            ; SPI1
115
+                DCD     SPI2_IRQHandler            ; SPI2
116
+                DCD     USART1_IRQHandler          ; USART1
117
+                DCD     USART2_IRQHandler          ; USART2
118
+                DCD     USART3_IRQHandler          ; USART3
119
+                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
120
+                DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
121
+                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
122
+__Vectors_End
123
+
124
+__Vectors_Size  EQU  __Vectors_End - __Vectors
125
+
126
+                AREA    |.text|, CODE, READONLY
127
+
128
+; Reset handler
129
+Reset_Handler    PROC
130
+                 EXPORT  Reset_Handler             [WEAK]
131
+     IMPORT  __main
132
+     
133
+                 LDR     R0, =SystemInit
134
+                 BLX     R0
135
+
136
+;
137
+; Enable UsageFault, MemFault and Busfault interrupts
138
+;
139
+_SHCSR			EQU     0xE000ED24		; SHCSR is located at address 0xE000ED24
140
+				LDR.W	R0, =_SHCSR				
141
+				LDR 	R1, [R0]				; Read CPACR
142
+				ORR 	R1, R1, #(0x7 << 16)	; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
143
+				STR 	R1, [R0]				; Write back the modified value to the CPACR
144
+				DSB								; Wait for store to complete
145
+
146
+;
147
+; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
148
+;
149
+_AIRCR			EQU		0xE000ED0C
150
+_AIRCR_VAL		EQU		0x05FA0300
151
+				LDR.W	R0, =_AIRCR
152
+				LDR.W	R1, =_AIRCR_VAL
153
+				STR		R1,[R0]
154
+		
155
+;
156
+; Finaly, jump to main function (void main (void))
157
+;
158
+                LDR     R0, =__main
159
+                BX      R0
160
+                ENDP
161
+
162
+SystemInit		PROC				 
163
+				EXPORT  SystemInit                    [WEAK]    
164
+				BX		LR
165
+				ENDP
166
+
167
+; Dummy Exception Handlers (infinite loops which can be modified)
168
+
169
+NMI_Handler     PROC
170
+                EXPORT  NMI_Handler                [WEAK]
171
+                B       .
172
+                ENDP
173
+HardFault_Handler\
174
+                PROC
175
+                EXPORT  HardFault_Handler          [WEAK]
176
+                B       .
177
+                ENDP
178
+MemManage_Handler\
179
+                PROC
180
+                EXPORT  MemManage_Handler          [WEAK]
181
+                B       .
182
+                ENDP
183
+BusFault_Handler\
184
+                PROC
185
+                EXPORT  BusFault_Handler           [WEAK]
186
+                B       .
187
+                ENDP
188
+UsageFault_Handler\
189
+                PROC
190
+                EXPORT  UsageFault_Handler         [WEAK]
191
+                B       .
192
+                ENDP
193
+SVC_Handler     PROC
194
+                EXPORT  SVC_Handler                [WEAK]
195
+                B       .
196
+                ENDP
197
+DebugMon_Handler\
198
+                PROC
199
+                EXPORT  DebugMon_Handler           [WEAK]
200
+                B       .
201
+                ENDP
202
+PendSV_Handler  PROC
203
+                EXPORT  PendSV_Handler             [WEAK]
204
+                B       .
205
+                ENDP
206
+SysTick_Handler PROC
207
+                EXPORT  SysTick_Handler            [WEAK]
208
+                B       .
209
+                ENDP
210
+
211
+Default_Handler PROC
212
+
213
+                EXPORT  WWDG_IRQHandler            [WEAK]
214
+                EXPORT  PVD_IRQHandler             [WEAK]
215
+                EXPORT  TAMPER_IRQHandler          [WEAK]
216
+                EXPORT  RTC_IRQHandler             [WEAK]
217
+                EXPORT  FLASH_IRQHandler           [WEAK]
218
+                EXPORT  RCC_IRQHandler             [WEAK]
219
+                EXPORT  EXTI0_IRQHandler           [WEAK]
220
+                EXPORT  EXTI1_IRQHandler           [WEAK]
221
+                EXPORT  EXTI2_IRQHandler           [WEAK]
222
+                EXPORT  EXTI3_IRQHandler           [WEAK]
223
+                EXPORT  EXTI4_IRQHandler           [WEAK]
224
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
225
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
226
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
227
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
228
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
229
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
230
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
231
+                EXPORT  ADC1_2_IRQHandler          [WEAK]
232
+                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
233
+                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
234
+                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
235
+                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
236
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
237
+                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
238
+                EXPORT  TIM1_UP_IRQHandler         [WEAK]
239
+                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
240
+                EXPORT  TIM1_CC_IRQHandler         [WEAK]
241
+                EXPORT  TIM2_IRQHandler            [WEAK]
242
+                EXPORT  TIM3_IRQHandler            [WEAK]
243
+                EXPORT  TIM4_IRQHandler            [WEAK]
244
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
245
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
246
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
247
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
248
+                EXPORT  SPI1_IRQHandler            [WEAK]
249
+                EXPORT  SPI2_IRQHandler            [WEAK]
250
+                EXPORT  USART1_IRQHandler          [WEAK]
251
+                EXPORT  USART2_IRQHandler          [WEAK]
252
+                EXPORT  USART3_IRQHandler          [WEAK]
253
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
254
+                EXPORT  RTCAlarm_IRQHandler        [WEAK]
255
+                EXPORT  USBWakeUp_IRQHandler       [WEAK]
256
+
257
+WWDG_IRQHandler
258
+PVD_IRQHandler
259
+TAMPER_IRQHandler
260
+RTC_IRQHandler
261
+FLASH_IRQHandler
262
+RCC_IRQHandler
263
+EXTI0_IRQHandler
264
+EXTI1_IRQHandler
265
+EXTI2_IRQHandler
266
+EXTI3_IRQHandler
267
+EXTI4_IRQHandler
268
+DMA1_Channel1_IRQHandler
269
+DMA1_Channel2_IRQHandler
270
+DMA1_Channel3_IRQHandler
271
+DMA1_Channel4_IRQHandler
272
+DMA1_Channel5_IRQHandler
273
+DMA1_Channel6_IRQHandler
274
+DMA1_Channel7_IRQHandler
275
+ADC1_2_IRQHandler
276
+USB_HP_CAN1_TX_IRQHandler
277
+USB_LP_CAN1_RX0_IRQHandler
278
+CAN1_RX1_IRQHandler
279
+CAN1_SCE_IRQHandler
280
+EXTI9_5_IRQHandler
281
+TIM1_BRK_IRQHandler
282
+TIM1_UP_IRQHandler
283
+TIM1_TRG_COM_IRQHandler
284
+TIM1_CC_IRQHandler
285
+TIM2_IRQHandler
286
+TIM3_IRQHandler
287
+TIM4_IRQHandler
288
+I2C1_EV_IRQHandler
289
+I2C1_ER_IRQHandler
290
+I2C2_EV_IRQHandler
291
+I2C2_ER_IRQHandler
292
+SPI1_IRQHandler
293
+SPI2_IRQHandler
294
+USART1_IRQHandler
295
+USART2_IRQHandler
296
+USART3_IRQHandler
297
+EXTI15_10_IRQHandler
298
+RTCAlarm_IRQHandler
299
+USBWakeUp_IRQHandler
300
+
301
+                B       .
302
+
303
+                ENDP
304
+
305
+                ALIGN
306
+
307
+;*******************************************************************************
308
+; User Stack and Heap initialization
309
+;*******************************************************************************
310
+                 IF      :DEF:__MICROLIB           
311
+                
312
+                 EXPORT  __initial_sp
313
+                 EXPORT  __heap_base
314
+                 EXPORT  __heap_limit
315
+                
316
+                 ELSE
317
+                
318
+                 IMPORT  __use_two_region_memory
319
+                 EXPORT  __user_initial_stackheap
320
+                 
321
+__user_initial_stackheap
322
+
323
+                 LDR     R0, =  Heap_Mem
324
+                 LDR     R1, =(Stack_Mem + Stack_Size)
325
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
326
+                 LDR     R3, = Stack_Mem
327
+                 BX      LR
328
+
329
+                 ALIGN
330
+
331
+                 ENDIF
332
+
333
+                 END
334
+
335
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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