nettoyage de la branche master
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Sébastien DI MERCURIO
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README.md
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README.md
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# Dumber
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# Dumber
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## 2017-2018 :
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## Branche invalide :
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Problème :
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La branche master ne contient rien. Vous devez selectionner la branche stable avant de pouvoir commencer à utiliser le depot:
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- Watchdog du robot ne fonctionne pas
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git checkout stable
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- Interface graphique qui a des etats mal gérée (je voulais le reprendre en utilisant les 'stores' de vuex pour éviter ça).
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- Il faudrait une execution de l'interface (srv nodejs) par défaut au démarage de la RPI.
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L'exectution devrait se faire dans l'user space de linux dans le cas d'utilisation d'un noyau xenomai (co-kernel).
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=> Potentiellement passer d'un noyau preempt_rt (actuel) à un noyau xenomai
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## Repertoires
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Vous pouvez aussi selectionner la branche dev pour avoir les derniers developpements (instable)
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- hardware : contient les plans pour la partie mecanique du robot et de son chargeur
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git checkout dev
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- software: rassemble les parties logicielles du robot, du chargeur, les bibliotheques et superviseur coté raspberry et l'interface Web
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- pcb: contient les plans de conception des PCB du robot, du chargeur, de l'adaptateur Xbee pour la raspberry et les plans des CAP du robot
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- incubateur: projet en incubation. Actuellement, contient des essais sur les aruco (pour la detection des robots) ou le portage du firmware du robot sous freertos.
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ISO-10303-21;
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HEADER;
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FILE_DESCRIPTION (( 'STEP AP203' ),
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'1' );
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FILE_NAME ('0605-LED_Verde.STEP',
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'2015-02-17T13:34:54',
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( 'user1' ),
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( '' ),
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'SwSTEP 2.0',
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'SolidWorks 2014',
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'' );
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|
|
||||||
508,5,0,235,13,0,0,0,235,14,1,0,0,235,15,0,0,0,235,16,0,0,0,235, 47P 28
|
|
||||||
14,0,0; 47P 29
|
|
||||||
508,4,0,235,17,1,0,0,235,18,0,0,0,235,19,0,0,0,235,20,1,0; 49P 30
|
|
||||||
508,4,0,235,21,1,0,0,235,22,0,0,0,235,23,0,0,0,235,18,1,0; 51P 31
|
|
||||||
508,4,0,235,24,1,0,0,235,25,0,0,0,235,26,0,0,0,235,22,1,0; 53P 32
|
|
||||||
508,4,0,235,27,1,0,0,235,28,0,0,0,235,29,0,0,0,235,25,1,0; 55P 33
|
|
||||||
508,4,0,235,30,1,0,0,235,31,0,0,0,235,32,0,0,0,235,28,1,0; 57P 34
|
|
||||||
508,4,0,235,33,1,0,0,235,34,0,0,0,235,35,0,0,0,235,31,1,0; 59P 35
|
|
||||||
508,4,0,235,36,1,0,0,235,37,0,0,0,235,38,0,0,0,235,34,1,0; 61P 36
|
|
||||||
508,4,0,235,39,1,0,0,235,40,0,0,0,235,41,0,0,0,235,37,1,0; 63P 37
|
|
||||||
508,4,0,235,42,1,0,0,235,43,0,0,0,235,44,0,0,0,235,40,1,0; 65P 38
|
|
||||||
508,4,0,235,45,1,0,0,235,46,0,0,0,235,47,0,0,0,235,43,1,0; 67P 39
|
|
||||||
508,4,0,235,48,1,0,0,235,49,0,0,0,235,50,0,0,0,235,46,1,0; 69P 40
|
|
||||||
508,4,0,235,51,1,0,0,235,20,0,0,0,235,52,0,0,0,235,49,1,0; 71P 41
|
|
||||||
508,12,0,235,17,0,0,0,235,51,0,0,0,235,48,0,0,0,235,45,0,0,0, 73P 42
|
|
||||||
235,42,0,0,0,235,39,0,0,0,235,36,0,0,0,235,33,0,0,0,235,30,0,0, 73P 43
|
|
||||||
0,235,27,0,0,0,235,24,0,0,0,235,21,0,0; 73P 44
|
|
||||||
508,2,0,235,3,1,0,0,235,4,1,0; 75P 45
|
|
||||||
508,2,0,235,7,1,0,0,235,8,1,0; 77P 46
|
|
||||||
508,2,0,235,11,1,0,0,235,12,1,0; 79P 47
|
|
||||||
508,2,0,235,15,1,0,0,235,16,1,0; 81P 48
|
|
||||||
508,12,0,235,52,1,0,0,235,19,1,0,0,235,23,1,0,0,235,26,1,0,0, 83P 49
|
|
||||||
235,29,1,0,0,235,32,1,0,0,235,35,1,0,0,235,38,1,0,0,235,41,1,0, 83P 50
|
|
||||||
0,235,44,1,0,0,235,47,1,0,0,235,50,1,0; 83P 51
|
|
||||||
508,1,0,235,1,1,0; 85P 52
|
|
||||||
508,1,0,235,5,1,0; 87P 53
|
|
||||||
508,1,0,235,9,1,0; 89P 54
|
|
||||||
508,1,0,235,13,1,0; 91P 55
|
|
||||||
126,8,2,0,1,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 93P 56
|
|
||||||
3.14159265358979,3.14159265358979,4.71238898038469, 93P 57
|
|
||||||
4.71238898038469,6.28318530717959,6.28318530717959, 93P 58
|
|
||||||
6.28318530717959,1.,0.707106781186545,1.,0.707106781186545,1., 93P 59
|
|
||||||
0.707106781186545,1.,0.707106781186545,1.,29.6, 93P 60
|
|
||||||
-27.9999999999999,0.,29.6,-29.5999999999999,0.,28., 93P 61
|
|
||||||
-29.5999999999999,0.,26.4,-29.5999999999999,0.,26.4, 93P 62
|
|
||||||
-27.9999999999999,0.,26.4,-26.3999999999999,0.,28., 93P 63
|
|
||||||
-26.3999999999999,0.,29.6,-26.3999999999999,0.,29.6, 93P 64
|
|
||||||
-27.9999999999999,0.,0.,6.28318530717959,0.,0.,0.; 93P 65
|
|
||||||
126,1,1,0,0,1,0,-0.5,-0.5,0.499999999999999,0.499999999999999, 95P 66
|
|
||||||
1.,1.,29.6,-27.9999999999999,0.,29.6,-27.9999999999999,-1.6, 95P 67
|
|
||||||
-0.5,0.499999999999999,0.,0.,0.; 95P 68
|
|
||||||
126,4,2,0,0,0,0,-3.14159265358979,-3.14159265358979, 97P 69
|
|
||||||
-3.14159265358979,-1.5707963267949,-1.5707963267949,0.,0.,0.,1., 97P 70
|
|
||||||
0.707106781186545,1.,0.707106781186545,1.,26.4, 97P 71
|
|
||||||
-27.9999999999999,-1.6,26.4,-29.5999999999999,-1.6,28., 97P 72
|
|
||||||
-29.5999999999999,-1.6,29.6,-29.5999999999999,-1.6,29.6, 97P 73
|
|
||||||
-27.9999999999999,-1.6,-3.14159265358979,0.,0.,0.,0.; 97P 74
|
|
||||||
126,4,2,0,0,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 99P 75
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 99P 76
|
|
||||||
0.707106781186545,1.,0.707106781186545,1.,29.6, 99P 77
|
|
||||||
-27.9999999999999,-1.6,29.6,-26.3999999999999,-1.6,28., 99P 78
|
|
||||||
-26.3999999999999,-1.6,26.4,-26.3999999999999,-1.6,26.4, 99P 79
|
|
||||||
-27.9999999999999,-1.6,0.,3.14159265358979,0.,0.,0.; 99P 80
|
|
||||||
126,8,2,0,1,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 101P 81
|
|
||||||
3.14159265358979,3.14159265358979,4.71238898038469, 101P 82
|
|
||||||
4.71238898038469,6.28318530717959,6.28318530717959, 101P 83
|
|
||||||
6.28318530717959,1.,0.707106781186548,1.,0.707106781186548,1., 101P 84
|
|
||||||
0.707106781186548,1.,0.707106781186547,1.,1.6,0.,0.,1.6,-1.6,0., 101P 85
|
|
||||||
9.79717439317883D-17,-1.6,0.,-1.6,-1.6,0.,-1.6, 101P 86
|
|
||||||
-1.95943487863577D-16,0.,-1.6,1.6,0.,-2.93915231795365D-16,1.6, 101P 87
|
|
||||||
0.,1.6,1.6,0.,1.6,3.91886975727153D-16,0.,0.,6.28318530717959, 101P 88
|
|
||||||
0.,0.,0.; 101P 89
|
|
||||||
126,1,1,0,0,1,0,-0.5,-0.5,0.5,0.5,1.,1.,1.6, 103P 90
|
|
||||||
1.95943487863577D-16,0.,1.6,1.95943487863577D-16,-1.6,-0.5,0.5, 103P 91
|
|
||||||
0.,0.,0.; 103P 92
|
|
||||||
126,4,2,0,0,0,0,-3.14159265358979,-3.14159265358979, 105P 93
|
|
||||||
-3.14159265358979,-1.5707963267949,-1.5707963267949, 105P 94
|
|
||||||
1.22464679914736D-16,1.22464679914736D-16,1.22464679914736D-16, 105P 95
|
|
||||||
1.,0.707106781186548,1.,0.707106781186548,1.,-1.6, 105P 96
|
|
||||||
-1.95943487863577D-16,-1.6,-1.6,-1.6,-1.6,9.79717439317883D-17, 105P 97
|
|
||||||
-1.6,-1.6,1.6,-1.6,-1.6,1.6,1.95943487863577D-16,-1.6, 105P 98
|
|
||||||
-3.14159265358979,1.22464679914736D-16,0.,0.,0.; 105P 99
|
|
||||||
126,4,2,0,0,0,0,1.22464679914736D-16,1.22464679914736D-16, 107P 100
|
|
||||||
1.22464679914736D-16,1.5707963267949,1.5707963267949, 107P 101
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 107P 102
|
|
||||||
0.707106781186548,1.,0.707106781186548,1.,1.6, 107P 103
|
|
||||||
1.95943487863577D-16,-1.6,1.6,1.6,-1.6,9.79717439317883D-17,1.6, 107P 104
|
|
||||||
-1.6,-1.6,1.6,-1.6,-1.6,1.95943487863577D-16,-1.6, 107P 105
|
|
||||||
1.22464679914736D-16,3.14159265358979,0.,0.,0.; 107P 106
|
|
||||||
126,8,2,0,1,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 109P 107
|
|
||||||
3.14159265358979,3.14159265358979,4.71238898038469, 109P 108
|
|
||||||
4.71238898038469,6.28318530717959,6.28318530717959, 109P 109
|
|
||||||
6.28318530717959,1.,0.707106781186546,1.,0.707106781186547,1., 109P 110
|
|
||||||
0.707106781186547,1.,0.707106781186546,1.,29.6, 109P 111
|
|
||||||
6.21724893790088D-14,0.,29.6,-1.59999999999994,0.,28., 109P 112
|
|
||||||
-1.59999999999994,0.,26.4,-1.59999999999994,0.,26.4, 109P 113
|
|
||||||
6.19765458911452D-14,0.,26.4,1.60000000000006,0.,28., 109P 114
|
|
||||||
1.60000000000006,0.,29.6,1.60000000000006,0.,29.6, 109P 115
|
|
||||||
6.2564376354736D-14,0.,0.,6.28318530717959,0.,0.,0.; 109P 116
|
|
||||||
126,1,1,0,0,1,0,-0.5,-0.5,0.499999999999999,0.499999999999999, 111P 117
|
|
||||||
1.,1.,29.6,6.23684328668724D-14,0.,29.6,6.23684328668724D-14, 111P 118
|
|
||||||
-1.6,-0.5,0.499999999999999,0.,0.,0.; 111P 119
|
|
||||||
126,4,2,0,0,0,0,-3.14159265358979,-3.14159265358979, 113P 120
|
|
||||||
-3.14159265358979,-1.5707963267949,-1.5707963267949, 113P 121
|
|
||||||
1.22464679914747D-16,1.22464679914747D-16,1.22464679914747D-16, 113P 122
|
|
||||||
1.,0.707106781186547,1.,0.707106781186546,1.,26.4, 113P 123
|
|
||||||
6.19765458911452D-14,-1.6,26.4,-1.59999999999994,-1.6,28., 113P 124
|
|
||||||
-1.59999999999994,-1.6,29.6,-1.59999999999994,-1.6,29.6, 113P 125
|
|
||||||
6.23684328668724D-14,-1.6,-3.14159265358979, 113P 126
|
|
||||||
1.22464679914747D-16,0.,0.,0.; 113P 127
|
|
||||||
126,4,2,0,0,0,0,1.22464679914747D-16,1.22464679914747D-16, 115P 128
|
|
||||||
1.22464679914747D-16,1.5707963267949,1.5707963267949, 115P 129
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 115P 130
|
|
||||||
0.707106781186547,1.,0.707106781186547,1.,29.6, 115P 131
|
|
||||||
6.23684328668724D-14,-1.6,29.6,1.60000000000006,-1.6,28., 115P 132
|
|
||||||
1.60000000000006,-1.6,26.4,1.60000000000006,-1.6,26.4, 115P 133
|
|
||||||
6.23684328668724D-14,-1.6,1.22464679914747D-16,3.14159265358979, 115P 134
|
|
||||||
0.,0.,0.; 115P 135
|
|
||||||
126,8,2,0,1,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 117P 136
|
|
||||||
3.14159265358979,3.14159265358979,4.71238898038469, 117P 137
|
|
||||||
4.71238898038469,6.28318530717959,6.28318530717959, 117P 138
|
|
||||||
6.28318530717959,1.,0.707106781186547,1.,0.707106781186547,1., 117P 139
|
|
||||||
0.707106781186546,1.,0.707106781186546,1.,1.60000000000001,-28., 117P 140
|
|
||||||
0.,1.60000000000001,-29.6,0.,8.97975594093304D-15,-29.6,0., 117P 141
|
|
||||||
-1.59999999999999,-29.6,0.,-1.59999999999999,-28.,0., 117P 142
|
|
||||||
-1.59999999999999,-26.4,0.,8.58786896520589D-15,-26.4,0., 117P 143
|
|
||||||
1.60000000000001,-26.4,0.,1.60000000000001,-28.,0.,0., 117P 144
|
|
||||||
6.28318530717959,0.,0.,0.; 117P 145
|
|
||||||
126,1,1,0,0,1,0,-0.500000000000001,-0.500000000000001,0.5,0.5, 119P 146
|
|
||||||
1.,1.,1.60000000000001,-28.,-1.38777878078145D-16, 119P 147
|
|
||||||
1.60000000000001,-28.,-1.6,-0.500000000000001,0.5,0.,0.,0.; 119P 148
|
|
||||||
126,4,2,0,0,0,0,-3.14159265358979,-3.14159265358979, 121P 149
|
|
||||||
-3.14159265358979,-1.5707963267949,-1.5707963267949,0.,0.,0.,1., 121P 150
|
|
||||||
0.707106781186547,1.,0.707106781186547,1.,-1.59999999999999, 121P 151
|
|
||||||
-28.,-1.6,-1.59999999999999,-29.6,-1.6,8.97975594093304D-15, 121P 152
|
|
||||||
-29.6,-1.6,1.60000000000001,-29.6,-1.6,1.60000000000001,-28., 121P 153
|
|
||||||
-1.6,-3.14159265358979,0.,0.,0.,0.; 121P 154
|
|
||||||
126,4,2,0,0,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 123P 155
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 123P 156
|
|
||||||
0.707106781186547,1.,0.707106781186547,1.,1.60000000000001,-28., 123P 157
|
|
||||||
-1.6,1.60000000000001,-26.4,-1.6,8.97975594093304D-15,-26.4, 123P 158
|
|
||||||
-1.6,-1.59999999999999,-26.4,-1.6,-1.59999999999999,-28.,-1.6, 123P 159
|
|
||||||
0.,3.14159265358979,0.,0.,0.; 123P 160
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 125P 161
|
|
||||||
-3.35292539815827,-1.6,-11.0000000000002,-3.35292539815827,-1.6, 125P 162
|
|
||||||
0.,1.,0.,0.,0.; 125P 163
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-11.0000000000002, 127P 164
|
|
||||||
-3.35292539815827,0.,-11.0000000000002,-3.35292539815827,-1.6, 127P 165
|
|
||||||
0.,1.,0.,0.,0.; 127P 166
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 129P 167
|
|
||||||
-3.35292539815827,0.,-11.0000000000002,-3.35292539815827,0.,0., 129P 168
|
|
||||||
1.,0.,0.,0.; 129P 169
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 131P 170
|
|
||||||
-3.35292539815827,0.,-14.3056266003596,-3.35292539815827,-1.6, 131P 171
|
|
||||||
0.,1.,0.,0.,0.; 131P 172
|
|
||||||
126,4,2,0,0,0,0,6.69597285349659D-16,6.69597285349659D-16, 133P 173
|
|
||||||
6.69597285349659D-16,1.5707963267949,1.5707963267949, 133P 174
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 133P 175
|
|
||||||
0.707106781186548,1.,0.707106781186548,1.,-11.0000000000002, 133P 176
|
|
||||||
-3.35292539815827,-1.6,-7.68390822688196,-3.35292539815827,-1.6, 133P 177
|
|
||||||
-7.68390822688196,-6.66901717127651,-1.6,-7.68390822688196, 133P 178
|
|
||||||
-9.98510894439475,-1.6,-11.0000000000002,-9.98510894439475,-1.6, 133P 179
|
|
||||||
6.69597285349659D-16,3.14159265358979,0.,0.,0.; 133P 180
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-11.0000000000002, 135P 181
|
|
||||||
-9.98510894439476,0.,-11.0000000000002,-9.98510894439476,-1.6, 135P 182
|
|
||||||
0.,1.,0.,0.,0.; 135P 183
|
|
||||||
126,4,2,0,0,0,0,6.69597285349659D-16,6.69597285349659D-16, 137P 184
|
|
||||||
6.69597285349659D-16,1.5707963267949,1.5707963267949, 137P 185
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 137P 186
|
|
||||||
0.707106781186548,1.,0.707106781186548,1.,-11.0000000000002, 137P 187
|
|
||||||
-3.35292539815827,0.,-7.68390822688196,-3.35292539815827,0., 137P 188
|
|
||||||
-7.68390822688196,-6.66901717127651,0.,-7.68390822688196, 137P 189
|
|
||||||
-9.98510894439475,0.,-11.0000000000002,-9.98510894439475,0., 137P 190
|
|
||||||
6.69597285349659D-16,3.14159265358979,0.,0.,0.; 137P 191
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-11.0000000000002, 139P 192
|
|
||||||
-9.98510894439476,-1.6,-14.3056266003596,-9.98510894439476,-1.6, 139P 193
|
|
||||||
0.,1.,0.,0.,0.; 139P 194
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 141P 195
|
|
||||||
-9.98510894439476,0.,-14.3056266003596,-9.98510894439476,-1.6, 141P 196
|
|
||||||
0.,1.,0.,0.,0.; 141P 197
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-11.0000000000002, 143P 198
|
|
||||||
-9.98510894439476,0.,-14.3056266003596,-9.98510894439476,0.,0., 143P 199
|
|
||||||
1.,0.,0.,0.; 143P 200
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 145P 201
|
|
||||||
-9.98510894439476,-1.6,-14.3056266003596,-42.83098282869,-1.6, 145P 202
|
|
||||||
0.,1.,0.,0.,0.; 145P 203
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 147P 204
|
|
||||||
-42.83098282869,0.,-14.3056266003596,-42.83098282869,-1.6,0.,1., 147P 205
|
|
||||||
0.,0.,0.; 147P 206
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 149P 207
|
|
||||||
-9.98510894439476,0.,-14.3056266003596,-42.83098282869,0.,0.,1., 149P 208
|
|
||||||
0.,0.,0.; 149P 209
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 151P 210
|
|
||||||
-42.83098282869,-1.6,42.3056266003596,-42.83098282869,-1.6,0., 151P 211
|
|
||||||
1.,0.,0.,0.; 151P 212
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 153P 213
|
|
||||||
-42.83098282869,0.,42.3056266003596,-42.83098282869,-1.6,0.,1., 153P 214
|
|
||||||
0.,0.,0.; 153P 215
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 155P 216
|
|
||||||
-42.83098282869,0.,42.3056266003596,-42.83098282869,0.,0.,1.,0., 155P 217
|
|
||||||
0.,0.; 155P 218
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 157P 219
|
|
||||||
-42.83098282869,-1.6,42.3056266003596,-9.9851089443952,-1.6,0., 157P 220
|
|
||||||
1.,0.,0.,0.; 157P 221
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 159P 222
|
|
||||||
-9.9851089443952,0.,42.3056266003596,-9.9851089443952,-1.6,0., 159P 223
|
|
||||||
1.,0.,0.,0.; 159P 224
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 161P 225
|
|
||||||
-42.83098282869,0.,42.3056266003596,-9.9851089443952,0.,0.,1., 161P 226
|
|
||||||
0.,0.,0.; 161P 227
|
|
||||||
126,1,1,0,0,1,0,0.,0.,0.999999999999999,0.999999999999999,1.,1., 163P 228
|
|
||||||
42.3056266003596,-9.9851089443952,-1.6,38.9999999999998, 163P 229
|
|
||||||
-9.9851089443952,-1.6,0.,0.999999999999999,0.,0.,0.; 163P 230
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,38.9999999999998, 165P 231
|
|
||||||
-9.9851089443952,0.,38.9999999999998,-9.9851089443952,-1.6,0., 165P 232
|
|
||||||
1.,0.,0.,0.; 165P 233
|
|
||||||
126,1,1,0,0,1,0,0.,0.,0.999999999999999,0.999999999999999,1.,1., 167P 234
|
|
||||||
42.3056266003596,-9.9851089443952,0.,38.9999999999998, 167P 235
|
|
||||||
-9.9851089443952,0.,0.,0.999999999999999,0.,0.,0.; 167P 236
|
|
||||||
126,4,2,0,0,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 169P 237
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 169P 238
|
|
||||||
0.707106781186547,1.,0.707106781186546,1.,38.9999999999998, 169P 239
|
|
||||||
-9.98510894439519,-1.6,35.6839082268816,-9.98510894439519,-1.6, 169P 240
|
|
||||||
35.6839082268816,-6.66901717127695,-1.6,35.6839082268816, 169P 241
|
|
||||||
-3.35292539815871,-1.6,38.9999999999998,-3.35292539815871,-1.6, 169P 242
|
|
||||||
0.,3.14159265358979,0.,0.,0.; 169P 243
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,38.9999999999998, 171P 244
|
|
||||||
-3.35292539815871,0.,38.9999999999998,-3.35292539815871,-1.6,0., 171P 245
|
|
||||||
1.,0.,0.,0.; 171P 246
|
|
||||||
126,4,2,0,0,0,0,0.,0.,0.,1.5707963267949,1.5707963267949, 173P 247
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1., 173P 248
|
|
||||||
0.707106781186547,1.,0.707106781186546,1.,38.9999999999998, 173P 249
|
|
||||||
-9.98510894439519,0.,35.6839082268816,-9.98510894439519,0., 173P 250
|
|
||||||
35.6839082268816,-6.66901717127695,0.,35.6839082268816, 173P 251
|
|
||||||
-3.35292539815871,0.,38.9999999999998,-3.35292539815871,0.,0., 173P 252
|
|
||||||
3.14159265358979,0.,0.,0.; 173P 253
|
|
||||||
126,1,1,0,0,1,0,0.,0.,0.999999999999999,0.999999999999999,1.,1., 175P 254
|
|
||||||
38.9999999999998,-3.35292539815871,-1.6,42.3056266003596, 175P 255
|
|
||||||
-3.35292539815871,-1.6,0.,0.999999999999999,0.,0.,0.; 175P 256
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 177P 257
|
|
||||||
-3.35292539815871,0.,42.3056266003596,-3.35292539815871,-1.6,0., 177P 258
|
|
||||||
1.,0.,0.,0.; 177P 259
|
|
||||||
126,1,1,0,0,1,0,0.,0.,0.999999999999999,0.999999999999999,1.,1., 179P 260
|
|
||||||
38.9999999999998,-3.35292539815871,0.,42.3056266003596, 179P 261
|
|
||||||
-3.35292539815871,0.,0.,0.999999999999999,0.,0.,0.; 179P 262
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 181P 263
|
|
||||||
-3.35292539815871,-1.6,42.3056266003596,14.8309828286996,-1.6, 181P 264
|
|
||||||
0.,1.,0.,0.,0.; 181P 265
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 183P 266
|
|
||||||
14.8309828286996,0.,42.3056266003596,14.8309828286996,-1.6,0., 183P 267
|
|
||||||
1.,0.,0.,0.; 183P 268
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 185P 269
|
|
||||||
-3.35292539815871,0.,42.3056266003596,14.8309828286996,0.,0.,1., 185P 270
|
|
||||||
0.,0.,0.; 185P 271
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 187P 272
|
|
||||||
14.8309828286996,-1.6,-14.3056266003596,14.8309828286996,-1.6, 187P 273
|
|
||||||
0.,1.,0.,0.,0.; 187P 274
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 189P 275
|
|
||||||
14.8309828286996,0.,-14.3056266003596,14.8309828286996,-1.6,0., 189P 276
|
|
||||||
1.,0.,0.,0.; 189P 277
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,42.3056266003596, 191P 278
|
|
||||||
14.8309828286996,0.,-14.3056266003596,14.8309828286996,0.,0.,1., 191P 279
|
|
||||||
0.,0.,0.; 191P 280
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 193P 281
|
|
||||||
14.8309828286996,-1.6,-14.3056266003596,-3.35292539815827,-1.6, 193P 282
|
|
||||||
0.,1.,0.,0.,0.; 193P 283
|
|
||||||
126,1,1,0,0,1,0,0.,0.,1.,1.,1.,1.,-14.3056266003596, 195P 284
|
|
||||||
14.8309828286996,0.,-14.3056266003596,-3.35292539815827,0.,0., 195P 285
|
|
||||||
1.,0.,0.,0.; 195P 286
|
|
||||||
128,1,8,1,2,0,1,0,0,1,-0.499999999999999,-0.499999999999999,0.5, 197P 287
|
|
||||||
0.5,-3.14159265358979,-3.14159265358979,-3.14159265358979, 197P 288
|
|
||||||
-1.5707963267949,-1.5707963267949,0.,0.,1.5707963267949, 197P 289
|
|
||||||
1.5707963267949,3.14159265358979,3.14159265358979, 197P 290
|
|
||||||
3.14159265358979,1.,1.,0.707106781186548,0.707106781186548,1., 197P 291
|
|
||||||
1.,0.707106781186548,0.707106781186548,1.,1.,0.707106781186548, 197P 292
|
|
||||||
0.707106781186548,1.,1.,0.707106781186548,0.707106781186548,1., 197P 293
|
|
||||||
1.,29.6,-27.9999999999999,-1.6,29.6,-27.9999999999999,0.,29.6, 197P 294
|
|
||||||
-26.3999999999999,-1.6,29.6,-26.3999999999999,0.,28., 197P 295
|
|
||||||
-26.3999999999999,-1.6,28.,-26.3999999999999,0.,26.4, 197P 296
|
|
||||||
-26.3999999999999,-1.6,26.4,-26.3999999999999,0.,26.4, 197P 297
|
|
||||||
-27.9999999999999,-1.6,26.4,-27.9999999999999,0.,26.4, 197P 298
|
|
||||||
-29.5999999999999,-1.6,26.4,-29.5999999999999,0.,28., 197P 299
|
|
||||||
-29.5999999999999,-1.6,28.,-29.5999999999999,0.,29.6, 197P 300
|
|
||||||
-29.5999999999999,-1.6,29.6,-29.5999999999999,0.,29.6, 197P 301
|
|
||||||
-27.9999999999999,-1.6,29.6,-27.9999999999999,0., 197P 302
|
|
||||||
-0.499999999999999,0.5,-3.14159265358979,3.14159265358979; 197P 303
|
|
||||||
128,1,8,1,2,0,1,0,0,1,-0.5,-0.5,0.5,0.5,-3.14159265358979, 199P 304
|
|
||||||
-3.14159265358979,-3.14159265358979,-1.5707963267949, 199P 305
|
|
||||||
-1.5707963267949,0.,0.,1.5707963267949,1.5707963267949, 199P 306
|
|
||||||
3.14159265358979,3.14159265358979,3.14159265358979,1.,1., 199P 307
|
|
||||||
0.707106781186548,0.707106781186548,1.,1.,0.707106781186548, 199P 308
|
|
||||||
0.707106781186548,1.,1.,0.707106781186548,0.707106781186548,1., 199P 309
|
|
||||||
1.,0.707106781186548,0.707106781186548,1.,1.,1.6, 199P 310
|
|
||||||
1.95943487863577D-16,-1.6,1.6,1.95943487863577D-16,0.,1.6,1.6, 199P 311
|
|
||||||
-1.6,1.6,1.6,0.,-1.95943487863577D-16,1.6,-1.6, 199P 312
|
|
||||||
-1.95943487863577D-16,1.6,0.,-1.6,1.6,-1.6,-1.6,1.6,0.,-1.6, 199P 313
|
|
||||||
-1.95943487863577D-16,-1.6,-1.6,-1.95943487863577D-16,0.,-1.6, 199P 314
|
|
||||||
-1.6,-1.6,-1.6,-1.6,0.,1.95943487863577D-16,-1.6,-1.6, 199P 315
|
|
||||||
1.95943487863577D-16,-1.6,0.,1.6,-1.6,-1.6,1.6,-1.6,0.,1.6, 199P 316
|
|
||||||
1.95943487863577D-16,-1.6,1.6,1.95943487863577D-16,0.,-0.5,0.5, 199P 317
|
|
||||||
-3.14159265358979,3.14159265358979; 199P 318
|
|
||||||
128,1,8,1,2,0,1,0,0,1,-0.499999999999999,-0.499999999999999,0.5, 201P 319
|
|
||||||
0.5,-3.14159265358979,-3.14159265358979,-3.14159265358979, 201P 320
|
|
||||||
-1.5707963267949,-1.5707963267949,0.,0.,1.5707963267949, 201P 321
|
|
||||||
1.5707963267949,3.14159265358979,3.14159265358979, 201P 322
|
|
||||||
3.14159265358979,1.,1.,0.707106781186548,0.707106781186548,1., 201P 323
|
|
||||||
1.,0.707106781186548,0.707106781186548,1.,1.,0.707106781186548, 201P 324
|
|
||||||
0.707106781186548,1.,1.,0.707106781186548,0.707106781186548,1., 201P 325
|
|
||||||
1.,29.6,6.23684328668724D-14,-1.6,29.6,6.23684328668724D-14,0., 201P 326
|
|
||||||
29.6,1.60000000000006,-1.6,29.6,1.60000000000006,0.,28., 201P 327
|
|
||||||
1.60000000000006,-1.6,28.,1.60000000000006,0.,26.4, 201P 328
|
|
||||||
1.60000000000006,-1.6,26.4,1.60000000000006,0.,26.4, 201P 329
|
|
||||||
6.19765458911452D-14,-1.6,26.4,6.19765458911452D-14,0.,26.4, 201P 330
|
|
||||||
-1.59999999999994,-1.6,26.4,-1.59999999999994,0.,28., 201P 331
|
|
||||||
-1.59999999999994,-1.6,28.,-1.59999999999994,0.,29.6, 201P 332
|
|
||||||
-1.59999999999994,-1.6,29.6,-1.59999999999994,0.,29.6, 201P 333
|
|
||||||
6.23684328668724D-14,-1.6,29.6,6.23684328668724D-14,0., 201P 334
|
|
||||||
-0.499999999999999,0.5,-3.14159265358979,3.14159265358979; 201P 335
|
|
||||||
128,1,8,1,2,0,1,0,0,1,-0.5,-0.5,0.500000000000001, 203P 336
|
|
||||||
0.500000000000001,-3.14159265358979,-3.14159265358979, 203P 337
|
|
||||||
-3.14159265358979,-1.5707963267949,-1.5707963267949,0.,0., 203P 338
|
|
||||||
1.5707963267949,1.5707963267949,3.14159265358979, 203P 339
|
|
||||||
3.14159265358979,3.14159265358979,1.,1.,0.707106781186548, 203P 340
|
|
||||||
0.707106781186548,1.,1.,0.707106781186548,0.707106781186548,1., 203P 341
|
|
||||||
1.,0.707106781186548,0.707106781186548,1.,1.,0.707106781186548, 203P 342
|
|
||||||
0.707106781186548,1.,1.,1.60000000000001,-28.,-1.6, 203P 343
|
|
||||||
1.60000000000001,-28.,-1.38777878078145D-16,1.60000000000001, 203P 344
|
|
||||||
-26.4,-1.6,1.60000000000001,-26.4,-1.38777878078145D-16, 203P 345
|
|
||||||
9.15933995315754D-15,-26.4,-1.6,9.15933995315754D-15,-26.4, 203P 346
|
|
||||||
-1.38777878078145D-16,-1.59999999999999,-26.4,-1.6, 203P 347
|
|
||||||
-1.59999999999999,-26.4,-1.38777878078145D-16,-1.59999999999999, 203P 348
|
|
||||||
-28.,-1.6,-1.59999999999999,-28.,-1.38777878078145D-16, 203P 349
|
|
||||||
-1.59999999999999,-29.6,-1.6,-1.59999999999999,-29.6, 203P 350
|
|
||||||
-1.38777878078145D-16,9.15933995315754D-15,-29.6,-1.6, 203P 351
|
|
||||||
9.15933995315754D-15,-29.6,-1.38777878078145D-16, 203P 352
|
|
||||||
1.60000000000001,-29.6,-1.6,1.60000000000001,-29.6, 203P 353
|
|
||||||
-1.38777878078145D-16,1.60000000000001,-28.,-1.6, 203P 354
|
|
||||||
1.60000000000001,-28.,-1.38777878078145D-16,-0.5, 203P 355
|
|
||||||
0.500000000000001,-3.14159265358979,3.14159265358979; 203P 356
|
|
||||||
128,1,1,1,1,0,0,1,0,0,0.,0.,0.16,0.16,0.,0.,0.33056266003594, 205P 357
|
|
||||||
0.33056266003594,1.,1.,1.,1.,-14.3056266003596, 205P 358
|
|
||||||
-3.35292539815827,0.,-14.3056266003596,-3.35292539815827,-1.6, 205P 359
|
|
||||||
-11.0000000000002,-3.35292539815827,0.,-11.0000000000002, 205P 360
|
|
||||||
-3.35292539815827,-1.6,0.,0.16,0.,0.33056266003594; 205P 361
|
|
||||||
128,1,4,1,2,0,0,0,0,0,-0.241247846783122,-0.241247846783122, 207P 362
|
|
||||||
0.241247846783122,0.241247846783122,0.,0.,0.,1.5707963267949, 207P 363
|
|
||||||
1.5707963267949,3.14159265358979,3.14159265358979, 207P 364
|
|
||||||
3.14159265358979,1.,1.,0.707106781186548,0.707106781186548,1., 207P 365
|
|
||||||
1.,0.707106781186548,0.707106781186548,1.,1.,-11.0000000000002, 207P 366
|
|
||||||
-3.35292539815827,0.,-11.0000000000002,-3.35292539815827,-1.6, 207P 367
|
|
||||||
-7.68390822688196,-3.35292539815827,0.,-7.68390822688196, 207P 368
|
|
||||||
-3.35292539815827,-1.6,-7.68390822688196,-6.66901717127651,0., 207P 369
|
|
||||||
-7.68390822688196,-6.66901717127651,-1.6,-7.68390822688196, 207P 370
|
|
||||||
-9.98510894439475,0.,-7.68390822688196,-9.98510894439475,-1.6, 207P 371
|
|
||||||
-11.0000000000002,-9.98510894439475,0.,-11.0000000000002, 207P 372
|
|
||||||
-9.98510894439475,-1.6,-0.241247846783122,0.241247846783122,0., 207P 373
|
|
||||||
3.14159265358979; 207P 374
|
|
||||||
128,1,1,1,1,0,0,1,0,0,-0.16,-0.16,0.,0.,-0.33056266003594, 209P 375
|
|
||||||
-0.33056266003594,0.,0.,1.,1.,1.,1.,-14.3056266003596, 209P 376
|
|
||||||
-9.98510894439476,-1.6,-14.3056266003596,-9.98510894439476,0., 209P 377
|
|
||||||
-11.0000000000002,-9.98510894439476,-1.6,-11.0000000000002, 209P 378
|
|
||||||
-9.98510894439476,0.,-0.16,0.,-0.33056266003594,0.; 209P 379
|
|
||||||
128,1,1,1,1,0,0,1,0,0,-0.16,-0.16,0.,0.,-3.28458738842953, 211P 380
|
|
||||||
-3.28458738842953,0.,0.,1.,1.,1.,1.,-14.3056266003596, 211P 381
|
|
||||||
-42.83098282869,-1.6,-14.3056266003596,-42.83098282869,0., 211P 382
|
|
||||||
-14.3056266003596,-9.98510894439476,-1.6,-14.3056266003596, 211P 383
|
|
||||||
-9.98510894439476,0.,-0.16,0.,-3.28458738842953,0.; 211P 384
|
|
||||||
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||||||
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|
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|
|
||||||
'DISTANCE_ACCURACY_VALUE',
|
|
||||||
'Maximum model space distance between geometric entities at asserted c
|
|
||||||
onnectivities');
|
|
||||||
#573=UNCERTAINTY_MEASURE_WITH_UNIT(LENGTH_MEASURE(1.E-6),#576,
|
|
||||||
'DISTANCE_ACCURACY_VALUE',
|
|
||||||
'Maximum model space distance between geometric entities at asserted c
|
|
||||||
onnectivities');
|
|
||||||
#574=(
|
|
||||||
GEOMETRIC_REPRESENTATION_CONTEXT(3)
|
|
||||||
GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#572))
|
|
||||||
GLOBAL_UNIT_ASSIGNED_CONTEXT((#576,#579,#577))
|
|
||||||
REPRESENTATION_CONTEXT('','3D')
|
|
||||||
);
|
|
||||||
#575=(
|
|
||||||
GEOMETRIC_REPRESENTATION_CONTEXT(3)
|
|
||||||
GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#573))
|
|
||||||
GLOBAL_UNIT_ASSIGNED_CONTEXT((#576,#579,#577))
|
|
||||||
REPRESENTATION_CONTEXT('','3D')
|
|
||||||
);
|
|
||||||
#576=(
|
|
||||||
LENGTH_UNIT()
|
|
||||||
NAMED_UNIT(*)
|
|
||||||
SI_UNIT(.MILLI.,.METRE.)
|
|
||||||
);
|
|
||||||
#577=(
|
|
||||||
NAMED_UNIT(*)
|
|
||||||
SI_UNIT($,.STERADIAN.)
|
|
||||||
SOLID_ANGLE_UNIT()
|
|
||||||
);
|
|
||||||
#578=DIMENSIONAL_EXPONENTS(0.,0.,0.,0.,0.,0.,0.);
|
|
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#579=(
|
|
||||||
CONVERSION_BASED_UNIT('degree',#581)
|
|
||||||
NAMED_UNIT(#578)
|
|
||||||
PLANE_ANGLE_UNIT()
|
|
||||||
);
|
|
||||||
#580=(
|
|
||||||
NAMED_UNIT(*)
|
|
||||||
PLANE_ANGLE_UNIT()
|
|
||||||
SI_UNIT($,.RADIAN.)
|
|
||||||
);
|
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134542
hardware/Export/pied.stl
134542
hardware/Export/pied.stl
File diff suppressed because it is too large
Load diff
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|
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ISO-10303-21;
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HEADER;
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/* Generated by software containing ST-Developer
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<window_info anchor="bottom" id="Find" order="1" weight="0.32937366" />
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|
|
||||||
<option name="myLimit" value="2678400000" />
|
|
||||||
</component>
|
|
||||||
<component name="XDebuggerManager">
|
|
||||||
<breakpoint-manager>
|
|
||||||
<option name="time" value="24" />
|
|
||||||
</breakpoint-manager>
|
|
||||||
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|
|
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|
|
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|
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|
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|
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|
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|
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|
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|
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|
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</state>
|
|
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</provider>
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/aruco_detection.py">
|
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<provider selected="true" editor-type-id="text-editor">
|
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<state relative-caret-position="90">
|
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|
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<folding>
|
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<element signature="e#0#16#0" expanded="true" />
|
|
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</folding>
|
|
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</state>
|
|
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</provider>
|
|
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</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/drawCube.py" />
|
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<entry file="file://$PROJECT_DIR$/img_aruco/aruco_4.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_15.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_14.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_8.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_10.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_3.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_2.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_11.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_13.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_12.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_7.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
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</entry>
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_4.jpg">
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<provider selected="true" editor-type-id="images" />
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</entry>
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<provider selected="true" editor-type-id="images" />
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</entry>
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_9.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/img_aruco/aruco_3.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_aruco/aruco_1.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_aruco/aruco_2.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_aruco/aruco_7.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
||||||
</entry>
|
|
||||||
<entry file="file://$PROJECT_DIR$/img_aruco/aruco_5.jpg">
|
|
||||||
<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
|
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<entry file="file://$PROJECT_DIR$/img_aruco/aruco_8.jpg">
|
|
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<provider selected="true" editor-type-id="images" />
|
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</entry>
|
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|
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<provider selected="true" editor-type-id="images" />
|
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</entry>
|
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|
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<provider selected="true" editor-type-id="images" />
|
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</entry>
|
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|
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|
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|
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<folding>
|
|
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<element signature="e#0#16#0" expanded="true" />
|
|
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</folding>
|
|
||||||
</state>
|
|
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</provider>
|
|
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</entry>
|
|
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</state>
|
|
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</provider>
|
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/getCalibrationImage.py">
|
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</provider>
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_1.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/img_calibrate/calibration_6.jpg">
|
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<provider selected="true" editor-type-id="images" />
|
|
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</entry>
|
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<entry file="file://$PROJECT_DIR$/calibrate.py">
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<entry file="file://$PROJECT_DIR$/aruco_detection.py">
|
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<folding>
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<element signature="e#0#16#0" expanded="true" />
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</folding>
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</state>
|
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</provider>
|
|
||||||
</entry>
|
|
||||||
</component>
|
|
||||||
</project>
|
|
||||||
Binary file not shown.
|
|
@ -1,15 +0,0 @@
|
||||||
import cv2 as cv
|
|
||||||
import cv2.aruco as aruco
|
|
||||||
|
|
||||||
'''
|
|
||||||
drawMarker(...)
|
|
||||||
drawMarker(dictionary, id, sidePixels[, img[, borderBits]]) -> img
|
|
||||||
'''
|
|
||||||
|
|
||||||
aruco_dict = aruco.Dictionary_get(aruco.DICT_4X4_50) # Un aruco est composé d'une bande noire et d'un code en blanc et noir
|
|
||||||
#4x4 indique la partie ou sera généré le code (blanc et noir donc).
|
|
||||||
print(aruco_dict)
|
|
||||||
|
|
||||||
for aruco_id in range(1,12):
|
|
||||||
img = aruco.drawMarker(aruco_dict, aruco_id, 200)
|
|
||||||
cv.imwrite("./img_aruco/aruco_"+str(aruco_id)+".jpg", img)
|
|
||||||
|
|
@ -1,34 +0,0 @@
|
||||||
import cv2 as cv
|
|
||||||
import cv2.aruco as aruco
|
|
||||||
from calibrate import calculareCameraCalibration
|
|
||||||
|
|
||||||
cap = cv.VideoCapture(0)
|
|
||||||
ret, mtx, dist, rvecs, tvecs = calculareCameraCalibration()
|
|
||||||
parameters = aruco.DetectorParameters_create()
|
|
||||||
aruco_dict = aruco.Dictionary_get(aruco.DICT_4X4_50)
|
|
||||||
drawAxis = True
|
|
||||||
|
|
||||||
while (True):
|
|
||||||
|
|
||||||
ret, frame = cap.read()
|
|
||||||
gray = cv.cvtColor(frame, cv.COLOR_BGR2GRAY)
|
|
||||||
|
|
||||||
corners, ids, rejectedImgPoints = aruco.detectMarkers(gray, aruco_dict, parameters=parameters)
|
|
||||||
|
|
||||||
frame = aruco.drawDetectedMarkers(frame, corners, ids)
|
|
||||||
rvecs, tvecs, _ = aruco.estimatePoseSingleMarkers(corners, 0.05, mtx, dist)
|
|
||||||
if ids is not None:
|
|
||||||
for idx, marker in enumerate(ids):
|
|
||||||
print(corners[idx][0]) #Affiche les coordonée tout les coins Top Left
|
|
||||||
try:
|
|
||||||
if drawAxis is True:
|
|
||||||
aruco.drawAxis(frame, mtx,dist,rvecs[idx], tvecs[idx], 0.1)
|
|
||||||
except:
|
|
||||||
print(" Erreur calcul des axes")
|
|
||||||
|
|
||||||
cv.imshow('frame', frame)
|
|
||||||
if cv.waitKey(1) & 0xFF == ord('q'):
|
|
||||||
break
|
|
||||||
|
|
||||||
cap.release()
|
|
||||||
cv.destroyAllWindows()
|
|
||||||
|
|
@ -1,35 +0,0 @@
|
||||||
import numpy as np
|
|
||||||
import cv2
|
|
||||||
import glob
|
|
||||||
|
|
||||||
|
|
||||||
def calculareCameraCalibration():
|
|
||||||
# termination criteria
|
|
||||||
criteria = (cv2.TERM_CRITERIA_EPS + cv2.TERM_CRITERIA_MAX_ITER, 23, 0.001)
|
|
||||||
|
|
||||||
# prepare object points, like (0,0,0), (1,0,0), (2,0,0) ....,(6,5,0)
|
|
||||||
objp = np.zeros((6*7,3), np.float32)
|
|
||||||
objp[:,:2] = np.mgrid[0:7,0:6].T.reshape(-1,2)
|
|
||||||
|
|
||||||
# Arrays to store object points and image points from all the images.
|
|
||||||
objpoints = [] # 3d point in real world space
|
|
||||||
imgpoints = [] # 2d points in image plane.
|
|
||||||
|
|
||||||
images = glob.glob('./img_calibrate/*.jpg')
|
|
||||||
|
|
||||||
for fname in images:
|
|
||||||
img = cv2.imread(fname)
|
|
||||||
gray = cv2.cvtColor(img,cv2.COLOR_BGR2GRAY)
|
|
||||||
|
|
||||||
# Find the chess board corners
|
|
||||||
ret, corners = cv2.findChessboardCorners(gray, (7,6),None)
|
|
||||||
|
|
||||||
# If found, add object points, image points (after refining them)
|
|
||||||
if ret == True:
|
|
||||||
objpoints.append(objp)
|
|
||||||
|
|
||||||
corners2 = cv2.cornerSubPix(gray,corners,(11,11),(-1,-1),criteria)
|
|
||||||
imgpoints.append(corners2)
|
|
||||||
|
|
||||||
ret, mtx, dist, rvecs, tvecs = cv2.calibrateCamera(objpoints, imgpoints, gray.shape[::-1], None, None)
|
|
||||||
return ret, mtx, dist, rvecs, tvecs
|
|
||||||
|
|
@ -1,21 +0,0 @@
|
||||||
import cv2
|
|
||||||
|
|
||||||
|
|
||||||
cap = cv2.VideoCapture(0)
|
|
||||||
nbrImage = 0
|
|
||||||
while nbrImage < 15:
|
|
||||||
ret, img = cap.read()
|
|
||||||
gray = cv2.cvtColor(img, cv2.COLOR_BGR2GRAY)
|
|
||||||
|
|
||||||
# Find the chess board corners
|
|
||||||
ret, corners = cv2.findChessboardCorners(gray, (7,6),None)
|
|
||||||
|
|
||||||
# If found, add object points, image points (after refining them)
|
|
||||||
if ret == True:
|
|
||||||
nbrImage = nbrImage+1
|
|
||||||
cv2.imwrite("./img_calibrate/calibration_" + str(nbrImage) + ".jpg", img)
|
|
||||||
cv2.putText(img, 'Image ' + str(nbrImage) + ' /15', (5, 30), cv2.FONT_HERSHEY_SIMPLEX, 0.5, (255, 255, 255), 2, cv2.LINE_AA)
|
|
||||||
cv2.imshow('img',img)
|
|
||||||
cv2.waitKey(1000)
|
|
||||||
|
|
||||||
cv2.destroyAllWindows()
|
|
||||||
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|
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|
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|
|
@ -1,138 +0,0 @@
|
||||||
import cv2
|
|
||||||
from OpenGL.GL import *
|
|
||||||
from OpenGL.GLU import *
|
|
||||||
from OpenGL.GLUT import *
|
|
||||||
import numpy as np
|
|
||||||
import sys
|
|
||||||
|
|
||||||
# window dimensions
|
|
||||||
width = 1280
|
|
||||||
height = 720
|
|
||||||
nRange = 1.0
|
|
||||||
|
|
||||||
global capture
|
|
||||||
capture = None
|
|
||||||
|
|
||||||
|
|
||||||
def cv2array(im):
|
|
||||||
h, w, c = im.shape
|
|
||||||
a = np.fromstring(
|
|
||||||
im.tostring(),
|
|
||||||
dtype=im.dtype,
|
|
||||||
count=w * h * c)
|
|
||||||
a.shape = (h, w, c)
|
|
||||||
return a
|
|
||||||
|
|
||||||
|
|
||||||
def init():
|
|
||||||
# glclearcolor (r, g, b, alpha)
|
|
||||||
glClearColor(0.0, 0.0, 0.0, 1.0)
|
|
||||||
|
|
||||||
glutDisplayFunc(display)
|
|
||||||
glutReshapeFunc(reshape)
|
|
||||||
glutKeyboardFunc(keyboard)
|
|
||||||
glutIdleFunc(idle)
|
|
||||||
|
|
||||||
|
|
||||||
def idle():
|
|
||||||
# capture next frame
|
|
||||||
|
|
||||||
global capture
|
|
||||||
_, image = capture.read()
|
|
||||||
|
|
||||||
cv2.cvtColor(image, cv2.COLOR_BGR2RGB)
|
|
||||||
# you must convert the image to array for glTexImage2D to work
|
|
||||||
# maybe there is a faster way that I don't know about yet...
|
|
||||||
|
|
||||||
# print image_arr
|
|
||||||
|
|
||||||
# Create Texture
|
|
||||||
glTexImage2D(GL_TEXTURE_2D,
|
|
||||||
0,
|
|
||||||
GL_RGB,
|
|
||||||
1280, 720,
|
|
||||||
0,
|
|
||||||
GL_RGB,
|
|
||||||
GL_UNSIGNED_BYTE,
|
|
||||||
image)
|
|
||||||
cv2.imshow('frame', image)
|
|
||||||
glutPostRedisplay()
|
|
||||||
|
|
||||||
|
|
||||||
def display():
|
|
||||||
glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT)
|
|
||||||
glEnable(GL_TEXTURE_2D)
|
|
||||||
# glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_REPEAT)
|
|
||||||
# glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_REPEAT)
|
|
||||||
# glTexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_DECAL)
|
|
||||||
# this one is necessary with texture2d for some reason
|
|
||||||
glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST)
|
|
||||||
|
|
||||||
# Set Projection Matrix
|
|
||||||
glMatrixMode(GL_PROJECTION)
|
|
||||||
glLoadIdentity()
|
|
||||||
gluOrtho2D(0, width, 0, height)
|
|
||||||
|
|
||||||
# Switch to Model View Matrix
|
|
||||||
glMatrixMode(GL_MODELVIEW)
|
|
||||||
glLoadIdentity()
|
|
||||||
|
|
||||||
# Draw textured Quads
|
|
||||||
glBegin(GL_QUADS)
|
|
||||||
glTexCoord2f(0.0, 0.0)
|
|
||||||
glVertex2f(0.0, 0.0)
|
|
||||||
glTexCoord2f(1.0, 0.0)
|
|
||||||
glVertex2f(width, 0.0)
|
|
||||||
glTexCoord2f(1.0, 1.0)
|
|
||||||
glVertex2f(width, height)
|
|
||||||
glTexCoord2f(0.0, 1.0)
|
|
||||||
glVertex2f(0.0, height)
|
|
||||||
glEnd()
|
|
||||||
|
|
||||||
glFlush()
|
|
||||||
glutSwapBuffers()
|
|
||||||
|
|
||||||
|
|
||||||
def reshape(w, h):
|
|
||||||
if h == 0:
|
|
||||||
h = 1
|
|
||||||
|
|
||||||
glViewport(0, 0, w, h)
|
|
||||||
glMatrixMode(GL_PROJECTION)
|
|
||||||
|
|
||||||
glLoadIdentity()
|
|
||||||
# allows for reshaping the window without distoring shape
|
|
||||||
|
|
||||||
if w <= h:
|
|
||||||
glOrtho(-nRange, nRange, -nRange * h / w, nRange * h / w, -nRange, nRange)
|
|
||||||
else:
|
|
||||||
glOrtho(-nRange * w / h, nRange * w / h, -nRange, nRange, -nRange, nRange)
|
|
||||||
|
|
||||||
glMatrixMode(GL_MODELVIEW)
|
|
||||||
glLoadIdentity()
|
|
||||||
|
|
||||||
|
|
||||||
def keyboard(key, x, y):
|
|
||||||
global anim
|
|
||||||
if key == chr(27):
|
|
||||||
sys.exit()
|
|
||||||
|
|
||||||
|
|
||||||
def main():
|
|
||||||
global capture
|
|
||||||
# start openCV capturefromCAM
|
|
||||||
capture = cv2.VideoCapture(0)
|
|
||||||
print(capture)
|
|
||||||
capture.set(3, 1280)
|
|
||||||
capture.set(4, 720)
|
|
||||||
glutInit(sys.argv)
|
|
||||||
glutInitDisplayMode(GLUT_DOUBLE | GLUT_RGB | GLUT_DEPTH)
|
|
||||||
glutInitWindowSize(width, height)
|
|
||||||
glutInitWindowPosition(100, 100)
|
|
||||||
glutCreateWindow("OpenGL + OpenCV")
|
|
||||||
|
|
||||||
init()
|
|
||||||
glutMainLoop()
|
|
||||||
|
|
||||||
|
|
||||||
main()
|
|
||||||
Binary file not shown.
|
|
@ -1,6 +0,0 @@
|
||||||
D'aprés mes souvenir :
|
|
||||||
- Asservissement complétement pourrave
|
|
||||||
- Architecture globalement correcte
|
|
||||||
- Reprendre la façon de recevoir des messages pour que ça colle avec la norme 802.15.4
|
|
||||||
J'essayais de lire avec une DMA (taille fixe) mais la norme fait bouger la taille en ajoutant
|
|
||||||
parfois des caractéres d'échapement
|
|
||||||
|
|
@ -1,13 +0,0 @@
|
||||||
[PreviousGenFiles]
|
|
||||||
HeaderPath=D:/Users/senaneuc/Documents/dumby_rtos2/dumby2/Inc
|
|
||||||
HeaderFiles=FreeRTOSConfig.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;gpio.h;adc.h;dma.h;tim.h;usart.h;
|
|
||||||
SourcePath=D:/Users/senaneuc/Documents/dumby_rtos2/dumby2/Src
|
|
||||||
SourceFiles=freertos.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;stm32f1xx_hal_timebase_TIM.c;main.c;gpio.c;adc.c;dma.c;tim.c;usart.c;
|
|
||||||
|
|
||||||
[PreviousLibFiles]
|
|
||||||
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOSConfig_template.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
|
|
||||||
|
|
||||||
[PreviousUsedKeilFiles]
|
|
||||||
SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\adc.c;..\Src\dma.c;..\Src\freertos.c;..\Src\tim.c;..\Src\usart.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;..\Src\stm32f1xx_hal_timebase_TIM.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;../Middlewares/Third_Party/FreeRTOS/Source/croutine.c;../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;../Middlewares/Third_Party/FreeRTOS/Source/list.c;../Middlewares/Third_Party/FreeRTOS/Source/queue.c;../Middlewares/Third_Party/FreeRTOS/Source/tasks.c;../Middlewares/Third_Party/FreeRTOS/Source/timers.c;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;../Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s;../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;../Middlewares/Third_Party/FreeRTOS/Source/croutine.c;../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;../Middlewares/Third_Party/FreeRTOS/Source/list.c;../Middlewares/Third_Party/FreeRTOS/Source/queue.c;../Middlewares/Third_Party/FreeRTOS/Source/tasks.c;../Middlewares/Third_Party/FreeRTOS/Source/timers.c;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;
|
|
||||||
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Middlewares\Third_Party\FreeRTOS\Source\include;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;..\Drivers\CMSIS\Include;..\Inc;
|
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,238 +0,0 @@
|
||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32f1xx.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @version V4.2.0
|
|
||||||
* @date 31-March-2017
|
|
||||||
* @brief CMSIS STM32F1xx Device Peripheral Access Layer Header File.
|
|
||||||
*
|
|
||||||
* The file is the unique include file that the application programmer
|
|
||||||
* is using in the C source code, usually in main.c. This file contains:
|
|
||||||
* - Configuration section that allows to select:
|
|
||||||
* - The STM32F1xx device used in the target application
|
|
||||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
|
||||||
* code will be based on direct access to peripheral’s registers
|
|
||||||
* rather than drivers API), this option is controlled by
|
|
||||||
* "#define USE_HAL_DRIVER"
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup CMSIS
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup stm32f1xx
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __STM32F1XX_H
|
|
||||||
#define __STM32F1XX_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
|
|
||||||
/** @addtogroup Library_configuration_section
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief STM32 Family
|
|
||||||
*/
|
|
||||||
#if !defined (STM32F1)
|
|
||||||
#define STM32F1
|
|
||||||
#endif /* STM32F1 */
|
|
||||||
|
|
||||||
/* Uncomment the line below according to the target STM32L device used in your
|
|
||||||
application
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
|
|
||||||
!defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
|
|
||||||
!defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
|
|
||||||
/* #define STM32F100xB */ /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
|
|
||||||
/* #define STM32F100xE */ /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
|
|
||||||
/* #define STM32F101x6 */ /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
|
|
||||||
/* #define STM32F101xB */ /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
|
|
||||||
/* #define STM32F101xE */ /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */
|
|
||||||
/* #define STM32F101xG */ /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
|
|
||||||
/* #define STM32F102x6 */ /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
|
|
||||||
/* #define STM32F102xB */ /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
|
|
||||||
/* #define STM32F103x6 */ /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
|
|
||||||
/* #define STM32F103xB */ /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
|
|
||||||
/* #define STM32F103xE */ /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
|
|
||||||
/* #define STM32F103xG */ /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
|
|
||||||
/* #define STM32F105xC */ /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
|
|
||||||
/* #define STM32F107xC */ /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
|
||||||
devices, you can define the device in your toolchain compiler preprocessor.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if !defined (USE_HAL_DRIVER)
|
|
||||||
/**
|
|
||||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
|
||||||
In this case, these drivers will not be included and the application code will
|
|
||||||
be based on direct access to peripherals registers
|
|
||||||
*/
|
|
||||||
/*#define USE_HAL_DRIVER */
|
|
||||||
#endif /* USE_HAL_DRIVER */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief CMSIS Device version number V4.2.0
|
|
||||||
*/
|
|
||||||
#define __STM32F1_CMSIS_VERSION_MAIN (0x04) /*!< [31:24] main version */
|
|
||||||
#define __STM32F1_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
|
|
||||||
#define __STM32F1_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
|
||||||
#define __STM32F1_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
|
||||||
#define __STM32F1_CMSIS_VERSION ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
|
|
||||||
|(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
|
|
||||||
|(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
|
|
||||||
|(__STM32F1_CMSIS_VERSION_RC))
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup Device_Included
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if defined(STM32F100xB)
|
|
||||||
#include "stm32f100xb.h"
|
|
||||||
#elif defined(STM32F100xE)
|
|
||||||
#include "stm32f100xe.h"
|
|
||||||
#elif defined(STM32F101x6)
|
|
||||||
#include "stm32f101x6.h"
|
|
||||||
#elif defined(STM32F101xB)
|
|
||||||
#include "stm32f101xb.h"
|
|
||||||
#elif defined(STM32F101xE)
|
|
||||||
#include "stm32f101xe.h"
|
|
||||||
#elif defined(STM32F101xG)
|
|
||||||
#include "stm32f101xg.h"
|
|
||||||
#elif defined(STM32F102x6)
|
|
||||||
#include "stm32f102x6.h"
|
|
||||||
#elif defined(STM32F102xB)
|
|
||||||
#include "stm32f102xb.h"
|
|
||||||
#elif defined(STM32F103x6)
|
|
||||||
#include "stm32f103x6.h"
|
|
||||||
#elif defined(STM32F103xB)
|
|
||||||
#include "stm32f103xb.h"
|
|
||||||
#elif defined(STM32F103xE)
|
|
||||||
#include "stm32f103xe.h"
|
|
||||||
#elif defined(STM32F103xG)
|
|
||||||
#include "stm32f103xg.h"
|
|
||||||
#elif defined(STM32F105xC)
|
|
||||||
#include "stm32f105xc.h"
|
|
||||||
#elif defined(STM32F107xC)
|
|
||||||
#include "stm32f107xc.h"
|
|
||||||
#else
|
|
||||||
#error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup Exported_types
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
typedef enum
|
|
||||||
{
|
|
||||||
RESET = 0,
|
|
||||||
SET = !RESET
|
|
||||||
} FlagStatus, ITStatus;
|
|
||||||
|
|
||||||
typedef enum
|
|
||||||
{
|
|
||||||
DISABLE = 0,
|
|
||||||
ENABLE = !DISABLE
|
|
||||||
} FunctionalState;
|
|
||||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
|
||||||
|
|
||||||
typedef enum
|
|
||||||
{
|
|
||||||
ERROR = 0,
|
|
||||||
SUCCESS = !ERROR
|
|
||||||
} ErrorStatus;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
/** @addtogroup Exported_macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
|
||||||
|
|
||||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
|
||||||
|
|
||||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
|
||||||
|
|
||||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
|
||||||
|
|
||||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
|
||||||
|
|
||||||
#define READ_REG(REG) ((REG))
|
|
||||||
|
|
||||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
|
||||||
|
|
||||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if defined (USE_HAL_DRIVER)
|
|
||||||
#include "stm32f1xx_hal.h"
|
|
||||||
#endif /* USE_HAL_DRIVER */
|
|
||||||
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
|
|
||||||
#endif /* __STM32F1xx_H */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
||||||
|
|
@ -1,116 +0,0 @@
|
||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file system_stm32f10x.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @version V4.2.0
|
|
||||||
* @date 31-March-2017
|
|
||||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup CMSIS
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup stm32f10x_system
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Define to prevent recursive inclusion
|
|
||||||
*/
|
|
||||||
#ifndef __SYSTEM_STM32F10X_H
|
|
||||||
#define __SYSTEM_STM32F10X_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/** @addtogroup STM32F10x_System_Includes
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
/** @addtogroup STM32F10x_System_Exported_types
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
|
||||||
extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
|
|
||||||
extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F10x_System_Exported_Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F10x_System_Exported_Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F10x_System_Exported_Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
extern void SystemInit(void);
|
|
||||||
extern void SystemCoreClockUpdate(void);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /*__SYSTEM_STM32F10X_H */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
||||||
|
|
@ -1,332 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f100xb.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F100xB Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
|
||||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
|
||||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
|
||||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD CEC_IRQHandler ; HDMI-CEC
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT CEC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM1_BRK_TIM15_IRQHandler
|
|
||||||
TIM1_UP_TIM16_IRQHandler
|
|
||||||
TIM1_TRG_COM_TIM17_IRQHandler
|
|
||||||
TIM1_CC_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
CEC_IRQHandler
|
|
||||||
TIM6_DAC_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,363 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f100xe.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F100xE Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system and also configure the external
|
|
||||||
;* SRAM mounted on STM32100E-EVAL board to be used as data
|
|
||||||
;* memory (optional, to be enabled by user)
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
|
||||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
|
||||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
|
||||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD CEC_IRQHandler ; HDMI CEC
|
|
||||||
DCD TIM12_IRQHandler ; TIM12
|
|
||||||
DCD TIM13_IRQHandler ; TIM13
|
|
||||||
DCD TIM14_IRQHandler ; TIM14
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM5_IRQHandler ; TIM5
|
|
||||||
DCD SPI3_IRQHandler ; SPI3
|
|
||||||
DCD UART4_IRQHandler ; UART4
|
|
||||||
DCD UART5_IRQHandler ; UART5
|
|
||||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
|
||||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
|
||||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
|
||||||
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
|
||||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT CEC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM12_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM13_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM14_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM5_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI3_IRQHandler [WEAK]
|
|
||||||
EXPORT UART4_IRQHandler [WEAK]
|
|
||||||
EXPORT UART5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM1_BRK_TIM15_IRQHandler
|
|
||||||
TIM1_UP_TIM16_IRQHandler
|
|
||||||
TIM1_TRG_COM_TIM17_IRQHandler
|
|
||||||
TIM1_CC_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
CEC_IRQHandler
|
|
||||||
TIM12_IRQHandler
|
|
||||||
TIM13_IRQHandler
|
|
||||||
TIM14_IRQHandler
|
|
||||||
TIM5_IRQHandler
|
|
||||||
SPI3_IRQHandler
|
|
||||||
UART4_IRQHandler
|
|
||||||
UART5_IRQHandler
|
|
||||||
TIM6_DAC_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
DMA2_Channel1_IRQHandler
|
|
||||||
DMA2_Channel2_IRQHandler
|
|
||||||
DMA2_Channel3_IRQHandler
|
|
||||||
DMA2_Channel4_5_IRQHandler
|
|
||||||
DMA2_Channel5_IRQHandler
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,295 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f101x6.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F101x6 Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler routine
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,305 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f101xb.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F101xB Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,343 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f101xe.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F101xE Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD FSMC_IRQHandler ; FSMC
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM5_IRQHandler ; TIM5
|
|
||||||
DCD SPI3_IRQHandler ; SPI3
|
|
||||||
DCD UART4_IRQHandler ; UART4
|
|
||||||
DCD UART5_IRQHandler ; UART5
|
|
||||||
DCD TIM6_IRQHandler ; TIM6
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
|
||||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
|
||||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
|
||||||
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT FSMC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM5_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI3_IRQHandler [WEAK]
|
|
||||||
EXPORT UART4_IRQHandler [WEAK]
|
|
||||||
EXPORT UART5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
FSMC_IRQHandler
|
|
||||||
TIM5_IRQHandler
|
|
||||||
SPI3_IRQHandler
|
|
||||||
UART4_IRQHandler
|
|
||||||
UART5_IRQHandler
|
|
||||||
TIM6_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
DMA2_Channel1_IRQHandler
|
|
||||||
DMA2_Channel2_IRQHandler
|
|
||||||
DMA2_Channel3_IRQHandler
|
|
||||||
DMA2_Channel4_5_IRQHandler
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,355 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f101xg.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F101xG Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD TIM9_IRQHandler ; TIM9
|
|
||||||
DCD TIM10_IRQHandler ; TIM10
|
|
||||||
DCD TIM11_IRQHandler ; TIM11
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM12_IRQHandler ; TIM12
|
|
||||||
DCD TIM13_IRQHandler ; TIM13
|
|
||||||
DCD TIM14_IRQHandler ; TIM14
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD FSMC_IRQHandler ; FSMC
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM5_IRQHandler ; TIM5
|
|
||||||
DCD SPI3_IRQHandler ; SPI3
|
|
||||||
DCD UART4_IRQHandler ; UART4
|
|
||||||
DCD UART5_IRQHandler ; UART5
|
|
||||||
DCD TIM6_IRQHandler ; TIM6
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
|
||||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
|
||||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
|
||||||
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM9_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM10_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM11_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM12_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM13_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM14_IRQHandler [WEAK]
|
|
||||||
EXPORT FSMC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM5_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI3_IRQHandler [WEAK]
|
|
||||||
EXPORT UART4_IRQHandler [WEAK]
|
|
||||||
EXPORT UART5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_2_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM9_IRQHandler
|
|
||||||
TIM10_IRQHandler
|
|
||||||
TIM11_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
TIM12_IRQHandler
|
|
||||||
TIM13_IRQHandler
|
|
||||||
TIM14_IRQHandler
|
|
||||||
FSMC_IRQHandler
|
|
||||||
TIM5_IRQHandler
|
|
||||||
SPI3_IRQHandler
|
|
||||||
UART4_IRQHandler
|
|
||||||
UART5_IRQHandler
|
|
||||||
TIM6_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
DMA2_Channel1_IRQHandler
|
|
||||||
DMA2_Channel2_IRQHandler
|
|
||||||
DMA2_Channel3_IRQHandler
|
|
||||||
DMA2_Channel4_5_IRQHandler
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,302 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f102x6.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F102x6 Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD USB_HP_IRQHandler ; USB High Priority
|
|
||||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler routine
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT USB_HP_IRQHandler [WEAK]
|
|
||||||
EXPORT USB_LP_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
USB_HP_IRQHandler
|
|
||||||
USB_LP_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
USBWakeUp_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,312 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32f102xb.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V4.2.0
|
|
||||||
;* Date : 31-March-2017
|
|
||||||
;* Description : STM32F102xB Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Configure the clock system
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD TAMPER_IRQHandler ; Tamper
|
|
||||||
DCD RTC_IRQHandler ; RTC
|
|
||||||
DCD FLASH_IRQHandler ; Flash
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD USB_HP_IRQHandler ; USB High Priority
|
|
||||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
||||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMPER_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT USB_HP_IRQHandler [WEAK]
|
|
||||||
EXPORT USB_LP_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
TAMPER_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
USB_HP_IRQHandler
|
|
||||||
USB_LP_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
USBWakeUp_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue