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Ajout Objectif 4

Auriane Lartigue 3 years ago
parent
commit
441f31b0ca

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Obj_4/Librairie/GFSSP72/GFSSP72.pdf View File


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Obj_4/Librairie/GFSSP72/gassp72.h View File

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+/**
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+ * Bibliotheque GASSP 2013-02-15
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+ *
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+ * GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
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+ *
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+ */
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+
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+// STM32F10X_CL : pour le STM32F107 "Communication Line"
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+// STM32F10X_MD : pour le STM32F103 "Medium Density"
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+
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+//#define STM32F10X_MD	// 2019 fix for Keil 5.23
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+
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+#include "stm32f10x.h"
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+
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+// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
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+void CLOCK_Configure(void);
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+
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+// Timers 1, 2, 3, 4 -------------------------------------------------------
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+// la duree entre deux debordements successifs doit etre donnnee en periodes
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+// d'horloge CPU (typiquement 72 MHz)
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+void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
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+
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+// activation d'une fonction de traitement de l'interruption timer (callback)
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+void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
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+
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+// bloque le timer
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+#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
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+
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+// Lance timer
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+#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
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+
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+// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
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+// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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+// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
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+// de valeurs acceptees pour moduler la largeur d'impulsion
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+vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
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+
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+// Timer systeme "SysTick" -------------------------------------------------
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+
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+// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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+void Systick_Period_ff( unsigned int Periode_ticks );
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+
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+// activation d'une fonction de traitement de l'interruption timer (callback)
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+void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
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+
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+#define  SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
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+#define  SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
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+#define  SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
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+#define  SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
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+
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+// ADC - DMA ---------------------------------------------------------------
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+// Analog-to-Digital Conversion, Direct Memory Access
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+
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+// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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+// la fonction rend la duree totale de conversion (meme unites)
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+u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
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+
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+// choix d'un canal ADC unique
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+void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
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+
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+// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
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+// Les sources de déclenchement possibles :
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+#define TIM1_CC1 0
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+#define TIM1_CC2 1
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+#define TIM1_CC3 2
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+#define TIM2_CC2 3
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+#define TIM4_CC4 5
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+void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
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+
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+// initialisation d'acquisition en mode DMA
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+// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
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+void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
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+
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+
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+// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
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+// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction  Init_ADC1_DMA1
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+void Start_DMA1( u16 NbEchDMA );
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+
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+// arret DMA
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+#define  Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
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+
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+// fonction d'attente (bloquante)
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+// la duree depend de la periode d'acquisition et du nombre d'echantillons
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+void Wait_On_End_Of_DMA1(void);
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+
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+
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+// GPIO --------------------------------------------------------------------
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+
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+// Sens
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+#define INPUT   'i'
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+#define OUTPUT  'o'
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+
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+// Techno pour pin en entrée (INPUT)
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+#define ANALOG              0
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+#define INPUT_FLOATING      1
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+#define INPUT_PULL_DOWN_UP  2
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+
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+// Techno pour pin en sortie (OUTPUT)
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+#define OUTPUT_PPULL    0
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+#define OUTPUT_OPDRAIN  1
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+#define ALT_PPULL       2
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+#define ALT_OPDRAIN     3
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+
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+// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
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+// Exemple :
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+// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
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+// Place le bit 8 du port B en sortie Push-pull
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+// Renvoie 0 si tout est OK,  et 1 s'il y a un problème (plage d'entrée non respectée)
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+char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
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+
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+// Spécifier le numéro de broche (0 à 15)
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+// exemple : Port_IO_Set(GPIOB,8);
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+#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
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+
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+#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

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Obj_4/Librairie/GFSSP72/gfssp72.lib View File


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Obj_4/Librairie/etat/etat.h View File

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+typedef struct {
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+int position;        // 0
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+int taille;        // 4
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+void * son;        // 8
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+int resolution;        // 12
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+int periode_ticks;    // 16
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+} type_etat;

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Obj_4/Librairie/etat/etat.inc View File

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+E_POS    equ    0
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+E_TAI    equ    4
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+E_SON    equ    8
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+E_RES    equ    12
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+E_PER    equ    16
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+    end

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Obj_4/Obj/CHTI.build_log.htm View File

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+<html>
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+<body>
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+<pre>
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+<h1>µVision Build Log</h1>
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+<h2>Tool Versions:</h2>
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+IDE-Version: µVision V5.25.2.0
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+Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
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+License Information: CSN CSN, INSA de Toulouse, LIC=----
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+ 
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+Tool Versions:
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+Toolchain:       MDK-Lite  Version: 5.25.2.0
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+Toolchain Path:  C:\Keil_v5\ARM\ARMCC\Bin
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+C Compiler:      Armcc.exe V5.06 update 6 (build 750)
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+Assembler:       Armasm.exe V5.06 update 6 (build 750)
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+Linker/Locator:  ArmLink.exe V5.06 update 6 (build 750)
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+Library Manager: ArmAr.exe V5.06 update 6 (build 750)
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+Hex Converter:   FromElf.exe V5.06 update 6 (build 750)
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+CPU DLL:         SARMCM3.DLL V5.25.2.0
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+Dialog DLL:      DARMSTM.DLL V1.68.0.0
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+Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V3.0.1.0
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+Dialog DLL:      TCM.DLL V1.35.1.0
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+ 
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+<h2>Project:</h2>
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+U:\Windows\Bureau\BE_CHTI\Obj_4\Project.uvprojx
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+Project File Date:  05/29/2020
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+
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+<h2>Output:</h2>
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+*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
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+Rebuild target 'Simu'
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+assembling startup-rvds.s...
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+assembling TabSinCos.asm...
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+assembling Son.s...
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+assembling DFT.s...
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+assembling bruitverre.asm...
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+compiling principal.c...
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+linking...
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+Program Size: Code=4164 RO-data=11556 RW-data=420 ZI-data=1560  
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+FromELF: creating hex file...
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+".\Obj\CHTI.axf" - 0 Error(s), 0 Warning(s).
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+
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+<h2>Software Packages used:</h2>
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+
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+Package Vendor: ARM
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+                http://www.keil.com/pack/ARM.CMSIS.5.3.0.pack
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+                ARM.CMSIS.5.3.0
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+                CMSIS (Cortex Microcontroller Software Interface Standard)
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+   * Component: CORE Version: 5.1.1
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+
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+Package Vendor: Keil
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+                http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.2.0.pack
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+                Keil.STM32F1xx_DFP.2.2.0
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+                STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
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+
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+<h2>Collection of Component include folders:</h2>
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+  .\RTE\_Simu
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+  C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include
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+  C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include
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+
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+<h2>Collection of Component Files used:</h2>
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+
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+   * Component: ARM::CMSIS:CORE:5.1.1
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+Build Time Elapsed:  00:00:01
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+</pre>
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+</body>
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+</html>

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Obj_4/Obj/CHTI.map View File

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+Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
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+
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+==============================================================================
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+
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+Section Cross References
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+
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+    principal.o(i.main) refers to clock.o(i.CLOCK_Configure) for CLOCK_Configure
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+    principal.o(i.main) refers to gpio.o(i.GPIO_Configure) for GPIO_Configure
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+    principal.o(i.main) refers to timer_1234.o(i.PWM_Init_ff) for PWM_Init_ff
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+    principal.o(i.main) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
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+    principal.o(i.main) refers to timer_1234.o(i.Active_IT_Debordement_Timer) for Active_IT_Debordement_Timer
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+    principal.o(i.main) refers to adc_fake.o(i.Init_TimingADC_ActiveADC_ff) for Init_TimingADC_ActiveADC_ff
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+    principal.o(i.main) refers to adc_fake.o(i.Single_Channel_ADC) for Single_Channel_ADC
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+    principal.o(i.main) refers to adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) for Init_Conversion_On_Trig_Timer_ff
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+    principal.o(i.main) refers to adc_fake.o(i.Init_ADC1_DMA1) for Init_ADC1_DMA1
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+    principal.o(i.main) refers to timer_systick.o(i.Systick_Period_ff) for Systick_Period_ff
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+    principal.o(i.main) refers to timer_systick.o(i.Systick_Prio_IT) for Systick_Prio_IT
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+    principal.o(i.main) refers to bruitverre.o(SecSon) for PeriodeSonMicroSec
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+    principal.o(i.main) refers to principal.o(.bss) for etat
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+    principal.o(i.main) refers to son.o(moncode) for timer_callback
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+    principal.o(i.main) refers to principal.o(i.sys_callback) for sys_callback
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+    principal.o(i.sys_callback) refers to adc_fake.o(i.Start_DMA1) for Start_DMA1
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+    principal.o(i.sys_callback) refers to adc_fake.o(i.Wait_On_End_Of_DMA1) for Wait_On_End_Of_DMA1
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+    principal.o(i.sys_callback) refers to dft.o(moncode) for CalculM
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+    principal.o(i.sys_callback) refers to principal.o(.bss) for dma_buf
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+    startup-rvds.o(RESET) refers to startup-rvds.o(STACK) for __initial_sp
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+    startup-rvds.o(RESET) refers to startup-rvds.o(.text) for Reset_Handler
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+    startup-rvds.o(RESET) refers to timer_systick.o(i.SysTick_Handler) for SysTick_Handler
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+    startup-rvds.o(RESET) refers to timer_1234.o(i.TIM1_UP_IRQHandler) for TIM1_UP_IRQHandler
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+    startup-rvds.o(RESET) refers to timer_1234.o(i.TIM1_CC_IRQHandler) for TIM1_CC_IRQHandler
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+    startup-rvds.o(RESET) refers to timer_1234.o(i.TIM2_IRQHandler) for TIM2_IRQHandler
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+    startup-rvds.o(RESET) refers to timer_1234.o(i.TIM3_IRQHandler) for TIM3_IRQHandler
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+    startup-rvds.o(RESET) refers to timer_1234.o(i.TIM4_IRQHandler) for TIM4_IRQHandler
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+    startup-rvds.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main
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+    dft.o(moncode) refers to tabsincos.o(Trigo) for TabCos
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+    son.o(moncode) refers to principal.o(.bss) for etat
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+    clock.o(i.CLOCK_Configure) refers to clock.o(i.CLOCK_HPRECompute) for CLOCK_HPRECompute
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+    timer_1234.o(i.Active_IT_Compare_Timer) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.Active_IT_Debordement_Timer) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.Capture_Init) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
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+    timer_1234.o(i.Capture_Init) refers to dfltui.o(.text) for __aeabi_ui2d
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+    timer_1234.o(i.Capture_Init) refers to f2d.o(.text) for __aeabi_f2d
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+    timer_1234.o(i.Capture_Init) refers to dmul.o(.text) for __aeabi_dmul
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+    timer_1234.o(i.Capture_Init) refers to ddiv.o(.text) for __aeabi_ddiv
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+    timer_1234.o(i.Capture_Init) refers to d2f.o(.text) for __aeabi_d2f
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+    timer_1234.o(i.Capture_Init) refers to ffltui.o(.text) for __aeabi_ui2f
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+    timer_1234.o(i.Capture_Init) refers to fmul.o(.text) for __aeabi_fmul
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+    timer_1234.o(i.Capture_Init) refers to ffixui.o(.text) for __aeabi_f2uiz
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+    timer_1234.o(i.Capture_Init) refers to ffixi.o(.text) for __aeabi_f2iz
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+    timer_1234.o(i.Lire_Duree_Pulse) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.PWM_Init) refers to f2d.o(.text) for __aeabi_f2d
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+    timer_1234.o(i.PWM_Init) refers to ddiv.o(.text) for __aeabi_ddiv
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+    timer_1234.o(i.PWM_Init) refers to d2f.o(.text) for __aeabi_d2f
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+    timer_1234.o(i.PWM_Init) refers to timer_1234.o(i.Timer_1234_Init) for Timer_1234_Init
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+    timer_1234.o(i.PWM_Init_ff) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
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+    timer_1234.o(i.TIM1_CC_IRQHandler) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.TIM1_UP_IRQHandler) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.TIM2_IRQHandler) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.TIM3_IRQHandler) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.TIM4_IRQHandler) refers to timer_1234.o(.data) for .data
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+    timer_1234.o(i.Timer_1234_Init) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
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+    timer_1234.o(i.Timer_1234_Init) refers to ffltui.o(.text) for __aeabi_ui2f
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+    timer_1234.o(i.Timer_1234_Init) refers to fmul.o(.text) for __aeabi_fmul
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+    timer_1234.o(i.Timer_1234_Init) refers to f2d.o(.text) for __aeabi_f2d
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+    timer_1234.o(i.Timer_1234_Init) refers to ddiv.o(.text) for __aeabi_ddiv
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+    timer_1234.o(i.Timer_1234_Init) refers to d2f.o(.text) for __aeabi_d2f
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+    timer_1234.o(i.Timer_1234_Init) refers to fscalb.o(.text) for __ARM_scalbnf
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+    timer_1234.o(i.Timer_1234_Init) refers to ffixui.o(.text) for __aeabi_f2uiz
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+    timer_1234.o(i.Timer_1234_Init) refers to fdiv.o(.text) for __aeabi_fdiv
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+    timer_1234.o(i.Timer_1234_Init) refers to dfltui.o(.text) for __aeabi_ui2d
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+    timer_1234.o(i.Timer_1234_Init) refers to dadd.o(.text) for __aeabi_dadd
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+    timer_1234.o(i.Timer_1234_Init) refers to dmul.o(.text) for __aeabi_dmul
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+    timer_1234.o(i.Timer_1234_Init_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
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+    timer_1234.o(i.Timer_1234_Init_ff) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
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+    timer_systick.o(i.SysTick_Handler) refers to timer_systick.o(.data) for .data
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+    timer_systick.o(i.Systick_Period) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
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+    timer_systick.o(i.Systick_Period) refers to ffltui.o(.text) for __aeabi_ui2f
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+    timer_systick.o(i.Systick_Period) refers to fmul.o(.text) for __aeabi_fmul
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+    timer_systick.o(i.Systick_Period) refers to f2d.o(.text) for __aeabi_f2d
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+    timer_systick.o(i.Systick_Period) refers to ddiv.o(.text) for __aeabi_ddiv
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+    timer_systick.o(i.Systick_Period) refers to d2f.o(.text) for __aeabi_d2f
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+    timer_systick.o(i.Systick_Period) refers to ffixui.o(.text) for __aeabi_f2uiz
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+    timer_systick.o(i.Systick_Period) refers to fdiv.o(.text) for __aeabi_fdiv
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+    timer_systick.o(i.Systick_Period) refers to dmul.o(.text) for __aeabi_dmul
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+    timer_systick.o(i.Systick_Prio_IT) refers to timer_systick.o(.data) for .data
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+    adc_fake.o(i.Init_ADC1_DMA1) refers to adc_fake.o(.bss) for .bss
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+    adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
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+    adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
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+    adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to timer_1234.o(i.Active_IT_Debordement_Timer) for Active_IT_Debordement_Timer
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+    adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to adc_fake.o(.bss) for .bss
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+    adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to adc_fake.o(i.fake_timer_callback) for fake_timer_callback
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+    adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to clock.o(i.CLOCK_GetADCCLK) for CLOCK_GetADCCLK
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+    adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
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+    adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to adc_fake.o(.bss) for .bss
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+    adc_fake.o(i.Start_DMA1) refers to adc_fake.o(.bss) for .bss
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+    adc_fake.o(i.Wait_On_End_Of_DMA1) refers to adc_fake.o(.bss) for .bss
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+    adc_fake.o(i.Wait_On_End_Of_DMA1) refers to libcos.o(FakeTab) for LibCos
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+    adc_fake.o(i.fake_timer_callback) refers to adc_fake.o(.bss) for .bss
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload
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+    entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk
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+    fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    fdiv.o(.text) refers to fepilogue.o(.text) for _float_round
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+    fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl
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+    dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr
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+    dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue
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+    dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue
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+    ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    ddiv.o(.text) refers to depilogue.o(.text) for _double_round
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+    ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
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+    ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue
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+    dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
121
+    dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue
122
+    ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
123
+    ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
124
+    f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
125
+    d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
126
+    d2f.o(.text) refers to fepilogue.o(.text) for _float_round
127
+    entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000
128
+    entry2.o(.ARM.Collect$$$$00002712) refers to startup-rvds.o(STACK) for __initial_sp
129
+    entry2.o(__vectab_stack_and_reset_area) refers to startup-rvds.o(STACK) for __initial_sp
130
+    entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main
131
+    entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload
132
+    entry9a.o(.ARM.Collect$$$$0000000B) refers to principal.o(i.main) for main
133
+    entry9b.o(.ARM.Collect$$$$0000000C) refers to principal.o(i.main) for main
134
+    depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl
135
+    depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr
136
+    init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload
137
+
138
+
139
+==============================================================================
140
+
141
+Removing Unused input sections from the image.
142
+
143
+    Removing principal.o(.rev16_text), (4 bytes).
144
+    Removing principal.o(.revsh_text), (4 bytes).
145
+    Removing principal.o(.rrx_text), (6 bytes).
146
+    Removing startup-rvds.o(HEAP), (512 bytes).
147
+    Removing son.o(madata), (4 bytes).
148
+    Removing clock.o(.rev16_text), (4 bytes).
149
+    Removing clock.o(.revsh_text), (4 bytes).
150
+    Removing clock.o(.rrx_text), (6 bytes).
151
+    Removing clock.o(i.CLOCK_GetPCLK1), (8 bytes).
152
+    Removing clock.o(i.CLOCK_GetPCLK2), (8 bytes).
153
+    Removing gpio.o(.rev16_text), (4 bytes).
154
+    Removing gpio.o(.revsh_text), (4 bytes).
155
+    Removing gpio.o(.rrx_text), (6 bytes).
156
+    Removing timer_1234.o(.rev16_text), (4 bytes).
157
+    Removing timer_1234.o(.revsh_text), (4 bytes).
158
+    Removing timer_1234.o(.rrx_text), (6 bytes).
159
+    Removing timer_1234.o(i.Active_IT_Compare_Timer), (492 bytes).
160
+    Removing timer_1234.o(i.Capture_Init), (484 bytes).
161
+    Removing timer_1234.o(i.Lire_Duree_Pulse), (96 bytes).
162
+    Removing timer_1234.o(i.PWM_Complementaire_Timer1), (60 bytes).
163
+    Removing timer_1234.o(i.PWM_Init), (200 bytes).
164
+    Removing timer_1234.o(i.Timer_1234_Init), (268 bytes).
165
+    Removing timer_1234.o(i.Timer_Inc_Init), (180 bytes).
166
+    Removing timer_systick.o(.rev16_text), (4 bytes).
167
+    Removing timer_systick.o(.revsh_text), (4 bytes).
168
+    Removing timer_systick.o(.rrx_text), (6 bytes).
169
+    Removing timer_systick.o(i.Systick_Period), (196 bytes).
170
+    Removing adc_fake.o(.rev16_text), (4 bytes).
171
+    Removing adc_fake.o(.revsh_text), (4 bytes).
172
+    Removing adc_fake.o(.rrx_text), (6 bytes).
173
+    Removing fmul.o(.text), (100 bytes).
174
+    Removing fdiv.o(.text), (124 bytes).
175
+    Removing fscalb.o(.text), (24 bytes).
176
+    Removing dadd.o(.text), (334 bytes).
177
+    Removing dmul.o(.text), (228 bytes).
178
+    Removing ddiv.o(.text), (222 bytes).
179
+    Removing ffltui.o(.text), (10 bytes).
180
+    Removing dfltui.o(.text), (26 bytes).
181
+    Removing ffixi.o(.text), (50 bytes).
182
+    Removing ffixui.o(.text), (40 bytes).
183
+    Removing f2d.o(.text), (38 bytes).
184
+    Removing d2f.o(.text), (56 bytes).
185
+    Removing fepilogue.o(.text), (110 bytes).
186
+    Removing depilogue.o(.text), (186 bytes).
187
+
188
+44 unused section(s) (total 4140 bytes) removed from the image.
189
+
190
+==============================================================================
191
+
192
+Adding Veneers to the image
193
+
194
+    Adding TT veneer (10 bytes, Long) for call to 'CalculM' from principal.o(i.sys_callback).
195
+
196
+1 Veneer(s) (total 10 bytes) added to the image.
197
+
198
+==============================================================================
199
+
200
+Image Symbol Table
201
+
202
+    Local Symbols
203
+
204
+    Symbol Name                              Value     Ov Type        Size  Object(Section)
205
+
206
+    ../clib/../cmprslib/zerorunl2.c          0x00000000   Number         0  __dczerorl2.o ABSOLUTE
207
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry11a.o ABSOLUTE
208
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry10a.o ABSOLUTE
209
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry9b.o ABSOLUTE
210
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry9a.o ABSOLUTE
211
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry8b.o ABSOLUTE
212
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry8a.o ABSOLUTE
213
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry7b.o ABSOLUTE
214
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry7a.o ABSOLUTE
215
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry5.o ABSOLUTE
216
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry2.o ABSOLUTE
217
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry11b.o ABSOLUTE
218
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry.o ABSOLUTE
219
+    ../clib/microlib/init/entry.s            0x00000000   Number         0  entry10b.o ABSOLUTE
220
+    ../clib/microlib/longlong.c              0x00000000   Number         0  llushr.o ABSOLUTE
221
+    ../clib/microlib/longlong.c              0x00000000   Number         0  llsshr.o ABSOLUTE
222
+    ../clib/microlib/longlong.c              0x00000000   Number         0  llshl.o ABSOLUTE
223
+    ../clib/microlib/stubs.s                 0x00000000   Number         0  iusefp.o ABSOLUTE
224
+    ../fplib/microlib/d2f.c                  0x00000000   Number         0  d2f.o ABSOLUTE
225
+    ../fplib/microlib/f2d.c                  0x00000000   Number         0  f2d.o ABSOLUTE
226
+    ../fplib/microlib/fpadd.c                0x00000000   Number         0  dadd.o ABSOLUTE
227
+    ../fplib/microlib/fpdiv.c                0x00000000   Number         0  fdiv.o ABSOLUTE
228
+    ../fplib/microlib/fpdiv.c                0x00000000   Number         0  ddiv.o ABSOLUTE
229
+    ../fplib/microlib/fpepilogue.c           0x00000000   Number         0  depilogue.o ABSOLUTE
230
+    ../fplib/microlib/fpepilogue.c           0x00000000   Number         0  fepilogue.o ABSOLUTE
231
+    ../fplib/microlib/fpfix.c                0x00000000   Number         0  ffixi.o ABSOLUTE
232
+    ../fplib/microlib/fpfix.c                0x00000000   Number         0  ffixui.o ABSOLUTE
233
+    ../fplib/microlib/fpflt.c                0x00000000   Number         0  ffltui.o ABSOLUTE
234
+    ../fplib/microlib/fpflt.c                0x00000000   Number         0  dfltui.o ABSOLUTE
235
+    ../fplib/microlib/fpmul.c                0x00000000   Number         0  fmul.o ABSOLUTE
236
+    ../fplib/microlib/fpmul.c                0x00000000   Number         0  dmul.o ABSOLUTE
237
+    ../fplib/microlib/fpscalb.c              0x00000000   Number         0  fscalb.o ABSOLUTE
238
+    Lib\ADC_FAKE.c                           0x00000000   Number         0  adc_fake.o ABSOLUTE
239
+    Lib\GPIO.c                               0x00000000   Number         0  gpio.o ABSOLUTE
240
+    Lib\Timer_1234.c                         0x00000000   Number         0  timer_1234.o ABSOLUTE
241
+    Lib\Timer_Systick.c                      0x00000000   Number         0  timer_systick.o ABSOLUTE
242
+    Lib\\ADC_FAKE.c                          0x00000000   Number         0  adc_fake.o ABSOLUTE
243
+    Lib\\GPIO.c                              0x00000000   Number         0  gpio.o ABSOLUTE
244
+    Lib\\Timer_1234.c                        0x00000000   Number         0  timer_1234.o ABSOLUTE
245
+    Lib\\Timer_Systick.c                     0x00000000   Number         0  timer_systick.o ABSOLUTE
246
+    Lib\\clock.c                             0x00000000   Number         0  clock.o ABSOLUTE
247
+    Lib\clock.c                              0x00000000   Number         0  clock.o ABSOLUTE
248
+    Lib\libcos.asm                           0x00000000   Number         0  libcos.o ABSOLUTE
249
+    Src\Fichiers_DFT\DFT.s                   0x00000000   Number         0  dft.o ABSOLUTE
250
+    Src\Fichiers_DFT\TabSinCos.asm           0x00000000   Number         0  tabsincos.o ABSOLUTE
251
+    Src\Fichiers_Son\Son.s                   0x00000000   Number         0  son.o ABSOLUTE
252
+    Src\Fichiers_Son\bruitverre.asm          0x00000000   Number         0  bruitverre.o ABSOLUTE
253
+    Src\\principal.c                         0x00000000   Number         0  principal.o ABSOLUTE
254
+    Src\principal.c                          0x00000000   Number         0  principal.o ABSOLUTE
255
+    Src\startup-rvds.s                       0x00000000   Number         0  startup-rvds.o ABSOLUTE
256
+    dc.s                                     0x00000000   Number         0  dc.o ABSOLUTE
257
+    handlers.s                               0x00000000   Number         0  handlers.o ABSOLUTE
258
+    init.s                                   0x00000000   Number         0  init.o ABSOLUTE
259
+    RESET                                    0x08000000   Section      236  startup-rvds.o(RESET)
260
+    .ARM.Collect$$$$00000000                 0x080000ec   Section        0  entry.o(.ARM.Collect$$$$00000000)
261
+    .ARM.Collect$$$$00000001                 0x080000ec   Section        4  entry2.o(.ARM.Collect$$$$00000001)
262
+    .ARM.Collect$$$$00000004                 0x080000f0   Section        4  entry5.o(.ARM.Collect$$$$00000004)
263
+    .ARM.Collect$$$$00000008                 0x080000f4   Section        0  entry7b.o(.ARM.Collect$$$$00000008)
264
+    .ARM.Collect$$$$0000000A                 0x080000f4   Section        0  entry8b.o(.ARM.Collect$$$$0000000A)
265
+    .ARM.Collect$$$$0000000B                 0x080000f4   Section        8  entry9a.o(.ARM.Collect$$$$0000000B)
266
+    .ARM.Collect$$$$0000000D                 0x080000fc   Section        0  entry10a.o(.ARM.Collect$$$$0000000D)
267
+    .ARM.Collect$$$$0000000F                 0x080000fc   Section        0  entry11a.o(.ARM.Collect$$$$0000000F)
268
+    .ARM.Collect$$$$00002712                 0x080000fc   Section        4  entry2.o(.ARM.Collect$$$$00002712)
269
+    __lit__00000000                          0x080000fc   Data           4  entry2.o(.ARM.Collect$$$$00002712)
270
+    .text                                    0x08000100   Section       76  startup-rvds.o(.text)
271
+    .text                                    0x0800014c   Section       36  init.o(.text)
272
+    .text                                    0x08000170   Section        0  __dczerorl2.o(.text)
273
+    i.Active_IT_Debordement_Timer            0x080001d0   Section        0  timer_1234.o(i.Active_IT_Debordement_Timer)
274
+    i.CLOCK_Configure                        0x080002b4   Section        0  clock.o(i.CLOCK_Configure)
275
+    i.CLOCK_GetADCCLK                        0x08000328   Section        0  clock.o(i.CLOCK_GetADCCLK)
276
+    i.CLOCK_GetHCLK                          0x08000330   Section        0  clock.o(i.CLOCK_GetHCLK)
277
+    i.CLOCK_GetTIMCLK                        0x08000338   Section        0  clock.o(i.CLOCK_GetTIMCLK)
278
+    i.CLOCK_HPRECompute                      0x0800035c   Section        0  clock.o(i.CLOCK_HPRECompute)
279
+    CLOCK_HPRECompute                        0x0800035d   Thumb Code   116  clock.o(i.CLOCK_HPRECompute)
280
+    i.GPIO_Configure                         0x080003d0   Section        0  gpio.o(i.GPIO_Configure)
281
+    i.Init_ADC1_DMA1                         0x080004d8   Section        0  adc_fake.o(i.Init_ADC1_DMA1)
282
+    i.Init_Conversion_On_Trig_Timer_ff       0x08000504   Section        0  adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff)
283
+    i.Init_TimingADC_ActiveADC_ff            0x0800057c   Section        0  adc_fake.o(i.Init_TimingADC_ActiveADC_ff)
284
+    i.PWM_Init_ff                            0x08000668   Section        0  timer_1234.o(i.PWM_Init_ff)
285
+    i.Single_Channel_ADC                     0x08000714   Section        0  adc_fake.o(i.Single_Channel_ADC)
286
+    i.Start_DMA1                             0x08000718   Section        0  adc_fake.o(i.Start_DMA1)
287
+    i.SysTick_Handler                        0x08000760   Section        0  timer_systick.o(i.SysTick_Handler)
288
+    i.Systick_Period_ff                      0x0800076c   Section        0  timer_systick.o(i.Systick_Period_ff)
289
+    i.Systick_Prio_IT                        0x08000790   Section        0  timer_systick.o(i.Systick_Prio_IT)
290
+    i.TIM1_CC_IRQHandler                     0x080007a4   Section        0  timer_1234.o(i.TIM1_CC_IRQHandler)
291
+    i.TIM1_UP_IRQHandler                     0x080008b0   Section        0  timer_1234.o(i.TIM1_UP_IRQHandler)
292
+    i.TIM2_IRQHandler                        0x080008c8   Section        0  timer_1234.o(i.TIM2_IRQHandler)
293
+    i.TIM3_IRQHandler                        0x080009d8   Section        0  timer_1234.o(i.TIM3_IRQHandler)
294
+    i.TIM4_IRQHandler                        0x08000b04   Section        0  timer_1234.o(i.TIM4_IRQHandler)
295
+    i.Timer_1234_Init_ff                     0x08000c30   Section        0  timer_1234.o(i.Timer_1234_Init_ff)
296
+    i.Wait_On_End_Of_DMA1                    0x08000cac   Section        0  adc_fake.o(i.Wait_On_End_Of_DMA1)
297
+    i.__scatterload_copy                     0x08000df8   Section       14  handlers.o(i.__scatterload_copy)
298
+    i.__scatterload_null                     0x08000e06   Section        2  handlers.o(i.__scatterload_null)
299
+    i.__scatterload_zeroinit                 0x08000e08   Section       14  handlers.o(i.__scatterload_zeroinit)
300
+    i.fake_timer_callback                    0x08000e18   Section        0  adc_fake.o(i.fake_timer_callback)
301
+    i.main                                   0x08000e34   Section        0  principal.o(i.main)
302
+    i.sys_callback                           0x08000f48   Section        0  principal.o(i.sys_callback)
303
+    moncode                                  0x08001080   Section       68  son.o(moncode)
304
+    FakeTab                                  0x080010c4   Section      256  libcos.o(FakeTab)
305
+    SecSon                                   0x080011e4   Section    11032  bruitverre.o(SecSon)
306
+    moncode                                  0x20000000   Section      108  dft.o(moncode)
307
+    calculReouIm                             0x20000001   Thumb Code    62  dft.o(moncode)
308
+    .data                                    0x2000006c   Section      160  timer_1234.o(.data)
309
+    Ptr_TIM1                                 0x2000007c   Data           4  timer_1234.o(.data)
310
+    Ptr_TIM2                                 0x20000080   Data           4  timer_1234.o(.data)
311
+    Ptr_TIM3                                 0x20000084   Data           4  timer_1234.o(.data)
312
+    Ptr_TIM4                                 0x20000088   Data           4  timer_1234.o(.data)
313
+    Ptr_TIM1_Voie1                           0x2000008c   Data           4  timer_1234.o(.data)
314
+    Ptr_TIM1_Voie2                           0x20000090   Data           4  timer_1234.o(.data)
315
+    Ptr_TIM1_Voie3                           0x20000094   Data           4  timer_1234.o(.data)
316
+    Ptr_TIM1_Voie4                           0x20000098   Data           4  timer_1234.o(.data)
317
+    Ptr_TIM2_Voie1                           0x2000009c   Data           4  timer_1234.o(.data)
318
+    Ptr_TIM2_Voie2                           0x200000a0   Data           4  timer_1234.o(.data)
319
+    Ptr_TIM2_Voie3                           0x200000a4   Data           4  timer_1234.o(.data)
320
+    Ptr_TIM2_Voie4                           0x200000a8   Data           4  timer_1234.o(.data)
321
+    Ptr_TIM3_Voie1                           0x200000ac   Data           4  timer_1234.o(.data)
322
+    Ptr_TIM3_Voie2                           0x200000b0   Data           4  timer_1234.o(.data)
323
+    Ptr_TIM3_Voie3                           0x200000b4   Data           4  timer_1234.o(.data)
324
+    Ptr_TIM3_Voie4                           0x200000b8   Data           4  timer_1234.o(.data)
325
+    Ptr_TIM4_Voie1                           0x200000bc   Data           4  timer_1234.o(.data)
326
+    Ptr_TIM4_Voie2                           0x200000c0   Data           4  timer_1234.o(.data)
327
+    Ptr_TIM4_Voie3                           0x200000c4   Data           4  timer_1234.o(.data)
328
+    Ptr_TIM4_Voie4                           0x200000c8   Data           4  timer_1234.o(.data)
329
+    Duree_Pulse_T1                           0x200000cc   Data           8  timer_1234.o(.data)
330
+    Duree_Pulse_T2                           0x200000d4   Data           8  timer_1234.o(.data)
331
+    Duree_Pulse_T3                           0x200000dc   Data           8  timer_1234.o(.data)
332
+    Duree_Pulse_T4                           0x200000e4   Data           8  timer_1234.o(.data)
333
+    Date_T1                                  0x200000ec   Data           8  timer_1234.o(.data)
334
+    Date_T2                                  0x200000f4   Data           8  timer_1234.o(.data)
335
+    Date_T3                                  0x200000fc   Data           8  timer_1234.o(.data)
336
+    Date_T4                                  0x20000104   Data           8  timer_1234.o(.data)
337
+    .data                                    0x2000010c   Section        4  timer_systick.o(.data)
338
+    Ptr_Systick                              0x2000010c   Data           4  timer_systick.o(.data)
339
+    Trigo                                    0x20000110   Section      256  tabsincos.o(Trigo)
340
+    .bss                                     0x20000210   Section      452  principal.o(.bss)
341
+    .bss                                     0x200003d4   Section       84  adc_fake.o(.bss)
342
+    F                                        0x200003d4   Data          84  adc_fake.o(.bss)
343
+    STACK                                    0x20000428   Section     1024  startup-rvds.o(STACK)
344
+
345
+    Global Symbols
346
+
347
+    Symbol Name                              Value     Ov Type        Size  Object(Section)
348
+
349
+    BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$EBA8$MICROLIB$REQ8$EABIv2 0x00000000   Number         0  anon$$obj.o ABSOLUTE
350
+    __ARM_use_no_argv                        0x00000000   Number         0  principal.o ABSOLUTE
351
+    __cpp_initialize__aeabi_                  - Undefined Weak Reference
352
+    __cxa_finalize                            - Undefined Weak Reference
353
+    _clock_init                               - Undefined Weak Reference
354
+    _microlib_exit                            - Undefined Weak Reference
355
+    __Vectors_Size                           0x000000ec   Number         0  startup-rvds.o ABSOLUTE
356
+    __Vectors                                0x08000000   Data           4  startup-rvds.o(RESET)
357
+    __Vectors_End                            0x080000ec   Data           0  startup-rvds.o(RESET)
358
+    __main                                   0x080000ed   Thumb Code     0  entry.o(.ARM.Collect$$$$00000000)
359
+    _main_stk                                0x080000ed   Thumb Code     0  entry2.o(.ARM.Collect$$$$00000001)
360
+    _main_scatterload                        0x080000f1   Thumb Code     0  entry5.o(.ARM.Collect$$$$00000004)
361
+    __main_after_scatterload                 0x080000f5   Thumb Code     0  entry5.o(.ARM.Collect$$$$00000004)
362
+    _main_clock                              0x080000f5   Thumb Code     0  entry7b.o(.ARM.Collect$$$$00000008)
363
+    _main_cpp_init                           0x080000f5   Thumb Code     0  entry8b.o(.ARM.Collect$$$$0000000A)
364
+    _main_init                               0x080000f5   Thumb Code     0  entry9a.o(.ARM.Collect$$$$0000000B)
365
+    __rt_final_cpp                           0x080000fd   Thumb Code     0  entry10a.o(.ARM.Collect$$$$0000000D)
366
+    __rt_final_exit                          0x080000fd   Thumb Code     0  entry11a.o(.ARM.Collect$$$$0000000F)
367
+    Reset_Handler                            0x08000101   Thumb Code    34  startup-rvds.o(.text)
368
+    SystemInit                               0x08000123   Thumb Code     2  startup-rvds.o(.text)
369
+    NMI_Handler                              0x08000125   Thumb Code     2  startup-rvds.o(.text)
370
+    HardFault_Handler                        0x08000127   Thumb Code     2  startup-rvds.o(.text)
371
+    MemManage_Handler                        0x08000129   Thumb Code     2  startup-rvds.o(.text)
372
+    BusFault_Handler                         0x0800012b   Thumb Code     2  startup-rvds.o(.text)
373
+    UsageFault_Handler                       0x0800012d   Thumb Code     2  startup-rvds.o(.text)
374
+    SVC_Handler                              0x0800012f   Thumb Code     2  startup-rvds.o(.text)
375
+    DebugMon_Handler                         0x08000131   Thumb Code     2  startup-rvds.o(.text)
376
+    PendSV_Handler                           0x08000133   Thumb Code     2  startup-rvds.o(.text)
377
+    ADC1_2_IRQHandler                        0x08000137   Thumb Code     0  startup-rvds.o(.text)
378
+    CAN1_RX1_IRQHandler                      0x08000137   Thumb Code     0  startup-rvds.o(.text)
379
+    CAN1_SCE_IRQHandler                      0x08000137   Thumb Code     0  startup-rvds.o(.text)
380
+    DMA1_Channel1_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
381
+    DMA1_Channel2_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
382
+    DMA1_Channel3_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
383
+    DMA1_Channel4_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
384
+    DMA1_Channel5_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
385
+    DMA1_Channel6_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
386
+    DMA1_Channel7_IRQHandler                 0x08000137   Thumb Code     0  startup-rvds.o(.text)
387
+    EXTI0_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
388
+    EXTI15_10_IRQHandler                     0x08000137   Thumb Code     0  startup-rvds.o(.text)
389
+    EXTI1_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
390
+    EXTI2_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
391
+    EXTI3_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
392
+    EXTI4_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
393
+    EXTI9_5_IRQHandler                       0x08000137   Thumb Code     0  startup-rvds.o(.text)
394
+    FLASH_IRQHandler                         0x08000137   Thumb Code     0  startup-rvds.o(.text)
395
+    I2C1_ER_IRQHandler                       0x08000137   Thumb Code     0  startup-rvds.o(.text)
396
+    I2C1_EV_IRQHandler                       0x08000137   Thumb Code     0  startup-rvds.o(.text)
397
+    I2C2_ER_IRQHandler                       0x08000137   Thumb Code     0  startup-rvds.o(.text)
398
+    I2C2_EV_IRQHandler                       0x08000137   Thumb Code     0  startup-rvds.o(.text)
399
+    PVD_IRQHandler                           0x08000137   Thumb Code     0  startup-rvds.o(.text)
400
+    RCC_IRQHandler                           0x08000137   Thumb Code     0  startup-rvds.o(.text)
401
+    RTCAlarm_IRQHandler                      0x08000137   Thumb Code     0  startup-rvds.o(.text)
402
+    RTC_IRQHandler                           0x08000137   Thumb Code     0  startup-rvds.o(.text)
403
+    SPI1_IRQHandler                          0x08000137   Thumb Code     0  startup-rvds.o(.text)
404
+    SPI2_IRQHandler                          0x08000137   Thumb Code     0  startup-rvds.o(.text)
405
+    TAMPER_IRQHandler                        0x08000137   Thumb Code     0  startup-rvds.o(.text)
406
+    TIM1_BRK_IRQHandler                      0x08000137   Thumb Code     0  startup-rvds.o(.text)
407
+    TIM1_TRG_COM_IRQHandler                  0x08000137   Thumb Code     0  startup-rvds.o(.text)
408
+    USART1_IRQHandler                        0x08000137   Thumb Code     0  startup-rvds.o(.text)
409
+    USART2_IRQHandler                        0x08000137   Thumb Code     0  startup-rvds.o(.text)
410
+    USART3_IRQHandler                        0x08000137   Thumb Code     0  startup-rvds.o(.text)
411
+    USBWakeUp_IRQHandler                     0x08000137   Thumb Code     0  startup-rvds.o(.text)
412
+    USB_HP_CAN1_TX_IRQHandler                0x08000137   Thumb Code     0  startup-rvds.o(.text)
413
+    USB_LP_CAN1_RX0_IRQHandler               0x08000137   Thumb Code     0  startup-rvds.o(.text)
414
+    WWDG_IRQHandler                          0x08000137   Thumb Code     0  startup-rvds.o(.text)
415
+    __scatterload                            0x0800014d   Thumb Code    28  init.o(.text)
416
+    __scatterload_rt2                        0x0800014d   Thumb Code     0  init.o(.text)
417
+    __decompress                             0x08000171   Thumb Code     0  __dczerorl2.o(.text)
418
+    __decompress1                            0x08000171   Thumb Code    86  __dczerorl2.o(.text)
419
+    Long Thumb to Thumb Veneer to CalculM    0x080001c7   Thumb Code    10  anon$$obj.o(Veneer$$Code)
420
+    Active_IT_Debordement_Timer              0x080001d1   Thumb Code   204  timer_1234.o(i.Active_IT_Debordement_Timer)
421
+    CLOCK_Configure                          0x080002b5   Thumb Code   104  clock.o(i.CLOCK_Configure)
422
+    CLOCK_GetADCCLK                          0x08000329   Thumb Code     4  clock.o(i.CLOCK_GetADCCLK)
423
+    CLOCK_GetHCLK                            0x08000331   Thumb Code     4  clock.o(i.CLOCK_GetHCLK)
424
+    CLOCK_GetTIMCLK                          0x08000339   Thumb Code    22  clock.o(i.CLOCK_GetTIMCLK)
425
+    GPIO_Configure                           0x080003d1   Thumb Code   240  gpio.o(i.GPIO_Configure)
426
+    Init_ADC1_DMA1                           0x080004d9   Thumb Code    38  adc_fake.o(i.Init_ADC1_DMA1)
427
+    Init_Conversion_On_Trig_Timer_ff         0x08000505   Thumb Code   104  adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff)
428
+    Init_TimingADC_ActiveADC_ff              0x0800057d   Thumb Code   230  adc_fake.o(i.Init_TimingADC_ActiveADC_ff)
429
+    PWM_Init_ff                              0x08000669   Thumb Code   168  timer_1234.o(i.PWM_Init_ff)
430
+    Single_Channel_ADC                       0x08000715   Thumb Code     2  adc_fake.o(i.Single_Channel_ADC)
431
+    Start_DMA1                               0x08000719   Thumb Code    66  adc_fake.o(i.Start_DMA1)
432
+    SysTick_Handler                          0x08000761   Thumb Code     6  timer_systick.o(i.SysTick_Handler)
433
+    Systick_Period_ff                        0x0800076d   Thumb Code    34  timer_systick.o(i.Systick_Period_ff)
434
+    Systick_Prio_IT                          0x08000791   Thumb Code    12  timer_systick.o(i.Systick_Prio_IT)
435
+    TIM1_CC_IRQHandler                       0x080007a5   Thumb Code   240  timer_1234.o(i.TIM1_CC_IRQHandler)
436
+    TIM1_UP_IRQHandler                       0x080008b1   Thumb Code    16  timer_1234.o(i.TIM1_UP_IRQHandler)
437
+    TIM2_IRQHandler                          0x080008c9   Thumb Code   266  timer_1234.o(i.TIM2_IRQHandler)
438
+    TIM3_IRQHandler                          0x080009d9   Thumb Code   272  timer_1234.o(i.TIM3_IRQHandler)
439
+    TIM4_IRQHandler                          0x08000b05   Thumb Code   272  timer_1234.o(i.TIM4_IRQHandler)
440
+    Timer_1234_Init_ff                       0x08000c31   Thumb Code   106  timer_1234.o(i.Timer_1234_Init_ff)
441
+    Wait_On_End_Of_DMA1                      0x08000cad   Thumb Code   320  adc_fake.o(i.Wait_On_End_Of_DMA1)
442
+    __scatterload_copy                       0x08000df9   Thumb Code    14  handlers.o(i.__scatterload_copy)
443
+    __scatterload_null                       0x08000e07   Thumb Code     2  handlers.o(i.__scatterload_null)
444
+    __scatterload_zeroinit                   0x08000e09   Thumb Code    14  handlers.o(i.__scatterload_zeroinit)
445
+    fake_timer_callback                      0x08000e19   Thumb Code    22  adc_fake.o(i.fake_timer_callback)
446
+    main                                     0x08000e35   Thumb Code   224  principal.o(i.main)
447
+    sys_callback                             0x08000f49   Thumb Code   280  principal.o(i.sys_callback)
448
+    timer_callback                           0x08001081   Thumb Code    60  son.o(moncode)
449
+    LibCos                                   0x080010c4   Data           0  libcos.o(FakeTab)
450
+    LibNoise                                 0x08001144   Data           0  libcos.o(FakeTab)
451
+    Region$$Table$$Base                      0x080011c4   Number         0  anon$$obj.o(Region$$Table)
452
+    LongueurSon                              0x080011e4   Data           4  bruitverre.o(SecSon)
453
+    Region$$Table$$Limit                     0x080011e4   Number         0  anon$$obj.o(Region$$Table)
454
+    PeriodeSonMicroSec                       0x080011e8   Data           4  bruitverre.o(SecSon)
455
+    Son                                      0x080011ec   Data           0  bruitverre.o(SecSon)
456
+    CalculM                                  0x2000003f   Thumb Code    38  dft.o(moncode)
457
+    Enable_Fct_IT_Compare_Match_TIM1_Voie1   0x2000006c   Data           1  timer_1234.o(.data)
458
+    Enable_Fct_IT_Compare_Match_TIM1_Voie2   0x2000006d   Data           1  timer_1234.o(.data)
459
+    Enable_Fct_IT_Compare_Match_TIM1_Voie3   0x2000006e   Data           1  timer_1234.o(.data)
460
+    Enable_Fct_IT_Compare_Match_TIM1_Voie4   0x2000006f   Data           1  timer_1234.o(.data)
461
+    Enable_Fct_IT_Compare_Match_TIM2_Voie1   0x20000070   Data           1  timer_1234.o(.data)
462
+    Enable_Fct_IT_Compare_Match_TIM2_Voie2   0x20000071   Data           1  timer_1234.o(.data)
463
+    Enable_Fct_IT_Compare_Match_TIM2_Voie3   0x20000072   Data           1  timer_1234.o(.data)
464
+    Enable_Fct_IT_Compare_Match_TIM2_Voie4   0x20000073   Data           1  timer_1234.o(.data)
465
+    Enable_Fct_IT_Compare_Match_TIM3_Voie1   0x20000074   Data           1  timer_1234.o(.data)
466
+    Enable_Fct_IT_Compare_Match_TIM3_Voie2   0x20000075   Data           1  timer_1234.o(.data)
467
+    Enable_Fct_IT_Compare_Match_TIM3_Voie3   0x20000076   Data           1  timer_1234.o(.data)
468
+    Enable_Fct_IT_Compare_Match_TIM3_Voie4   0x20000077   Data           1  timer_1234.o(.data)
469
+    Enable_Fct_IT_Compare_Match_TIM4_Voie1   0x20000078   Data           1  timer_1234.o(.data)
470
+    Enable_Fct_IT_Compare_Match_TIM4_Voie2   0x20000079   Data           1  timer_1234.o(.data)
471
+    Enable_Fct_IT_Compare_Match_TIM4_Voie3   0x2000007a   Data           1  timer_1234.o(.data)
472
+    Enable_Fct_IT_Compare_Match_TIM4_Voie4   0x2000007b   Data           1  timer_1234.o(.data)
473
+    TabCos                                   0x20000110   Data           0  tabsincos.o(Trigo)
474
+    TabSin                                   0x20000190   Data           0  tabsincos.o(Trigo)
475
+    etat                                     0x20000210   Data          20  principal.o(.bss)
476
+    dma_buf                                  0x20000224   Data         128  principal.o(.bss)
477
+    compteur                                 0x200002a4   Data          24  principal.o(.bss)
478
+    point                                    0x200002bc   Data          24  principal.o(.bss)
479
+    M2                                       0x200002d4   Data         256  principal.o(.bss)
480
+    __initial_sp                             0x20000828   Data           0  startup-rvds.o(STACK)
481
+
482
+
483
+
484
+==============================================================================
485
+
486
+Memory Map of the image
487
+
488
+  Image Entry point : 0x080000ed
489
+
490
+  Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00003f0c, Max: 0x00020000, ABSOLUTE, COMPRESSED[0x00003df4])
491
+
492
+    Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00003cfc, Max: 0x00020000, ABSOLUTE)
493
+
494
+    Exec Addr    Load Addr    Size         Type   Attr      Idx    E Section Name        Object
495
+
496
+    0x08000000   0x08000000   0x000000ec   Data   RO           71    RESET               startup-rvds.o
497
+    0x080000ec   0x080000ec   0x00000000   Code   RO          189  * .ARM.Collect$$$$00000000  mc_w.l(entry.o)
498
+    0x080000ec   0x080000ec   0x00000004   Code   RO          216    .ARM.Collect$$$$00000001  mc_w.l(entry2.o)
499
+    0x080000f0   0x080000f0   0x00000004   Code   RO          219    .ARM.Collect$$$$00000004  mc_w.l(entry5.o)
500
+    0x080000f4   0x080000f4   0x00000000   Code   RO          221    .ARM.Collect$$$$00000008  mc_w.l(entry7b.o)
501
+    0x080000f4   0x080000f4   0x00000000   Code   RO          223    .ARM.Collect$$$$0000000A  mc_w.l(entry8b.o)
502
+    0x080000f4   0x080000f4   0x00000008   Code   RO          224    .ARM.Collect$$$$0000000B  mc_w.l(entry9a.o)
503
+    0x080000fc   0x080000fc   0x00000000   Code   RO          226    .ARM.Collect$$$$0000000D  mc_w.l(entry10a.o)
504
+    0x080000fc   0x080000fc   0x00000000   Code   RO          228    .ARM.Collect$$$$0000000F  mc_w.l(entry11a.o)
505
+    0x080000fc   0x080000fc   0x00000004   Code   RO          217    .ARM.Collect$$$$00002712  mc_w.l(entry2.o)
506
+    0x08000100   0x08000100   0x0000004c   Code   RO           72    .text               startup-rvds.o
507
+    0x0800014c   0x0800014c   0x00000024   Code   RO          239    .text               mc_w.l(init.o)
508
+    0x08000170   0x08000170   0x00000056   Code   RO          251    .text               mc_w.l(__dczerorl2.o)
509
+    0x080001c6   0x080001c6   0x0000000a   Ven    RO          253    Veneer$$Code        anon$$obj.o
510
+    0x080001d0   0x080001d0   0x000000e4   Code   RO          119    i.Active_IT_Debordement_Timer  gfssp72.lib(timer_1234.o)
511
+    0x080002b4   0x080002b4   0x00000074   Code   RO           90    i.CLOCK_Configure   gfssp72.lib(clock.o)
512
+    0x08000328   0x08000328   0x00000008   Code   RO           91    i.CLOCK_GetADCCLK   gfssp72.lib(clock.o)
513
+    0x08000330   0x08000330   0x00000008   Code   RO           92    i.CLOCK_GetHCLK     gfssp72.lib(clock.o)
514
+    0x08000338   0x08000338   0x00000024   Code   RO           95    i.CLOCK_GetTIMCLK   gfssp72.lib(clock.o)
515
+    0x0800035c   0x0800035c   0x00000074   Code   RO           96    i.CLOCK_HPRECompute  gfssp72.lib(clock.o)
516
+    0x080003d0   0x080003d0   0x00000108   Code   RO          110    i.GPIO_Configure    gfssp72.lib(gpio.o)
517
+    0x080004d8   0x080004d8   0x0000002c   Code   RO          170    i.Init_ADC1_DMA1    gfssp72.lib(adc_fake.o)
518
+    0x08000504   0x08000504   0x00000078   Code   RO          171    i.Init_Conversion_On_Trig_Timer_ff  gfssp72.lib(adc_fake.o)
519
+    0x0800057c   0x0800057c   0x000000ec   Code   RO          172    i.Init_TimingADC_ActiveADC_ff  gfssp72.lib(adc_fake.o)
520
+    0x08000668   0x08000668   0x000000ac   Code   RO          124    i.PWM_Init_ff       gfssp72.lib(timer_1234.o)
521
+    0x08000714   0x08000714   0x00000002   Code   RO          173    i.Single_Channel_ADC  gfssp72.lib(adc_fake.o)
522
+    0x08000716   0x08000716   0x00000002   PAD
523
+    0x08000718   0x08000718   0x00000048   Code   RO          174    i.Start_DMA1        gfssp72.lib(adc_fake.o)
524
+    0x08000760   0x08000760   0x0000000c   Code   RO          155    i.SysTick_Handler   gfssp72.lib(timer_systick.o)
525
+    0x0800076c   0x0800076c   0x00000022   Code   RO          157    i.Systick_Period_ff  gfssp72.lib(timer_systick.o)
526
+    0x0800078e   0x0800078e   0x00000002   PAD
527
+    0x08000790   0x08000790   0x00000014   Code   RO          158    i.Systick_Prio_IT   gfssp72.lib(timer_systick.o)
528
+    0x080007a4   0x080007a4   0x0000010c   Code   RO          125    i.TIM1_CC_IRQHandler  gfssp72.lib(timer_1234.o)
529
+    0x080008b0   0x080008b0   0x00000018   Code   RO          126    i.TIM1_UP_IRQHandler  gfssp72.lib(timer_1234.o)
530
+    0x080008c8   0x080008c8   0x00000110   Code   RO          127    i.TIM2_IRQHandler   gfssp72.lib(timer_1234.o)
531
+    0x080009d8   0x080009d8   0x0000012c   Code   RO          128    i.TIM3_IRQHandler   gfssp72.lib(timer_1234.o)
532
+    0x08000b04   0x08000b04   0x0000012c   Code   RO          129    i.TIM4_IRQHandler   gfssp72.lib(timer_1234.o)
533
+    0x08000c30   0x08000c30   0x0000007c   Code   RO          131    i.Timer_1234_Init_ff  gfssp72.lib(timer_1234.o)
534
+    0x08000cac   0x08000cac   0x0000014c   Code   RO          175    i.Wait_On_End_Of_DMA1  gfssp72.lib(adc_fake.o)
535
+    0x08000df8   0x08000df8   0x0000000e   Code   RO          245    i.__scatterload_copy  mc_w.l(handlers.o)
536
+    0x08000e06   0x08000e06   0x00000002   Code   RO          246    i.__scatterload_null  mc_w.l(handlers.o)
537
+    0x08000e08   0x08000e08   0x0000000e   Code   RO          247    i.__scatterload_zeroinit  mc_w.l(handlers.o)
538
+    0x08000e16   0x08000e16   0x00000002   PAD
539
+    0x08000e18   0x08000e18   0x0000001c   Code   RO          176    i.fake_timer_callback  gfssp72.lib(adc_fake.o)
540
+    0x08000e34   0x08000e34   0x00000114   Code   RO            4    i.main              principal.o
541
+    0x08000f48   0x08000f48   0x00000138   Code   RO            5    i.sys_callback      principal.o
542
+    0x08001080   0x08001080   0x00000044   Code   RO           83    moncode             son.o
543
+    0x080010c4   0x080010c4   0x00000100   Data   RO          188    FakeTab             gfssp72.lib(libcos.o)
544
+    0x080011c4   0x080011c4   0x00000020   Data   RO          243    Region$$Table       anon$$obj.o
545
+    0x080011e4   0x080011e4   0x00002b18   Data   RO           81    SecSon              bruitverre.o
546
+
547
+
548
+    Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08003cfc, Size: 0x00000828, Max: 0x00005000, ABSOLUTE, COMPRESSED[0x000000f8])
549
+
550
+    Exec Addr    Load Addr    Size         Type   Attr      Idx    E Section Name        Object
551
+
552
+    0x20000000   COMPRESSED   0x0000006c   Code   RW           76    moncode             dft.o
553
+    0x2000006c   COMPRESSED   0x000000a0   Data   RW          133    .data               gfssp72.lib(timer_1234.o)
554
+    0x2000010c   COMPRESSED   0x00000004   Data   RW          159    .data               gfssp72.lib(timer_systick.o)
555
+    0x20000110   COMPRESSED   0x00000100   Data   RW           80    Trigo               tabsincos.o
556
+    0x20000210        -       0x000001c4   Zero   RW            6    .bss                principal.o
557
+    0x200003d4        -       0x00000054   Zero   RW          177    .bss                gfssp72.lib(adc_fake.o)
558
+    0x20000428        -       0x00000400   Zero   RW           69    STACK               startup-rvds.o
559
+
560
+
561
+==============================================================================
562
+
563
+Image component sizes
564
+
565
+
566
+      Code (inc. data)   RO Data    RW Data    ZI Data      Debug   Object Name
567
+
568
+         0          0      11032          0          0          0   bruitverre.o
569
+       108          8          0          0          0        384   dft.o
570
+       588        100          0          0        452       3804   principal.o
571
+        68          8          0          0          0        340   son.o
572
+        76         20        236          0       1024        788   startup-rvds.o
573
+         0          0          0        256          0          0   tabsincos.o
574
+
575
+    ----------------------------------------------------------------------
576
+       850        136      11300        256       1476       5316   Object Totals
577
+        10          0         32          0          0          0   (incl. Generated)
578
+         0          0          0          0          0          0   (incl. Padding)
579
+
580
+    ----------------------------------------------------------------------
581
+
582
+      Code (inc. data)   RO Data    RW Data    ZI Data      Debug   Library Member Name
583
+
584
+       834         58          0          0         84        528   adc_fake.o
585
+       284         34          0          0          0        352   clock.o
586
+       264         24          0          0          0         84   gpio.o
587
+         0          0        256          0          0          0   libcos.o
588
+      1688        144          0        160          0        672   timer_1234.o
589
+        66         14          0          4          0        204   timer_systick.o
590
+        86          0          0          0          0          0   __dczerorl2.o
591
+         0          0          0          0          0          0   entry.o
592
+         0          0          0          0          0          0   entry10a.o
593
+         0          0          0          0          0          0   entry11a.o
594
+         8          4          0          0          0          0   entry2.o
595
+         4          0          0          0          0          0   entry5.o
596
+         0          0          0          0          0          0   entry7b.o
597
+         0          0          0          0          0          0   entry8b.o
598
+         8          4          0          0          0          0   entry9a.o
599
+        30          0          0          0          0          0   handlers.o
600
+        36          8          0          0          0         68   init.o
601
+
602
+    ----------------------------------------------------------------------
603
+      3314        290        256        164         84       1908   Library Totals
604
+         6          0          0          0          0          0   (incl. Padding)
605
+
606
+    ----------------------------------------------------------------------
607
+
608
+      Code (inc. data)   RO Data    RW Data    ZI Data      Debug   Library Name
609
+
610
+      3136        274        256        164         84       1840   gfssp72.lib
611
+       172         16          0          0          0         68   mc_w.l
612
+
613
+    ----------------------------------------------------------------------
614
+      3314        290        256        164         84       1908   Library Totals
615
+
616
+    ----------------------------------------------------------------------
617
+
618
+==============================================================================
619
+
620
+
621
+      Code (inc. data)   RO Data    RW Data    ZI Data      Debug   
622
+
623
+      4164        426      11556        420       1560       6208   Grand Totals
624
+      4164        426      11556        248       1560       6208   ELF Image Totals (compressed)
625
+      4164        426      11556        248          0          0   ROM Totals
626
+
627
+==============================================================================
628
+
629
+    Total RO  Size (Code + RO Data)                15720 (  15.35kB)
630
+    Total RW  Size (RW Data + ZI Data)              1980 (   1.93kB)
631
+    Total ROM Size (Code + RO Data + RW Data)      15968 (  15.59kB)
632
+
633
+==============================================================================
634
+

+ 15
- 0
Obj_4/Obj/CHTI.sct View File

@@ -0,0 +1,15 @@
1
+; *************************************************************
2
+; *** Scatter-Loading Description File generated by uVision ***
3
+; *************************************************************
4
+
5
+LR_IROM1 0x08000000 0x00020000  {    ; load region size_region
6
+  ER_IROM1 0x08000000 0x00020000  {  ; load address = execution address
7
+   *.o (RESET, +First)
8
+   *(InRoot$$Sections)
9
+   .ANY (+RO)
10
+  }
11
+  RW_IRAM1 0x20000000 0x00005000  {  ; RW data
12
+   .ANY (+RW +ZI)
13
+  }
14
+}
15
+

BIN
Obj_4/Obj/principal.crf View File


+ 396
- 0
Obj_4/Project.uvoptx View File

@@ -0,0 +1,396 @@
1
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
2
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
3
+
4
+  <SchemaVersion>1.0</SchemaVersion>
5
+
6
+  <Header>### uVision Project, (C) Keil Software</Header>
7
+
8
+  <Extensions>
9
+    <cExt>*.c</cExt>
10
+    <aExt>*.s*; *.src; *.a*</aExt>
11
+    <oExt>*.obj; *.o</oExt>
12
+    <lExt>*.lib</lExt>
13
+    <tExt>*.txt; *.h; *.inc</tExt>
14
+    <pExt>*.plm</pExt>
15
+    <CppX>*.cpp</CppX>
16
+    <nMigrate>0</nMigrate>
17
+  </Extensions>
18
+
19
+  <DaveTm>
20
+    <dwLowDateTime>0</dwLowDateTime>
21
+    <dwHighDateTime>0</dwHighDateTime>
22
+  </DaveTm>
23
+
24
+  <Target>
25
+    <TargetName>Simu</TargetName>
26
+    <ToolsetNumber>0x4</ToolsetNumber>
27
+    <ToolsetName>ARM-ADS</ToolsetName>
28
+    <TargetOption>
29
+      <CLKADS>8000000</CLKADS>
30
+      <OPTTT>
31
+        <gFlags>1</gFlags>
32
+        <BeepAtEnd>1</BeepAtEnd>
33
+        <RunSim>0</RunSim>
34
+        <RunTarget>1</RunTarget>
35
+        <RunAbUc>0</RunAbUc>
36
+      </OPTTT>
37
+      <OPTHX>
38
+        <HexSelection>1</HexSelection>
39
+        <FlashByte>65535</FlashByte>
40
+        <HexRangeLowAddress>0</HexRangeLowAddress>
41
+        <HexRangeHighAddress>0</HexRangeHighAddress>
42
+        <HexOffset>0</HexOffset>
43
+      </OPTHX>
44
+      <OPTLEX>
45
+        <PageWidth>79</PageWidth>
46
+        <PageLength>66</PageLength>
47
+        <TabStop>8</TabStop>
48
+        <ListingPath></ListingPath>
49
+      </OPTLEX>
50
+      <ListingPage>
51
+        <CreateCListing>1</CreateCListing>
52
+        <CreateAListing>1</CreateAListing>
53
+        <CreateLListing>1</CreateLListing>
54
+        <CreateIListing>0</CreateIListing>
55
+        <AsmCond>1</AsmCond>
56
+        <AsmSymb>1</AsmSymb>
57
+        <AsmXref>0</AsmXref>
58
+        <CCond>1</CCond>
59
+        <CCode>0</CCode>
60
+        <CListInc>0</CListInc>
61
+        <CSymb>0</CSymb>
62
+        <LinkerCodeListing>0</LinkerCodeListing>
63
+      </ListingPage>
64
+      <OPTXL>
65
+        <LMap>1</LMap>
66
+        <LComments>1</LComments>
67
+        <LGenerateSymbols>1</LGenerateSymbols>
68
+        <LLibSym>1</LLibSym>
69
+        <LLines>1</LLines>
70
+        <LLocSym>1</LLocSym>
71
+        <LPubSym>1</LPubSym>
72
+        <LXref>0</LXref>
73
+        <LExpSel>0</LExpSel>
74
+      </OPTXL>
75
+      <OPTFL>
76
+        <tvExp>1</tvExp>
77
+        <tvExpOptDlg>0</tvExpOptDlg>
78
+        <IsCurrentTarget>1</IsCurrentTarget>
79
+      </OPTFL>
80
+      <CpuCode>18</CpuCode>
81
+      <DebugOpt>
82
+        <uSim>1</uSim>
83
+        <uTrg>0</uTrg>
84
+        <sLdApp>1</sLdApp>
85
+        <sGomain>1</sGomain>
86
+        <sRbreak>1</sRbreak>
87
+        <sRwatch>1</sRwatch>
88
+        <sRmem>1</sRmem>
89
+        <sRfunc>1</sRfunc>
90
+        <sRbox>1</sRbox>
91
+        <tLdApp>1</tLdApp>
92
+        <tGomain>1</tGomain>
93
+        <tRbreak>1</tRbreak>
94
+        <tRwatch>1</tRwatch>
95
+        <tRmem>1</tRmem>
96
+        <tRfunc>1</tRfunc>
97
+        <tRbox>1</tRbox>
98
+        <tRtrace>1</tRtrace>
99
+        <sRSysVw>1</sRSysVw>
100
+        <tRSysVw>1</tRSysVw>
101
+        <sRunDeb>0</sRunDeb>
102
+        <sLrtime>0</sLrtime>
103
+        <bEvRecOn>1</bEvRecOn>
104
+        <bSchkAxf>0</bSchkAxf>
105
+        <bTchkAxf>0</bTchkAxf>
106
+        <nTsel>5</nTsel>
107
+        <sDll></sDll>
108
+        <sDllPa></sDllPa>
109
+        <sDlgDll></sDlgDll>
110
+        <sDlgPa></sDlgPa>
111
+        <sIfile></sIfile>
112
+        <tDll></tDll>
113
+        <tDllPa></tDllPa>
114
+        <tDlgDll></tDlgDll>
115
+        <tDlgPa></tDlgPa>
116
+        <tIfile></tIfile>
117
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
118
+      </DebugOpt>
119
+      <TargetDriverDllRegistry>
120
+        <SetRegEntry>
121
+          <Number>0</Number>
122
+          <Key>DLGDARM</Key>
123
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=719,154,1140,581,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
124
+        </SetRegEntry>
125
+        <SetRegEntry>
126
+          <Number>0</Number>
127
+          <Key>ARMRTXEVENTFLAGS</Key>
128
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
129
+        </SetRegEntry>
130
+        <SetRegEntry>
131
+          <Number>0</Number>
132
+          <Key>DLGTARM</Key>
133
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
134
+        </SetRegEntry>
135
+        <SetRegEntry>
136
+          <Number>0</Number>
137
+          <Key>ARMDBGFLAGS</Key>
138
+          <Name>-T0</Name>
139
+        </SetRegEntry>
140
+        <SetRegEntry>
141
+          <Number>0</Number>
142
+          <Key>DLGUARM</Key>
143
+          <Name>(105=-1,-1,-1,-1,0)</Name>
144
+        </SetRegEntry>
145
+        <SetRegEntry>
146
+          <Number>0</Number>
147
+          <Key>UL2CM3</Key>
148
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
149
+        </SetRegEntry>
150
+        <SetRegEntry>
151
+          <Number>0</Number>
152
+          <Key>ST-LINKIII-KEIL_SWO</Key>
153
+          <Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
154
+        </SetRegEntry>
155
+      </TargetDriverDllRegistry>
156
+      <Breakpoint/>
157
+      <WatchWindow1>
158
+        <Ww>
159
+          <count>0</count>
160
+          <WinNumber>1</WinNumber>
161
+          <ItemText>point</ItemText>
162
+        </Ww>
163
+      </WatchWindow1>
164
+      <Tracepoint>
165
+        <THDelay>0</THDelay>
166
+      </Tracepoint>
167
+      <DebugFlag>
168
+        <trace>0</trace>
169
+        <periodic>1</periodic>
170
+        <aLwin>1</aLwin>
171
+        <aCover>0</aCover>
172
+        <aSer1>0</aSer1>
173
+        <aSer2>0</aSer2>
174
+        <aPa>0</aPa>
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+        <viewmode>1</viewmode>
176
+        <vrSel>0</vrSel>
177
+        <aSym>0</aSym>
178
+        <aTbox>0</aTbox>
179
+        <AscS1>0</AscS1>
180
+        <AscS2>0</AscS2>
181
+        <AscS3>0</AscS3>
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+        <aSer3>0</aSer3>
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+        <eProf>0</eProf>
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+        <aLa>1</aLa>
185
+        <aPa1>0</aPa1>
186
+        <AscS4>0</AscS4>
187
+        <aSer4>0</aSer4>
188
+        <StkLoc>0</StkLoc>
189
+        <TrcWin>0</TrcWin>
190
+        <newCpu>0</newCpu>
191
+        <uProt>0</uProt>
192
+      </DebugFlag>
193
+      <LintExecutable></LintExecutable>
194
+      <LintConfigFile></LintConfigFile>
195
+      <bLintAuto>0</bLintAuto>
196
+      <bAutoGenD>0</bAutoGenD>
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+      <LntExFlags>0</LntExFlags>
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+      <pMisraName></pMisraName>
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+      <pszMrule></pszMrule>
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+      <pSingCmds></pSingCmds>
201
+      <pMultCmds></pMultCmds>
202
+      <pMisraNamep></pMisraNamep>
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+      <pszMrulep></pszMrulep>
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+      <pSingCmdsp></pSingCmdsp>
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+      <pMultCmdsp></pMultCmdsp>
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+      <LogicAnalyzers>
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+        <Wi>
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+          <IntNumber>0</IntNumber>
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+          <FirstString>`TIM3_CCR3</FirstString>
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+          <SecondString>00008000000000000000000000000000000074400000000000000000000000000000000054494D335F4343523300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000001000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>1</IntNumber>
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+          <FirstString>`point[0]</FirstString>
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+          <SecondString>000000000000000000000000000000000000F03F00000000000000000000000000000000706F696E745B305D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000002000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>2</IntNumber>
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+          <FirstString>`point[1]</FirstString>
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+          <SecondString>FF0000000000000000000000000000000000004000000000000000000000000000000000706F696E745B315D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000003000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>3</IntNumber>
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+          <FirstString>`point[2]</FirstString>
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+          <SecondString>008000000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B325D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000004000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>4</IntNumber>
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+          <FirstString>`point[3]</FirstString>
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+          <SecondString>000080000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B335D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000005000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>5</IntNumber>
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+          <FirstString>`point[4]</FirstString>
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+          <SecondString>000000000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B345D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000006000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+        <Wi>
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+          <IntNumber>6</IntNumber>
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+          <FirstString>`point[5]</FirstString>
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+          <SecondString>FF0000000000000000000000000000000000084000000000000000000000000000000000706F696E745B355D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000007000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
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+        </Wi>
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+      </LogicAnalyzers>
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+      <DebugDescription>
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+        <Enable>1</Enable>
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+        <EnableLog>0</EnableLog>
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+        <Protocol>2</Protocol>
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+        <DbgClock>10000000</DbgClock>
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+      </DebugDescription>
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+    </TargetOption>
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+  </Target>
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+
252
+  <Group>
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+    <GroupName>Sources</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
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+      <GroupNumber>1</GroupNumber>
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+      <FileNumber>1</FileNumber>
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+      <FileType>1</FileType>
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+      <tvExp>1</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\principal.c</PathWithFileName>
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+      <FilenameWithoutPath>principal.c</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+  </Group>
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+
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+  <Group>
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+    <GroupName>Sys</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
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+      <GroupNumber>2</GroupNumber>
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+      <FileNumber>2</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
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+      <FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+  </Group>
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+
292
+  <Group>
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+    <GroupName>DFT</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
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+      <GroupNumber>3</GroupNumber>
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+      <FileNumber>3</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\Fichiers_DFT\DFT.s</PathWithFileName>
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+      <FilenameWithoutPath>DFT.s</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+    <File>
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+      <GroupNumber>3</GroupNumber>
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+      <FileNumber>4</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\Fichiers_DFT\TabSinCos.asm</PathWithFileName>
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+      <FilenameWithoutPath>TabSinCos.asm</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+  </Group>
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+
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+  <Group>
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+    <GroupName>Son</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
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+      <GroupNumber>4</GroupNumber>
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+      <FileNumber>5</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\Fichiers_Son\bruitverre.asm</PathWithFileName>
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+      <FilenameWithoutPath>bruitverre.asm</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+    <File>
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+      <GroupNumber>4</GroupNumber>
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+      <FileNumber>6</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\Fichiers_Son\Son.s</PathWithFileName>
350
+      <FilenameWithoutPath>Son.s</FilenameWithoutPath>
351
+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+  </Group>
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+
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+  <Group>
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+    <GroupName>Drivers</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
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+      <GroupNumber>5</GroupNumber>
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+      <FileNumber>7</FileNumber>
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+      <FileType>4</FileType>
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+      <tvExp>0</tvExp>
367
+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Librairie\GFSSP72\gfssp72.lib</PathWithFileName>
370
+      <FilenameWithoutPath>gfssp72.lib</FilenameWithoutPath>
371
+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+    <File>
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+      <GroupNumber>5</GroupNumber>
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+      <FileNumber>8</FileNumber>
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+      <FileType>5</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Librairie\etat\etat.inc</PathWithFileName>
382
+      <FilenameWithoutPath>etat.inc</FilenameWithoutPath>
383
+      <RteFlg>0</RteFlg>
384
+      <bShared>0</bShared>
385
+    </File>
386
+  </Group>
387
+
388
+  <Group>
389
+    <GroupName>::CMSIS</GroupName>
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+    <tvExp>0</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>1</RteFlg>
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+  </Group>
395
+
396
+</ProjectOpt>

+ 466
- 0
Obj_4/Project.uvprojx View File

@@ -0,0 +1,466 @@
1
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
2
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
3
+
4
+  <SchemaVersion>2.1</SchemaVersion>
5
+
6
+  <Header>### uVision Project, (C) Keil Software</Header>
7
+
8
+  <Targets>
9
+    <Target>
10
+      <TargetName>Simu</TargetName>
11
+      <ToolsetNumber>0x4</ToolsetNumber>
12
+      <ToolsetName>ARM-ADS</ToolsetName>
13
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
14
+      <uAC6>0</uAC6>
15
+      <TargetOption>
16
+        <TargetCommonOption>
17
+          <Device>STM32F103RB</Device>
18
+          <Vendor>STMicroelectronics</Vendor>
19
+          <PackID>Keil.STM32F1xx_DFP.2.2.0</PackID>
20
+          <PackURL>http://www.keil.com/pack/</PackURL>
21
+          <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
22
+          <FlashUtilSpec></FlashUtilSpec>
23
+          <StartupFile></StartupFile>
24
+          <FlashDriverDll></FlashDriverDll>
25
+          <DeviceId></DeviceId>
26
+          <RegisterFile></RegisterFile>
27
+          <MemoryEnv></MemoryEnv>
28
+          <Cmp></Cmp>
29
+          <Asm></Asm>
30
+          <Linker></Linker>
31
+          <OHString></OHString>
32
+          <InfinionOptionDll></InfinionOptionDll>
33
+          <SLE66CMisc></SLE66CMisc>
34
+          <SLE66AMisc></SLE66AMisc>
35
+          <SLE66LinkerMisc></SLE66LinkerMisc>
36
+          <SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
37
+          <bCustSvd>0</bCustSvd>
38
+          <UseEnv>0</UseEnv>
39
+          <BinPath></BinPath>
40
+          <IncludePath></IncludePath>
41
+          <LibPath></LibPath>
42
+          <RegisterFilePath></RegisterFilePath>
43
+          <DBRegisterFilePath></DBRegisterFilePath>
44
+          <TargetStatus>
45
+            <Error>0</Error>
46
+            <ExitCodeStop>0</ExitCodeStop>
47
+            <ButtonStop>0</ButtonStop>
48
+            <NotGenerated>0</NotGenerated>
49
+            <InvalidFlash>1</InvalidFlash>
50
+          </TargetStatus>
51
+          <OutputDirectory>.\Obj\</OutputDirectory>
52
+          <OutputName>CHTI</OutputName>
53
+          <CreateExecutable>1</CreateExecutable>
54
+          <CreateLib>0</CreateLib>
55
+          <CreateHexFile>1</CreateHexFile>
56
+          <DebugInformation>1</DebugInformation>
57
+          <BrowseInformation>1</BrowseInformation>
58
+          <ListingPath></ListingPath>
59
+          <HexFormatSelection>1</HexFormatSelection>
60
+          <Merge32K>0</Merge32K>
61
+          <CreateBatchFile>0</CreateBatchFile>
62
+          <BeforeCompile>
63
+            <RunUserProg1>0</RunUserProg1>
64
+            <RunUserProg2>0</RunUserProg2>
65
+            <UserProg1Name></UserProg1Name>
66
+            <UserProg2Name></UserProg2Name>
67
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
68
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
69
+            <nStopU1X>0</nStopU1X>
70
+            <nStopU2X>0</nStopU2X>
71
+          </BeforeCompile>
72
+          <BeforeMake>
73
+            <RunUserProg1>0</RunUserProg1>
74
+            <RunUserProg2>0</RunUserProg2>
75
+            <UserProg1Name></UserProg1Name>
76
+            <UserProg2Name></UserProg2Name>
77
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
78
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
79
+            <nStopB1X>0</nStopB1X>
80
+            <nStopB2X>0</nStopB2X>
81
+          </BeforeMake>
82
+          <AfterMake>
83
+            <RunUserProg1>0</RunUserProg1>
84
+            <RunUserProg2>0</RunUserProg2>
85
+            <UserProg1Name></UserProg1Name>
86
+            <UserProg2Name></UserProg2Name>
87
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
88
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
89
+            <nStopA1X>0</nStopA1X>
90
+            <nStopA2X>0</nStopA2X>
91
+          </AfterMake>
92
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
93
+          <SVCSIdString></SVCSIdString>
94
+        </TargetCommonOption>
95
+        <CommonProperty>
96
+          <UseCPPCompiler>0</UseCPPCompiler>
97
+          <RVCTCodeConst>0</RVCTCodeConst>
98
+          <RVCTZI>0</RVCTZI>
99
+          <RVCTOtherData>0</RVCTOtherData>
100
+          <ModuleSelection>0</ModuleSelection>
101
+          <IncludeInBuild>1</IncludeInBuild>
102
+          <AlwaysBuild>0</AlwaysBuild>
103
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
104
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
105
+          <PublicsOnly>0</PublicsOnly>
106
+          <StopOnExitCode>3</StopOnExitCode>
107
+          <CustomArgument></CustomArgument>
108
+          <IncludeLibraryModules></IncludeLibraryModules>
109
+          <ComprImg>0</ComprImg>
110
+        </CommonProperty>
111
+        <DllOption>
112
+          <SimDllName>SARMCM3.DLL</SimDllName>
113
+          <SimDllArguments>-REMAP</SimDllArguments>
114
+          <SimDlgDll>DARMSTM.DLL</SimDlgDll>
115
+          <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
116
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
117
+          <TargetDllArguments></TargetDllArguments>
118
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
119
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
120
+        </DllOption>
121
+        <DebugOption>
122
+          <OPTHX>
123
+            <HexSelection>1</HexSelection>
124
+            <HexRangeLowAddress>0</HexRangeLowAddress>
125
+            <HexRangeHighAddress>0</HexRangeHighAddress>
126
+            <HexOffset>0</HexOffset>
127
+            <Oh166RecLen>16</Oh166RecLen>
128
+          </OPTHX>
129
+        </DebugOption>
130
+        <Utilities>
131
+          <Flash1>
132
+            <UseTargetDll>1</UseTargetDll>
133
+            <UseExternalTool>0</UseExternalTool>
134
+            <RunIndependent>0</RunIndependent>
135
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
136
+            <Capability>1</Capability>
137
+            <DriverSelection>4100</DriverSelection>
138
+          </Flash1>
139
+          <bUseTDR>1</bUseTDR>
140
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
141
+          <Flash3>"" ()</Flash3>
142
+          <Flash4></Flash4>
143
+          <pFcarmOut></pFcarmOut>
144
+          <pFcarmGrp></pFcarmGrp>
145
+          <pFcArmRoot></pFcArmRoot>
146
+          <FcArmLst>0</FcArmLst>
147
+        </Utilities>
148
+        <TargetArmAds>
149
+          <ArmAdsMisc>
150
+            <GenerateListings>0</GenerateListings>
151
+            <asHll>1</asHll>
152
+            <asAsm>1</asAsm>
153
+            <asMacX>1</asMacX>
154
+            <asSyms>1</asSyms>
155
+            <asFals>1</asFals>
156
+            <asDbgD>1</asDbgD>
157
+            <asForm>1</asForm>
158
+            <ldLst>0</ldLst>
159
+            <ldmm>1</ldmm>
160
+            <ldXref>1</ldXref>
161
+            <BigEnd>0</BigEnd>
162
+            <AdsALst>1</AdsALst>
163
+            <AdsACrf>1</AdsACrf>
164
+            <AdsANop>0</AdsANop>
165
+            <AdsANot>0</AdsANot>
166
+            <AdsLLst>1</AdsLLst>
167
+            <AdsLmap>1</AdsLmap>
168
+            <AdsLcgr>1</AdsLcgr>
169
+            <AdsLsym>1</AdsLsym>
170
+            <AdsLszi>1</AdsLszi>
171
+            <AdsLtoi>1</AdsLtoi>
172
+            <AdsLsun>1</AdsLsun>
173
+            <AdsLven>1</AdsLven>
174
+            <AdsLsxf>1</AdsLsxf>
175
+            <RvctClst>0</RvctClst>
176
+            <GenPPlst>0</GenPPlst>
177
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
178
+            <RvctDeviceName></RvctDeviceName>
179
+            <mOS>0</mOS>
180
+            <uocRom>0</uocRom>
181
+            <uocRam>0</uocRam>
182
+            <hadIROM>1</hadIROM>
183
+            <hadIRAM>1</hadIRAM>
184
+            <hadXRAM>0</hadXRAM>
185
+            <uocXRam>0</uocXRam>
186
+            <RvdsVP>0</RvdsVP>
187
+            <hadIRAM2>0</hadIRAM2>
188
+            <hadIROM2>0</hadIROM2>
189
+            <StupSel>8</StupSel>
190
+            <useUlib>1</useUlib>
191
+            <EndSel>0</EndSel>
192
+            <uLtcg>0</uLtcg>
193
+            <nSecure>0</nSecure>
194
+            <RoSelD>3</RoSelD>
195
+            <RwSelD>3</RwSelD>
196
+            <CodeSel>0</CodeSel>
197
+            <OptFeed>0</OptFeed>
198
+            <NoZi1>0</NoZi1>
199
+            <NoZi2>0</NoZi2>
200
+            <NoZi3>0</NoZi3>
201
+            <NoZi4>0</NoZi4>
202
+            <NoZi5>0</NoZi5>
203
+            <Ro1Chk>0</Ro1Chk>
204
+            <Ro2Chk>0</Ro2Chk>
205
+            <Ro3Chk>0</Ro3Chk>
206
+            <Ir1Chk>1</Ir1Chk>
207
+            <Ir2Chk>0</Ir2Chk>
208
+            <Ra1Chk>0</Ra1Chk>
209
+            <Ra2Chk>0</Ra2Chk>
210
+            <Ra3Chk>0</Ra3Chk>
211
+            <Im1Chk>1</Im1Chk>
212
+            <Im2Chk>0</Im2Chk>
213
+            <OnChipMemories>
214
+              <Ocm1>
215
+                <Type>0</Type>
216
+                <StartAddress>0x0</StartAddress>
217
+                <Size>0x0</Size>
218
+              </Ocm1>
219
+              <Ocm2>
220
+                <Type>0</Type>
221
+                <StartAddress>0x0</StartAddress>
222
+                <Size>0x0</Size>
223
+              </Ocm2>
224
+              <Ocm3>
225
+                <Type>0</Type>
226
+                <StartAddress>0x0</StartAddress>
227
+                <Size>0x0</Size>
228
+              </Ocm3>
229
+              <Ocm4>
230
+                <Type>0</Type>
231
+                <StartAddress>0x0</StartAddress>
232
+                <Size>0x0</Size>
233
+              </Ocm4>
234
+              <Ocm5>
235
+                <Type>0</Type>
236
+                <StartAddress>0x0</StartAddress>
237
+                <Size>0x0</Size>
238
+              </Ocm5>
239
+              <Ocm6>
240
+                <Type>0</Type>
241
+                <StartAddress>0x0</StartAddress>
242
+                <Size>0x0</Size>
243
+              </Ocm6>
244
+              <IRAM>
245
+                <Type>0</Type>
246
+                <StartAddress>0x20000000</StartAddress>
247
+                <Size>0x5000</Size>
248
+              </IRAM>
249
+              <IROM>
250
+                <Type>1</Type>
251
+                <StartAddress>0x8000000</StartAddress>
252
+                <Size>0x20000</Size>
253
+              </IROM>
254
+              <XRAM>
255
+                <Type>0</Type>
256
+                <StartAddress>0x0</StartAddress>
257
+                <Size>0x0</Size>
258
+              </XRAM>
259
+              <OCR_RVCT1>
260
+                <Type>1</Type>
261
+                <StartAddress>0x0</StartAddress>
262
+                <Size>0x0</Size>
263
+              </OCR_RVCT1>
264
+              <OCR_RVCT2>
265
+                <Type>1</Type>
266
+                <StartAddress>0x0</StartAddress>
267
+                <Size>0x0</Size>
268
+              </OCR_RVCT2>
269
+              <OCR_RVCT3>
270
+                <Type>1</Type>
271
+                <StartAddress>0x0</StartAddress>
272
+                <Size>0x0</Size>
273
+              </OCR_RVCT3>
274
+              <OCR_RVCT4>
275
+                <Type>1</Type>
276
+                <StartAddress>0x8000000</StartAddress>
277
+                <Size>0x20000</Size>
278
+              </OCR_RVCT4>
279
+              <OCR_RVCT5>
280
+                <Type>1</Type>
281
+                <StartAddress>0x0</StartAddress>
282
+                <Size>0x0</Size>
283
+              </OCR_RVCT5>
284
+              <OCR_RVCT6>
285
+                <Type>0</Type>
286
+                <StartAddress>0x0</StartAddress>
287
+                <Size>0x0</Size>
288
+              </OCR_RVCT6>
289
+              <OCR_RVCT7>
290
+                <Type>0</Type>
291
+                <StartAddress>0x0</StartAddress>
292
+                <Size>0x0</Size>
293
+              </OCR_RVCT7>
294
+              <OCR_RVCT8>
295
+                <Type>0</Type>
296
+                <StartAddress>0x0</StartAddress>
297
+                <Size>0x0</Size>
298
+              </OCR_RVCT8>
299
+              <OCR_RVCT9>
300
+                <Type>0</Type>
301
+                <StartAddress>0x20000000</StartAddress>
302
+                <Size>0x5000</Size>
303
+              </OCR_RVCT9>
304
+              <OCR_RVCT10>
305
+                <Type>0</Type>
306
+                <StartAddress>0x0</StartAddress>
307
+                <Size>0x0</Size>
308
+              </OCR_RVCT10>
309
+            </OnChipMemories>
310
+            <RvctStartVector></RvctStartVector>
311
+          </ArmAdsMisc>
312
+          <Cads>
313
+            <interw>1</interw>
314
+            <Optim>1</Optim>
315
+            <oTime>0</oTime>
316
+            <SplitLS>0</SplitLS>
317
+            <OneElfS>1</OneElfS>
318
+            <Strict>0</Strict>
319
+            <EnumInt>0</EnumInt>
320
+            <PlainCh>0</PlainCh>
321
+            <Ropi>0</Ropi>
322
+            <Rwpi>0</Rwpi>
323
+            <wLevel>2</wLevel>
324
+            <uThumb>0</uThumb>
325
+            <uSurpInc>0</uSurpInc>
326
+            <uC99>0</uC99>
327
+            <uGnu>0</uGnu>
328
+            <useXO>0</useXO>
329
+            <v6Lang>1</v6Lang>
330
+            <v6LangP>1</v6LangP>
331
+            <vShortEn>1</vShortEn>
332
+            <vShortWch>1</vShortWch>
333
+            <v6Lto>0</v6Lto>
334
+            <v6WtE>0</v6WtE>
335
+            <v6Rtti>0</v6Rtti>
336
+            <VariousControls>
337
+              <MiscControls>--C99</MiscControls>
338
+              <Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
339
+              <Undefine></Undefine>
340
+              <IncludePath>.\Librairie\GFSSP72;.\Librairie\etat</IncludePath>
341
+            </VariousControls>
342
+          </Cads>
343
+          <Aads>
344
+            <interw>1</interw>
345
+            <Ropi>0</Ropi>
346
+            <Rwpi>0</Rwpi>
347
+            <thumb>0</thumb>
348
+            <SplitLS>0</SplitLS>
349
+            <SwStkChk>0</SwStkChk>
350
+            <NoWarn>0</NoWarn>
351
+            <uSurpInc>0</uSurpInc>
352
+            <useXO>0</useXO>
353
+            <uClangAs>0</uClangAs>
354
+            <VariousControls>
355
+              <MiscControls></MiscControls>
356
+              <Define></Define>
357
+              <Undefine></Undefine>
358
+              <IncludePath></IncludePath>
359
+            </VariousControls>
360
+          </Aads>
361
+          <LDads>
362
+            <umfTarg>1</umfTarg>
363
+            <Ropi>0</Ropi>
364
+            <Rwpi>0</Rwpi>
365
+            <noStLib>0</noStLib>
366
+            <RepFail>1</RepFail>
367
+            <useFile>0</useFile>
368
+            <TextAddressRange>0x08000000</TextAddressRange>
369
+            <DataAddressRange>0x20000000</DataAddressRange>
370
+            <pXoBase></pXoBase>
371
+            <ScatterFile></ScatterFile>
372
+            <IncludeLibs></IncludeLibs>
373
+            <IncludeLibsPath></IncludeLibsPath>
374
+            <Misc></Misc>
375
+            <LinkerInputFile></LinkerInputFile>
376
+            <DisabledWarnings></DisabledWarnings>
377
+          </LDads>
378
+        </TargetArmAds>
379
+      </TargetOption>
380
+      <Groups>
381
+        <Group>
382
+          <GroupName>Sources</GroupName>
383
+          <Files>
384
+            <File>
385
+              <FileName>principal.c</FileName>
386
+              <FileType>1</FileType>
387
+              <FilePath>.\Src\principal.c</FilePath>
388
+            </File>
389
+          </Files>
390
+        </Group>
391
+        <Group>
392
+          <GroupName>Sys</GroupName>
393
+          <Files>
394
+            <File>
395
+              <FileName>startup-rvds.s</FileName>
396
+              <FileType>2</FileType>
397
+              <FilePath>.\Src\startup-rvds.s</FilePath>
398
+            </File>
399
+          </Files>
400
+        </Group>
401
+        <Group>
402
+          <GroupName>DFT</GroupName>
403
+          <Files>
404
+            <File>
405
+              <FileName>DFT.s</FileName>
406
+              <FileType>2</FileType>
407
+              <FilePath>.\Src\Fichiers_DFT\DFT.s</FilePath>
408
+            </File>
409
+            <File>
410
+              <FileName>TabSinCos.asm</FileName>
411
+              <FileType>2</FileType>
412
+              <FilePath>.\Src\Fichiers_DFT\TabSinCos.asm</FilePath>
413
+            </File>
414
+          </Files>
415
+        </Group>
416
+        <Group>
417
+          <GroupName>Son</GroupName>
418
+          <Files>
419
+            <File>
420
+              <FileName>bruitverre.asm</FileName>
421
+              <FileType>2</FileType>
422
+              <FilePath>.\Src\Fichiers_Son\bruitverre.asm</FilePath>
423
+            </File>
424
+            <File>
425
+              <FileName>Son.s</FileName>
426
+              <FileType>2</FileType>
427
+              <FilePath>.\Src\Fichiers_Son\Son.s</FilePath>
428
+            </File>
429
+          </Files>
430
+        </Group>
431
+        <Group>
432
+          <GroupName>Drivers</GroupName>
433
+          <Files>
434
+            <File>
435
+              <FileName>gfssp72.lib</FileName>
436
+              <FileType>4</FileType>
437
+              <FilePath>.\Librairie\GFSSP72\gfssp72.lib</FilePath>
438
+            </File>
439
+            <File>
440
+              <FileName>etat.inc</FileName>
441
+              <FileType>5</FileType>
442
+              <FilePath>.\Librairie\etat\etat.inc</FilePath>
443
+            </File>
444
+          </Files>
445
+        </Group>
446
+        <Group>
447
+          <GroupName>::CMSIS</GroupName>
448
+        </Group>
449
+      </Groups>
450
+    </Target>
451
+  </Targets>
452
+
453
+  <RTE>
454
+    <apis/>
455
+    <components>
456
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
457
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
458
+        <targetInfos>
459
+          <targetInfo name="Simu"/>
460
+        </targetInfos>
461
+      </component>
462
+    </components>
463
+    <files/>
464
+  </RTE>
465
+
466
+</Project>

+ 61
- 0
Obj_4/Src/Fichiers_DFT/DFT.s View File

@@ -0,0 +1,61 @@
1
+; AFONSO Perrine LARTIGUE Auriane
2
+	thumb
3
+	area moncode, code, readwrite
4
+		
5
+	import TabSin
6
+    import TabCos
7
+		
8
+	export 	CalculM
9
+
10
+
11
+calculReouIm	proc ; procedure permettant de calculer imaginaire ou reel
12
+	; ro contient la valeur de k
13
+	; r1 contient adresse de TabSig
14
+	; r2 contient adresse de TabCos ou Tabsin
15
+	mov r3 , #0x00 ; r3 va nous servir de compteur i 
16
+	mov r12, #0x00 ; va contenir le resultat temporairement	
17
+comparaison	cmp r3, #64 ; on compare i a 64
18
+	bne loop
19
+	b fin	
20
+loop
21
+	push {r0} 
22
+	push{r12}; on garde l'ancienne contenu dans r12 
23
+	mul r0, r0 , r3 ;  i*k
24
+	and r0, #0x3F  ; contient i*k modulo 64
25
+	ldrsh r12 , [r2, r0 , LSL #0x01] ;  cos(i*k*2 pi / N)
26
+	mov r0 , r12
27
+	ldrsh r12 , [r1, r3 , LSL #0x01] ;  x(i)
28
+	mul r12 , r12 , r0 ; x(i)* cos(i*k*2 pi / N)
29
+	add r3 , #0x01 ; on incremente le compteur i
30
+	mov r0, r12
31
+	pop{r12}
32
+	add r12, r0
33
+	pop {r0}
34
+	b comparaison ; on reboucle
35
+fin
36
+	mov r0 , r12 ; on stocke le resultat final dans r0
37
+	bx lr 
38
+	endp
39
+
40
+
41
+CalculM	proc
42
+	; k dans r0
43
+	; Signal dans r1
44
+	ldr r2, =TabCos ; adresse de TabCos dans le registre r2
45
+	push{LR,r0}
46
+	bl calculReouIm
47
+	mov r3, r0; Re dan r3
48
+	pop{r0}
49
+	push {r3}
50
+	ldr r2, =TabSin ; adresse de TabSin dans le registre r2
51
+	bl calculReouIm
52
+	mov r12 , r0 ; Im dans r12
53
+	pop{r3}
54
+	smull r1, r2, r3 , r3 ; Re^2
55
+	smlal r1, r2, r12 , r12; Re^2 +Im^2
56
+	mov r0, r2 ; on stocke le resultat dans r2
57
+	pop{PC}
58
+	bx lr 
59
+	endp
60
+		
61
+	end

+ 136
- 0
Obj_4/Src/Fichiers_DFT/TabSinCos.asm View File

@@ -0,0 +1,136 @@
1
+	AREA Trigo, DATA, READWRITE
2
+	export TabSin
3
+	export TabCos
4
+
5
+TabCos
6
+	DCW	32767	;  0 0x7fff  0.99997
7
+	DCW	32610	;  1 0x7f62  0.99518
8
+	DCW	32138	;  2 0x7d8a  0.98077
9
+	DCW	31357	;  3 0x7a7d  0.95694
10
+	DCW	30274	;  4 0x7642  0.92389
11
+	DCW	28899	;  5 0x70e3  0.88193
12
+	DCW	27246	;  6 0x6a6e  0.83148
13
+	DCW	25330	;  7 0x62f2  0.77301
14
+	DCW	23170	;  8 0x5a82  0.70709
15
+	DCW	20788	;  9 0x5134  0.63440
16
+	DCW	18205	; 10 0x471d  0.55557
17
+	DCW	15447	; 11 0x3c57  0.47141
18
+	DCW	12540	; 12 0x30fc  0.38269
19
+	DCW	 9512	; 13 0x2528  0.29028
20
+	DCW	 6393	; 14 0x18f9  0.19510
21
+	DCW	 3212	; 15 0x0c8c  0.09802
22
+	DCW	    0	; 16 0x0000  0.00000
23
+	DCW	-3212	; 17 0xf374 -0.09802
24
+	DCW	-6393	; 18 0xe707 -0.19510
25
+	DCW	-9512	; 19 0xdad8 -0.29028
26
+	DCW	-12540	; 20 0xcf04 -0.38269
27
+	DCW	-15447	; 21 0xc3a9 -0.47141
28
+	DCW	-18205	; 22 0xb8e3 -0.55557
29
+	DCW	-20788	; 23 0xaecc -0.63440
30
+	DCW	-23170	; 24 0xa57e -0.70709
31
+	DCW	-25330	; 25 0x9d0e -0.77301
32
+	DCW	-27246	; 26 0x9592 -0.83148
33
+	DCW	-28899	; 27 0x8f1d -0.88193
34
+	DCW	-30274	; 28 0x89be -0.92389
35
+	DCW	-31357	; 29 0x8583 -0.95694
36
+	DCW	-32138	; 30 0x8276 -0.98077
37
+	DCW	-32610	; 31 0x809e -0.99518
38
+	DCW	-32768	; 32 0x8000 -1.00000
39
+	DCW	-32610	; 33 0x809e -0.99518
40
+	DCW	-32138	; 34 0x8276 -0.98077
41
+	DCW	-31357	; 35 0x8583 -0.95694
42
+	DCW	-30274	; 36 0x89be -0.92389
43
+	DCW	-28899	; 37 0x8f1d -0.88193
44
+	DCW	-27246	; 38 0x9592 -0.83148
45
+	DCW	-25330	; 39 0x9d0e -0.77301
46
+	DCW	-23170	; 40 0xa57e -0.70709
47
+	DCW	-20788	; 41 0xaecc -0.63440
48
+	DCW	-18205	; 42 0xb8e3 -0.55557
49
+	DCW	-15447	; 43 0xc3a9 -0.47141
50
+	DCW	-12540	; 44 0xcf04 -0.38269
51
+	DCW	-9512	; 45 0xdad8 -0.29028
52
+	DCW	-6393	; 46 0xe707 -0.19510
53
+	DCW	-3212	; 47 0xf374 -0.09802
54
+	DCW	    0	; 48 0x0000  0.00000
55
+	DCW	 3212	; 49 0x0c8c  0.09802
56
+	DCW	 6393	; 50 0x18f9  0.19510
57
+	DCW	 9512	; 51 0x2528  0.29028
58
+	DCW	12540	; 52 0x30fc  0.38269
59
+	DCW	15447	; 53 0x3c57  0.47141
60
+	DCW	18205	; 54 0x471d  0.55557
61
+	DCW	20788	; 55 0x5134  0.63440
62
+	DCW	23170	; 56 0x5a82  0.70709
63
+	DCW	25330	; 57 0x62f2  0.77301
64
+	DCW	27246	; 58 0x6a6e  0.83148
65
+	DCW	28899	; 59 0x70e3  0.88193
66
+	DCW	30274	; 60 0x7642  0.92389
67
+	DCW	31357	; 61 0x7a7d  0.95694
68
+	DCW	32138	; 62 0x7d8a  0.98077
69
+	DCW	32610	; 63 0x7f62  0.99518
70
+TabSin
71
+	DCW	    0	;  0 0x0000  0.00000
72
+	DCW	 3212	;  1 0x0c8c  0.09802
73
+	DCW	 6393	;  2 0x18f9  0.19510
74
+	DCW	 9512	;  3 0x2528  0.29028
75
+	DCW	12540	;  4 0x30fc  0.38269
76
+	DCW	15447	;  5 0x3c57  0.47141
77
+	DCW	18205	;  6 0x471d  0.55557
78
+	DCW	20788	;  7 0x5134  0.63440
79
+	DCW	23170	;  8 0x5a82  0.70709
80
+	DCW	25330	;  9 0x62f2  0.77301
81
+	DCW	27246	; 10 0x6a6e  0.83148
82
+	DCW	28899	; 11 0x70e3  0.88193
83
+	DCW	30274	; 12 0x7642  0.92389
84
+	DCW	31357	; 13 0x7a7d  0.95694
85
+	DCW	32138	; 14 0x7d8a  0.98077
86
+	DCW	32610	; 15 0x7f62  0.99518
87
+	DCW	32767	; 16 0x7fff  0.99997
88
+	DCW	32610	; 17 0x7f62  0.99518
89
+	DCW	32138	; 18 0x7d8a  0.98077
90
+	DCW	31357	; 19 0x7a7d  0.95694
91
+	DCW	30274	; 20 0x7642  0.92389
92
+	DCW	28899	; 21 0x70e3  0.88193
93
+	DCW	27246	; 22 0x6a6e  0.83148
94
+	DCW	25330	; 23 0x62f2  0.77301
95
+	DCW	23170	; 24 0x5a82  0.70709
96
+	DCW	20788	; 25 0x5134  0.63440
97
+	DCW	18205	; 26 0x471d  0.55557
98
+	DCW	15447	; 27 0x3c57  0.47141
99
+	DCW	12540	; 28 0x30fc  0.38269
100
+	DCW	 9512	; 29 0x2528  0.29028
101
+	DCW	 6393	; 30 0x18f9  0.19510
102
+	DCW	 3212	; 31 0x0c8c  0.09802
103
+	DCW	    0	; 32 0x0000  0.00000
104
+	DCW	-3212	; 33 0xf374 -0.09802
105
+	DCW	-6393	; 34 0xe707 -0.19510
106
+	DCW	-9512	; 35 0xdad8 -0.29028
107
+	DCW	-12540	; 36 0xcf04 -0.38269
108
+	DCW	-15447	; 37 0xc3a9 -0.47141
109
+	DCW	-18205	; 38 0xb8e3 -0.55557
110
+	DCW	-20788	; 39 0xaecc -0.63440
111
+	DCW	-23170	; 40 0xa57e -0.70709
112
+	DCW	-25330	; 41 0x9d0e -0.77301
113
+	DCW	-27246	; 42 0x9592 -0.83148
114
+	DCW	-28899	; 43 0x8f1d -0.88193
115
+	DCW	-30274	; 44 0x89be -0.92389
116
+	DCW	-31357	; 45 0x8583 -0.95694
117
+	DCW	-32138	; 46 0x8276 -0.98077
118
+	DCW	-32610	; 47 0x809e -0.99518
119
+	DCW	-32768	; 48 0x8000 -1.00000
120
+	DCW	-32610	; 49 0x809e -0.99518
121
+	DCW	-32138	; 50 0x8276 -0.98077
122
+	DCW	-31357	; 51 0x8583 -0.95694
123
+	DCW	-30274	; 52 0x89be -0.92389
124
+	DCW	-28899	; 53 0x8f1d -0.88193
125
+	DCW	-27246	; 54 0x9592 -0.83148
126
+	DCW	-25330	; 55 0x9d0e -0.77301
127
+	DCW	-23170	; 56 0xa57e -0.70709
128
+	DCW	-20788	; 57 0xaecc -0.63440
129
+	DCW	-18205	; 58 0xb8e3 -0.55557
130
+	DCW	-15447	; 59 0xc3a9 -0.47141
131
+	DCW	-12540	; 60 0xcf04 -0.38269
132
+	DCW	-9512	; 61 0xdad8 -0.29028
133
+	DCW	-6393	; 62 0xe707 -0.19510
134
+	DCW	-3212	; 63 0xf374 -0.09802
135
+
136
+	END

+ 63
- 0
Obj_4/Src/Fichiers_Son/Son.s View File

@@ -0,0 +1,63 @@
1
+; AFONSO Perrine LARTIGUE Auriane
2
+	thumb
3
+	area madata, data, readwrite
4
+flag	dcd 	0	
5
+TIM3_CCR3    equ    0x4000043C    ; adresse registre PWM
6
+
7
+	
8
+E_POS    equ    0
9
+E_TAI    equ    4
10
+E_SON    equ    8
11
+E_RES    equ    12
12
+E_PER    equ    16
13
+	
14
+	area  moncode, code, readonly
15
+	export timer_callback
16
+	
17
+    import etat
18
+    import Son
19
+    import LongueurSon 
20
+    import PeriodeSonMicroSec
21
+
22
+
23
+
24
+;GPIOB_BSRR	equ	0x40010C10	; Bit Set/Reset registe
25
+
26
+	
27
+timer_callback 	proc
28
+	push{r4}
29
+	ldr	r2, =etat ;r2= @etat 
30
+	ldr	r0, [r2 , #E_POS] ;  r0 =  position
31
+	ldr	r1, [r2 , #E_TAI] ;  r1 =  taille
32
+	cmp	r0, r1;  on compare taille et position
33
+	
34
+	beq fin ; taille = position
35
+	
36
+different
37
+	ldr r3 , [r2,#E_SON] ; r3  = @son
38
+	ldrsh r4 , [r3, r0, lsl #0x1] ; r4 = son
39
+	; ajout composante continue: 2^15
40
+	add r4, #0x8000
41
+	
42
+	ldr r12 , [r2 ,#E_RES] ;  r12 = resolution
43
+	
44
+	mul r4 , r12 ; on multiplie par le facteur d'échelle
45
+	mov r12,#0xFFFF
46
+	cmp r4, r12 ; la valeur échatillon doit etre compris entre 0 et 2^16 - 1
47
+	blo registre
48
+	udiv r4, r12
49
+	
50
+	
51
+registre	; échantillon copié dans le registre TIM3_CCR3
52
+	ldr r12 , =TIM3_CCR3
53
+	str r4 , [r12]
54
+	
55
+	; on incremente la position
56
+	add r0 , #0x1 ;
57
+	str r0 , [r2 , #E_POS]
58
+	
59
+fin	pop{r4}
60
+	bx	lr
61
+	endp
62
+		
63
+	end 

+ 5527
- 0
Obj_4/Src/Fichiers_Son/bruitverre.asm
File diff suppressed because it is too large
View File


+ 145
- 0
Obj_4/Src/principal.c View File

@@ -0,0 +1,145 @@
1
+//AFONSO Perrine LARTIGUE Auriane
2
+#include "gassp72.h"
3
+
4
+#define SYSTICK_PER 360000 // 72 MHz * 5ms
5
+#include "etat.h"
6
+#define Periode_en_Tck PeriodeSonMicroSec*72  
7
+#define Periode_PWM_en_Tck 320
8
+
9
+extern void timer_callback(void);
10
+extern int PeriodeSonMicroSec;
11
+extern short Son ;
12
+extern int LongueurSon ; 
13
+
14
+type_etat etat;
15
+
16
+
17
+unsigned short dma_buf[64]; //  buffer de 64 short ints pour le DMA
18
+int compteur[6]; //compteur d'occurence en fonction de M2(k) et M2TIR
19
+int point[6]; // contient les points des 6 joueurs 
20
+int CalculM(int,unsigned short *);
21
+int M2[64];
22
+
23
+void sys_callback(){
24
+
25
+		GPIO_Set(GPIOB, 1); // pour mesurer la durée réelle du traitement DMA+DFT+compteurs.
26
+
27
+	// Démarrage DMA pour 64 points
28
+		Start_DMA1(64);
29
+		Wait_On_End_Of_DMA1();
30
+		Stop_DMA1;
31
+
32
+		int M2TIR=0x2A7138 ; //seuil à calculer
33
+
34
+		for (int k=0; k<64; k++){
35
+			M2[k]=CalculM(k,dma_buf);
36
+			if (M2[k] > M2TIR){ // incrémenté chaque fois que M2(k) dépasse le seuil fixé M2TIR
37
+				switch(k){
38
+					case 17:
39
+						compteur[0]++; //tir à 85kHz
40
+						break;
41
+					case 18:
42
+						compteur[1]++; //tir à 90kHz
43
+						break;
44
+					case 19:
45
+						compteur[2]++; // tir à 95kHz
46
+						break ;
47
+					case 20:
48
+						compteur[3]++; // tir à 100kHz
49
+						break;
50
+					case 23:
51
+						compteur[4]++; // tir à 115kHz
52
+						break;
53
+					case 24:
54
+						compteur[5]++; // tir à 120kHz
55
+						break;
56
+				}}
57
+				else {
58
+					switch(k){ //remise à zéro
59
+					case 17:
60
+						compteur[0]=0; //tir à 85kHz
61
+						break;
62
+					case 18:
63
+						compteur[1]=0; //tir à 90kHz
64
+						break;
65
+					case 19:
66
+						compteur[2]=0; // tir à 95kHz
67
+						break ;
68
+					case 20:
69
+						compteur[3]=0; // tir à 100kHz
70
+						break;
71
+					case 23:
72
+						compteur[4]=0; // tir à 115kHz
73
+						break;
74
+					case 24:
75
+						compteur[5]=0; // tir à 120kHz
76
+						break;
77
+				}
78
+			}
79
+				GPIO_Clear(GPIOB, 1);
80
+
81
+			}
82
+		for (int j = 0 ; j < 6 ; j++){
83
+			if(compteur[j]==3){
84
+				point[j]++; // on incremente le score du joueur j
85
+				
86
+				 etat.position = 0;
87
+				
88
+				
89
+			}
90
+		}
91
+	}
92
+
93
+
94
+int main(){
95
+	//initialisation variable etat 
96
+	etat.periode_ticks = PeriodeSonMicroSec ;
97
+	etat.taille = LongueurSon;
98
+        etat.son = &Son ;
99
+	etat.position = etat.taille;
100
+	// activation de la PLL qui multiplie la fréquence du quartz par 9
101
+				CLOCK_Configure();
102
+				// config port PB1 pour être utilisé en sortie
103
+				GPIO_Configure(GPIOB, 0, OUTPUT, ALT_PPULL);
104
+				etat.resolution = PWM_Init_ff( TIM3 , 3 , Periode_PWM_en_Tck );
105
+				// initialisation du timer 4
106
+				// Periode_en_Tck doit fournir la durée entre interruptions,
107
+				// exprimée en périodes Tck de l'horloge principale du STM32 (72 MHz)
108
+
109
+				Timer_1234_Init_ff( TIM4, Periode_en_Tck );
110
+				// enregistrement de la fonction de traitement de l'interruption timer
111
+				// ici le 2 est la priorité, timer_callback est l'adresse de cette fonction, a créér en asm,
112
+				// cette fonction doit être conforme à l'AAPCS
113
+				Active_IT_Debordement_Timer( TIM4, 2,  timer_callback );
114
+				// lancement du timer
115
+				Run_Timer( TIM4 );
116
+				Run_Timer (TIM3) ; 
117
+					
118
+	// activation de la PLL qui multiplie la fréquence du quartz par 9
119
+	CLOCK_Configure();
120
+	// PA2 (ADC voie 2) = entrée analog
121
+	GPIO_Configure(GPIOA, 2, INPUT, ANALOG);
122
+	// PB1 = sortie pour profilage à l'oscillo
123
+	GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
124
+	// PB14 = sortie pour LED
125
+	GPIO_Configure(GPIOB, 14, OUTPUT, OUTPUT_PPULL);
126
+
127
+	// activation ADC, sampling time 1us
128
+	Init_TimingADC_ActiveADC_ff( ADC1, 0x52 );
129
+	Single_Channel_ADC( ADC1, 2 );
130
+	// Déclenchement ADC par timer2, periode (72MHz/320kHz)ticks
131
+	Init_Conversion_On_Trig_Timer_ff( ADC1, TIM2_CC2, 225 );
132
+	// Config DMA pour utilisation du buffer dma_buf (a créér)
133
+	Init_ADC1_DMA1( 0, dma_buf );
134
+
135
+	// Config Timer, période exprimée en périodes horloge CPU (72 MHz)
136
+	Systick_Period_ff( SYSTICK_PER );
137
+	// enregistrement de la fonction de traitement de l'interruption timer
138
+	// ici le 3 est la priorité, sys_callback est l'adresse de cette fonction, a créér en C
139
+	Systick_Prio_IT( 3, sys_callback );
140
+	SysTick_On;
141
+	SysTick_Enable_IT;
142
+
143
+	while(1){
144
+	}
145
+}

+ 335
- 0
Obj_4/Src/startup-rvds.s View File

@@ -0,0 +1,335 @@
1
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2
+;* File Name          : startup_stm32f10x_md.s
3
+;* Author             : MCD Application Team
4
+;* Version            : V3.5.0
5
+;* Date               : 11-March-2011
6
+;* Description        : STM32F10x Medium Density Devices vector table for MDK-ARM 
7
+;*                      toolchain.  
8
+;*                      This module performs:
9
+;*                      - Set the initial SP
10
+;*                      - Set the initial PC == Reset_Handler
11
+;*                      - Set the vector table entries with the exceptions ISR address
12
+;*                      - Configure the clock system
13
+;*                      - Branches to __main in the C library (which eventually
14
+;*                        calls main()).
15
+;*                      After Reset the CortexM3 processor is in Thread mode,
16
+;*                      priority is Privileged, and the Stack is set to Main.
17
+;* <<< Use Configuration Wizard in Context Menu >>>   
18
+;*******************************************************************************
19
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25
+;*******************************************************************************
26
+
27
+; Amount of memory (in bytes) allocated for Stack
28
+; Tailor this value to your application needs
29
+; <h> Stack Configuration
30
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31
+; </h>
32
+
33
+Stack_Size      EQU     0x00000400
34
+
35
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
36
+Stack_Mem       SPACE   Stack_Size
37
+__initial_sp
38
+
39
+
40
+; <h> Heap Configuration
41
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
42
+; </h>
43
+
44
+Heap_Size       EQU     0x00000200
45
+
46
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
47
+__heap_base
48
+Heap_Mem        SPACE   Heap_Size
49
+__heap_limit
50
+
51
+                PRESERVE8
52
+                THUMB
53
+
54
+
55
+; Vector Table Mapped to Address 0 at Reset
56
+                AREA    RESET, DATA, READONLY
57
+                EXPORT  __Vectors
58
+                EXPORT  __Vectors_End
59
+                EXPORT  __Vectors_Size
60
+
61
+__Vectors       DCD     __initial_sp               ; Top of Stack
62
+                DCD     Reset_Handler              ; Reset Handler
63
+                DCD     NMI_Handler                ; NMI Handler
64
+                DCD     HardFault_Handler          ; Hard Fault Handler
65
+                DCD     MemManage_Handler          ; MPU Fault Handler
66
+                DCD     BusFault_Handler           ; Bus Fault Handler
67
+                DCD     UsageFault_Handler         ; Usage Fault Handler
68
+                DCD     0                          ; Reserved
69
+                DCD     0                          ; Reserved
70
+                DCD     0                          ; Reserved
71
+                DCD     0                          ; Reserved
72
+                DCD     SVC_Handler                ; SVCall Handler
73
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
74
+                DCD     0                          ; Reserved
75
+                DCD     PendSV_Handler             ; PendSV Handler
76
+                DCD     SysTick_Handler            ; SysTick Handler
77
+
78
+                ; External Interrupts
79
+                DCD     WWDG_IRQHandler            ; Window Watchdog
80
+                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
81
+                DCD     TAMPER_IRQHandler          ; Tamper
82
+                DCD     RTC_IRQHandler             ; RTC
83
+                DCD     FLASH_IRQHandler           ; Flash
84
+                DCD     RCC_IRQHandler             ; RCC
85
+                DCD     EXTI0_IRQHandler           ; EXTI Line 0
86
+                DCD     EXTI1_IRQHandler           ; EXTI Line 1
87
+                DCD     EXTI2_IRQHandler           ; EXTI Line 2
88
+                DCD     EXTI3_IRQHandler           ; EXTI Line 3
89
+                DCD     EXTI4_IRQHandler           ; EXTI Line 4
90
+                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
91
+                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
92
+                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
93
+                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
94
+                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
95
+                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
96
+                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
97
+                DCD     ADC1_2_IRQHandler          ; ADC1_2
98
+                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
99
+                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
100
+                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
101
+                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
102
+                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
103
+                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
104
+                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
105
+                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
106
+                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
107
+                DCD     TIM2_IRQHandler            ; TIM2
108
+                DCD     TIM3_IRQHandler            ; TIM3
109
+                DCD     TIM4_IRQHandler            ; TIM4
110
+                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
111
+                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
112
+                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
113
+                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
114
+                DCD     SPI1_IRQHandler            ; SPI1
115
+                DCD     SPI2_IRQHandler            ; SPI2
116
+                DCD     USART1_IRQHandler          ; USART1
117
+                DCD     USART2_IRQHandler          ; USART2
118
+                DCD     USART3_IRQHandler          ; USART3
119
+                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
120
+                DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
121
+                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
122
+__Vectors_End
123
+
124
+__Vectors_Size  EQU  __Vectors_End - __Vectors
125
+
126
+                AREA    |.text|, CODE, READONLY
127
+
128
+; Reset handler
129
+Reset_Handler    PROC
130
+                 EXPORT  Reset_Handler             [WEAK]
131
+     IMPORT  __main
132
+     
133
+                 LDR     R0, =SystemInit
134
+                 BLX     R0
135
+
136
+;
137
+; Enable UsageFault, MemFault and Busfault interrupts
138
+;
139
+_SHCSR			EQU     0xE000ED24		; SHCSR is located at address 0xE000ED24
140
+				LDR.W	R0, =_SHCSR				
141
+				LDR 	R1, [R0]				; Read CPACR
142
+				ORR 	R1, R1, #(0x7 << 16)	; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
143
+				STR 	R1, [R0]				; Write back the modified value to the CPACR
144
+				DSB								; Wait for store to complete
145
+
146
+;
147
+; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
148
+;
149
+_AIRCR			EQU		0xE000ED0C
150
+_AIRCR_VAL		EQU		0x05FA0300
151
+				LDR.W	R0, =_AIRCR
152
+				LDR.W	R1, =_AIRCR_VAL
153
+				STR		R1,[R0]
154
+		
155
+;
156
+; Finaly, jump to main function (void main (void))
157
+;
158
+                LDR     R0, =__main
159
+                BX      R0
160
+                ENDP
161
+
162
+SystemInit		PROC				 
163
+				EXPORT  SystemInit                    [WEAK]    
164
+				BX		LR
165
+				ENDP
166
+
167
+; Dummy Exception Handlers (infinite loops which can be modified)
168
+
169
+NMI_Handler     PROC
170
+                EXPORT  NMI_Handler                [WEAK]
171
+                B       .
172
+                ENDP
173
+HardFault_Handler\
174
+                PROC
175
+                EXPORT  HardFault_Handler          [WEAK]
176
+                B       .
177
+                ENDP
178
+MemManage_Handler\
179
+                PROC
180
+                EXPORT  MemManage_Handler          [WEAK]
181
+                B       .
182
+                ENDP
183
+BusFault_Handler\
184
+                PROC
185
+                EXPORT  BusFault_Handler           [WEAK]
186
+                B       .
187
+                ENDP
188
+UsageFault_Handler\
189
+                PROC
190
+                EXPORT  UsageFault_Handler         [WEAK]
191
+                B       .
192
+                ENDP
193
+SVC_Handler     PROC
194
+                EXPORT  SVC_Handler                [WEAK]
195
+                B       .
196
+                ENDP
197
+DebugMon_Handler\
198
+                PROC
199
+                EXPORT  DebugMon_Handler           [WEAK]
200
+                B       .
201
+                ENDP
202
+PendSV_Handler  PROC
203
+                EXPORT  PendSV_Handler             [WEAK]
204
+                B       .
205
+                ENDP
206
+SysTick_Handler PROC
207
+                EXPORT  SysTick_Handler            [WEAK]
208
+                B       .
209
+                ENDP
210
+
211
+Default_Handler PROC
212
+
213
+                EXPORT  WWDG_IRQHandler            [WEAK]
214
+                EXPORT  PVD_IRQHandler             [WEAK]
215
+                EXPORT  TAMPER_IRQHandler          [WEAK]
216
+                EXPORT  RTC_IRQHandler             [WEAK]
217
+                EXPORT  FLASH_IRQHandler           [WEAK]
218
+                EXPORT  RCC_IRQHandler             [WEAK]
219
+                EXPORT  EXTI0_IRQHandler           [WEAK]
220
+                EXPORT  EXTI1_IRQHandler           [WEAK]
221
+                EXPORT  EXTI2_IRQHandler           [WEAK]
222
+                EXPORT  EXTI3_IRQHandler           [WEAK]
223
+                EXPORT  EXTI4_IRQHandler           [WEAK]
224
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
225
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
226
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
227
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
228
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
229
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
230
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
231
+                EXPORT  ADC1_2_IRQHandler          [WEAK]
232
+                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
233
+                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
234
+                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
235
+                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
236
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
237
+                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
238
+                EXPORT  TIM1_UP_IRQHandler         [WEAK]
239
+                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
240
+                EXPORT  TIM1_CC_IRQHandler         [WEAK]
241
+                EXPORT  TIM2_IRQHandler            [WEAK]
242
+                EXPORT  TIM3_IRQHandler            [WEAK]
243
+                EXPORT  TIM4_IRQHandler            [WEAK]
244
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
245
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
246
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
247
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
248
+                EXPORT  SPI1_IRQHandler            [WEAK]
249
+                EXPORT  SPI2_IRQHandler            [WEAK]
250
+                EXPORT  USART1_IRQHandler          [WEAK]
251
+                EXPORT  USART2_IRQHandler          [WEAK]
252
+                EXPORT  USART3_IRQHandler          [WEAK]
253
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
254
+                EXPORT  RTCAlarm_IRQHandler        [WEAK]
255
+                EXPORT  USBWakeUp_IRQHandler       [WEAK]
256
+
257
+WWDG_IRQHandler
258
+PVD_IRQHandler
259
+TAMPER_IRQHandler
260
+RTC_IRQHandler
261
+FLASH_IRQHandler
262
+RCC_IRQHandler
263
+EXTI0_IRQHandler
264
+EXTI1_IRQHandler
265
+EXTI2_IRQHandler
266
+EXTI3_IRQHandler
267
+EXTI4_IRQHandler
268
+DMA1_Channel1_IRQHandler
269
+DMA1_Channel2_IRQHandler
270
+DMA1_Channel3_IRQHandler
271
+DMA1_Channel4_IRQHandler
272
+DMA1_Channel5_IRQHandler
273
+DMA1_Channel6_IRQHandler
274
+DMA1_Channel7_IRQHandler
275
+ADC1_2_IRQHandler
276
+USB_HP_CAN1_TX_IRQHandler
277
+USB_LP_CAN1_RX0_IRQHandler
278
+CAN1_RX1_IRQHandler
279
+CAN1_SCE_IRQHandler
280
+EXTI9_5_IRQHandler
281
+TIM1_BRK_IRQHandler
282
+TIM1_UP_IRQHandler
283
+TIM1_TRG_COM_IRQHandler
284
+TIM1_CC_IRQHandler
285
+TIM2_IRQHandler
286
+TIM3_IRQHandler
287
+TIM4_IRQHandler
288
+I2C1_EV_IRQHandler
289
+I2C1_ER_IRQHandler
290
+I2C2_EV_IRQHandler
291
+I2C2_ER_IRQHandler
292
+SPI1_IRQHandler
293
+SPI2_IRQHandler
294
+USART1_IRQHandler
295
+USART2_IRQHandler
296
+USART3_IRQHandler
297
+EXTI15_10_IRQHandler
298
+RTCAlarm_IRQHandler
299
+USBWakeUp_IRQHandler
300
+
301
+                B       .
302
+
303
+                ENDP
304
+
305
+                ALIGN
306
+
307
+;*******************************************************************************
308
+; User Stack and Heap initialization
309
+;*******************************************************************************
310
+                 IF      :DEF:__MICROLIB           
311
+                
312
+                 EXPORT  __initial_sp
313
+                 EXPORT  __heap_base
314
+                 EXPORT  __heap_limit
315
+                
316
+                 ELSE
317
+                
318
+                 IMPORT  __use_two_region_memory
319
+                 EXPORT  __user_initial_stackheap
320
+                 
321
+__user_initial_stackheap
322
+
323
+                 LDR     R0, =  Heap_Mem
324
+                 LDR     R1, =(Stack_Mem + Stack_Size)
325
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
326
+                 LDR     R3, = Stack_Mem
327
+                 BX      LR
328
+
329
+                 ALIGN
330
+
331
+                 ENDIF
332
+
333
+                 END
334
+
335
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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