Ajout Objectif 4
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17 змінених файлів з 7971 додано та 0 видалено
BIN
Obj_4/Librairie/GFSSP72/GFSSP72.pdf
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BIN
Obj_4/Librairie/GFSSP72/GFSSP72.pdf
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115
Obj_4/Librairie/GFSSP72/gassp72.h
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Obj_4/Librairie/GFSSP72/gassp72.h
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/**
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* Bibliotheque GASSP 2013-02-15
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*
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* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
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*
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*/
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// STM32F10X_CL : pour le STM32F107 "Communication Line"
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// STM32F10X_MD : pour le STM32F103 "Medium Density"
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//#define STM32F10X_MD // 2019 fix for Keil 5.23
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#include "stm32f10x.h"
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// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
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void CLOCK_Configure(void);
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// Timers 1, 2, 3, 4 -------------------------------------------------------
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// la duree entre deux debordements successifs doit etre donnnee en periodes
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// d'horloge CPU (typiquement 72 MHz)
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void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
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// activation d'une fonction de traitement de l'interruption timer (callback)
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void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
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// bloque le timer
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#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
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// Lance timer
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#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
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// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
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// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
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// de valeurs acceptees pour moduler la largeur d'impulsion
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vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
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// Timer systeme "SysTick" -------------------------------------------------
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// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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void Systick_Period_ff( unsigned int Periode_ticks );
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// activation d'une fonction de traitement de l'interruption timer (callback)
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void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
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#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
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#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
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#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
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#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
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// ADC - DMA ---------------------------------------------------------------
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// Analog-to-Digital Conversion, Direct Memory Access
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// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
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// la fonction rend la duree totale de conversion (meme unites)
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u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
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// choix d'un canal ADC unique
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void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
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// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
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// Les sources de déclenchement possibles :
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#define TIM1_CC1 0
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#define TIM1_CC2 1
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#define TIM1_CC3 2
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#define TIM2_CC2 3
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#define TIM4_CC4 5
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void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
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// initialisation d'acquisition en mode DMA
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// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
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void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
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// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
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// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
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void Start_DMA1( u16 NbEchDMA );
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// arret DMA
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#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
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// fonction d'attente (bloquante)
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// la duree depend de la periode d'acquisition et du nombre d'echantillons
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void Wait_On_End_Of_DMA1(void);
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// GPIO --------------------------------------------------------------------
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// Sens
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#define INPUT 'i'
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#define OUTPUT 'o'
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// Techno pour pin en entrée (INPUT)
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#define ANALOG 0
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#define INPUT_FLOATING 1
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#define INPUT_PULL_DOWN_UP 2
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// Techno pour pin en sortie (OUTPUT)
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#define OUTPUT_PPULL 0
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#define OUTPUT_OPDRAIN 1
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#define ALT_PPULL 2
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#define ALT_OPDRAIN 3
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// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
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// Exemple :
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// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
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// Place le bit 8 du port B en sortie Push-pull
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// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
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char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
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// Spécifier le numéro de broche (0 à 15)
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// exemple : Port_IO_Set(GPIOB,8);
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#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
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#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)
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BIN
Obj_4/Librairie/GFSSP72/gfssp72.lib
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Obj_4/Librairie/GFSSP72/gfssp72.lib
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7
Obj_4/Librairie/etat/etat.h
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Obj_4/Librairie/etat/etat.h
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typedef struct {
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int position; // 0
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int taille; // 4
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void * son; // 8
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int resolution; // 12
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int periode_ticks; // 16
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} type_etat;
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6
Obj_4/Librairie/etat/etat.inc
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Obj_4/Librairie/etat/etat.inc
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E_POS equ 0
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E_TAI equ 4
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E_SON equ 8
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E_RES equ 12
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E_PER equ 16
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end
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65
Obj_4/Obj/CHTI.build_log.htm
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Obj_4/Obj/CHTI.build_log.htm
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<html>
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<body>
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<pre>
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<h1>µVision Build Log</h1>
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<h2>Tool Versions:</h2>
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IDE-Version: µVision V5.25.2.0
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Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
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License Information: CSN CSN, INSA de Toulouse, LIC=----
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Tool Versions:
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Toolchain: MDK-Lite Version: 5.25.2.0
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Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
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C Compiler: Armcc.exe V5.06 update 6 (build 750)
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Assembler: Armasm.exe V5.06 update 6 (build 750)
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Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
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Library Manager: ArmAr.exe V5.06 update 6 (build 750)
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Hex Converter: FromElf.exe V5.06 update 6 (build 750)
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CPU DLL: SARMCM3.DLL V5.25.2.0
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Dialog DLL: DARMSTM.DLL V1.68.0.0
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Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.1.0
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Dialog DLL: TCM.DLL V1.35.1.0
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<h2>Project:</h2>
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U:\Windows\Bureau\BE_CHTI\Obj_4\Project.uvprojx
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Project File Date: 05/29/2020
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<h2>Output:</h2>
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*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
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Rebuild target 'Simu'
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assembling startup-rvds.s...
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assembling TabSinCos.asm...
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assembling Son.s...
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assembling DFT.s...
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assembling bruitverre.asm...
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compiling principal.c...
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linking...
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Program Size: Code=4164 RO-data=11556 RW-data=420 ZI-data=1560
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FromELF: creating hex file...
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".\Obj\CHTI.axf" - 0 Error(s), 0 Warning(s).
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<h2>Software Packages used:</h2>
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Package Vendor: ARM
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http://www.keil.com/pack/ARM.CMSIS.5.3.0.pack
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ARM.CMSIS.5.3.0
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CMSIS (Cortex Microcontroller Software Interface Standard)
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* Component: CORE Version: 5.1.1
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Package Vendor: Keil
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http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.2.0.pack
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Keil.STM32F1xx_DFP.2.2.0
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STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
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<h2>Collection of Component include folders:</h2>
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.\RTE\_Simu
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C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include
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C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include
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<h2>Collection of Component Files used:</h2>
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* Component: ARM::CMSIS:CORE:5.1.1
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Build Time Elapsed: 00:00:01
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</pre>
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</body>
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</html>
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634
Obj_4/Obj/CHTI.map
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Obj_4/Obj/CHTI.map
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Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
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==============================================================================
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Section Cross References
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principal.o(i.main) refers to clock.o(i.CLOCK_Configure) for CLOCK_Configure
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principal.o(i.main) refers to gpio.o(i.GPIO_Configure) for GPIO_Configure
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principal.o(i.main) refers to timer_1234.o(i.PWM_Init_ff) for PWM_Init_ff
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principal.o(i.main) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
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principal.o(i.main) refers to timer_1234.o(i.Active_IT_Debordement_Timer) for Active_IT_Debordement_Timer
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principal.o(i.main) refers to adc_fake.o(i.Init_TimingADC_ActiveADC_ff) for Init_TimingADC_ActiveADC_ff
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principal.o(i.main) refers to adc_fake.o(i.Single_Channel_ADC) for Single_Channel_ADC
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principal.o(i.main) refers to adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) for Init_Conversion_On_Trig_Timer_ff
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principal.o(i.main) refers to adc_fake.o(i.Init_ADC1_DMA1) for Init_ADC1_DMA1
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principal.o(i.main) refers to timer_systick.o(i.Systick_Period_ff) for Systick_Period_ff
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principal.o(i.main) refers to timer_systick.o(i.Systick_Prio_IT) for Systick_Prio_IT
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principal.o(i.main) refers to bruitverre.o(SecSon) for PeriodeSonMicroSec
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principal.o(i.main) refers to principal.o(.bss) for etat
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principal.o(i.main) refers to son.o(moncode) for timer_callback
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principal.o(i.main) refers to principal.o(i.sys_callback) for sys_callback
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principal.o(i.sys_callback) refers to adc_fake.o(i.Start_DMA1) for Start_DMA1
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principal.o(i.sys_callback) refers to adc_fake.o(i.Wait_On_End_Of_DMA1) for Wait_On_End_Of_DMA1
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principal.o(i.sys_callback) refers to dft.o(moncode) for CalculM
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principal.o(i.sys_callback) refers to principal.o(.bss) for dma_buf
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startup-rvds.o(RESET) refers to startup-rvds.o(STACK) for __initial_sp
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startup-rvds.o(RESET) refers to startup-rvds.o(.text) for Reset_Handler
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startup-rvds.o(RESET) refers to timer_systick.o(i.SysTick_Handler) for SysTick_Handler
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startup-rvds.o(RESET) refers to timer_1234.o(i.TIM1_UP_IRQHandler) for TIM1_UP_IRQHandler
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startup-rvds.o(RESET) refers to timer_1234.o(i.TIM1_CC_IRQHandler) for TIM1_CC_IRQHandler
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startup-rvds.o(RESET) refers to timer_1234.o(i.TIM2_IRQHandler) for TIM2_IRQHandler
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startup-rvds.o(RESET) refers to timer_1234.o(i.TIM3_IRQHandler) for TIM3_IRQHandler
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startup-rvds.o(RESET) refers to timer_1234.o(i.TIM4_IRQHandler) for TIM4_IRQHandler
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startup-rvds.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main
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dft.o(moncode) refers to tabsincos.o(Trigo) for TabCos
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son.o(moncode) refers to principal.o(.bss) for etat
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clock.o(i.CLOCK_Configure) refers to clock.o(i.CLOCK_HPRECompute) for CLOCK_HPRECompute
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timer_1234.o(i.Active_IT_Compare_Timer) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.Active_IT_Debordement_Timer) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.Capture_Init) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
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timer_1234.o(i.Capture_Init) refers to dfltui.o(.text) for __aeabi_ui2d
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timer_1234.o(i.Capture_Init) refers to f2d.o(.text) for __aeabi_f2d
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timer_1234.o(i.Capture_Init) refers to dmul.o(.text) for __aeabi_dmul
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timer_1234.o(i.Capture_Init) refers to ddiv.o(.text) for __aeabi_ddiv
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timer_1234.o(i.Capture_Init) refers to d2f.o(.text) for __aeabi_d2f
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timer_1234.o(i.Capture_Init) refers to ffltui.o(.text) for __aeabi_ui2f
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timer_1234.o(i.Capture_Init) refers to fmul.o(.text) for __aeabi_fmul
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timer_1234.o(i.Capture_Init) refers to ffixui.o(.text) for __aeabi_f2uiz
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timer_1234.o(i.Capture_Init) refers to ffixi.o(.text) for __aeabi_f2iz
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timer_1234.o(i.Lire_Duree_Pulse) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.PWM_Init) refers to f2d.o(.text) for __aeabi_f2d
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timer_1234.o(i.PWM_Init) refers to ddiv.o(.text) for __aeabi_ddiv
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timer_1234.o(i.PWM_Init) refers to d2f.o(.text) for __aeabi_d2f
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timer_1234.o(i.PWM_Init) refers to timer_1234.o(i.Timer_1234_Init) for Timer_1234_Init
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timer_1234.o(i.PWM_Init_ff) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
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timer_1234.o(i.TIM1_CC_IRQHandler) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.TIM1_UP_IRQHandler) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.TIM2_IRQHandler) refers to timer_1234.o(.data) for .data
|
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timer_1234.o(i.TIM3_IRQHandler) refers to timer_1234.o(.data) for .data
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timer_1234.o(i.TIM4_IRQHandler) refers to timer_1234.o(.data) for .data
|
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timer_1234.o(i.Timer_1234_Init) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
|
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timer_1234.o(i.Timer_1234_Init) refers to ffltui.o(.text) for __aeabi_ui2f
|
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timer_1234.o(i.Timer_1234_Init) refers to fmul.o(.text) for __aeabi_fmul
|
||||
timer_1234.o(i.Timer_1234_Init) refers to f2d.o(.text) for __aeabi_f2d
|
||||
timer_1234.o(i.Timer_1234_Init) refers to ddiv.o(.text) for __aeabi_ddiv
|
||||
timer_1234.o(i.Timer_1234_Init) refers to d2f.o(.text) for __aeabi_d2f
|
||||
timer_1234.o(i.Timer_1234_Init) refers to fscalb.o(.text) for __ARM_scalbnf
|
||||
timer_1234.o(i.Timer_1234_Init) refers to ffixui.o(.text) for __aeabi_f2uiz
|
||||
timer_1234.o(i.Timer_1234_Init) refers to fdiv.o(.text) for __aeabi_fdiv
|
||||
timer_1234.o(i.Timer_1234_Init) refers to dfltui.o(.text) for __aeabi_ui2d
|
||||
timer_1234.o(i.Timer_1234_Init) refers to dadd.o(.text) for __aeabi_dadd
|
||||
timer_1234.o(i.Timer_1234_Init) refers to dmul.o(.text) for __aeabi_dmul
|
||||
timer_1234.o(i.Timer_1234_Init_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
|
||||
timer_1234.o(i.Timer_1234_Init_ff) refers to clock.o(i.CLOCK_GetTIMCLK) for CLOCK_GetTIMCLK
|
||||
timer_systick.o(i.SysTick_Handler) refers to timer_systick.o(.data) for .data
|
||||
timer_systick.o(i.Systick_Period) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
|
||||
timer_systick.o(i.Systick_Period) refers to ffltui.o(.text) for __aeabi_ui2f
|
||||
timer_systick.o(i.Systick_Period) refers to fmul.o(.text) for __aeabi_fmul
|
||||
timer_systick.o(i.Systick_Period) refers to f2d.o(.text) for __aeabi_f2d
|
||||
timer_systick.o(i.Systick_Period) refers to ddiv.o(.text) for __aeabi_ddiv
|
||||
timer_systick.o(i.Systick_Period) refers to d2f.o(.text) for __aeabi_d2f
|
||||
timer_systick.o(i.Systick_Period) refers to ffixui.o(.text) for __aeabi_f2uiz
|
||||
timer_systick.o(i.Systick_Period) refers to fdiv.o(.text) for __aeabi_fdiv
|
||||
timer_systick.o(i.Systick_Period) refers to dmul.o(.text) for __aeabi_dmul
|
||||
timer_systick.o(i.Systick_Prio_IT) refers to timer_systick.o(.data) for .data
|
||||
adc_fake.o(i.Init_ADC1_DMA1) refers to adc_fake.o(.bss) for .bss
|
||||
adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
|
||||
adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to timer_1234.o(i.Timer_1234_Init_ff) for Timer_1234_Init_ff
|
||||
adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to timer_1234.o(i.Active_IT_Debordement_Timer) for Active_IT_Debordement_Timer
|
||||
adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to adc_fake.o(.bss) for .bss
|
||||
adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff) refers to adc_fake.o(i.fake_timer_callback) for fake_timer_callback
|
||||
adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to clock.o(i.CLOCK_GetADCCLK) for CLOCK_GetADCCLK
|
||||
adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to clock.o(i.CLOCK_GetHCLK) for CLOCK_GetHCLK
|
||||
adc_fake.o(i.Init_TimingADC_ActiveADC_ff) refers to adc_fake.o(.bss) for .bss
|
||||
adc_fake.o(i.Start_DMA1) refers to adc_fake.o(.bss) for .bss
|
||||
adc_fake.o(i.Wait_On_End_Of_DMA1) refers to adc_fake.o(.bss) for .bss
|
||||
adc_fake.o(i.Wait_On_End_Of_DMA1) refers to libcos.o(FakeTab) for LibCos
|
||||
adc_fake.o(i.fake_timer_callback) refers to adc_fake.o(.bss) for .bss
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload
|
||||
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk
|
||||
fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
fdiv.o(.text) refers to fepilogue.o(.text) for _float_round
|
||||
fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl
|
||||
dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr
|
||||
dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue
|
||||
dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue
|
||||
ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
ddiv.o(.text) refers to depilogue.o(.text) for _double_round
|
||||
ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue
|
||||
dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue
|
||||
ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp
|
||||
d2f.o(.text) refers to fepilogue.o(.text) for _float_round
|
||||
entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000
|
||||
entry2.o(.ARM.Collect$$$$00002712) refers to startup-rvds.o(STACK) for __initial_sp
|
||||
entry2.o(__vectab_stack_and_reset_area) refers to startup-rvds.o(STACK) for __initial_sp
|
||||
entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main
|
||||
entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload
|
||||
entry9a.o(.ARM.Collect$$$$0000000B) refers to principal.o(i.main) for main
|
||||
entry9b.o(.ARM.Collect$$$$0000000C) refers to principal.o(i.main) for main
|
||||
depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl
|
||||
depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr
|
||||
init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Removing Unused input sections from the image.
|
||||
|
||||
Removing principal.o(.rev16_text), (4 bytes).
|
||||
Removing principal.o(.revsh_text), (4 bytes).
|
||||
Removing principal.o(.rrx_text), (6 bytes).
|
||||
Removing startup-rvds.o(HEAP), (512 bytes).
|
||||
Removing son.o(madata), (4 bytes).
|
||||
Removing clock.o(.rev16_text), (4 bytes).
|
||||
Removing clock.o(.revsh_text), (4 bytes).
|
||||
Removing clock.o(.rrx_text), (6 bytes).
|
||||
Removing clock.o(i.CLOCK_GetPCLK1), (8 bytes).
|
||||
Removing clock.o(i.CLOCK_GetPCLK2), (8 bytes).
|
||||
Removing gpio.o(.rev16_text), (4 bytes).
|
||||
Removing gpio.o(.revsh_text), (4 bytes).
|
||||
Removing gpio.o(.rrx_text), (6 bytes).
|
||||
Removing timer_1234.o(.rev16_text), (4 bytes).
|
||||
Removing timer_1234.o(.revsh_text), (4 bytes).
|
||||
Removing timer_1234.o(.rrx_text), (6 bytes).
|
||||
Removing timer_1234.o(i.Active_IT_Compare_Timer), (492 bytes).
|
||||
Removing timer_1234.o(i.Capture_Init), (484 bytes).
|
||||
Removing timer_1234.o(i.Lire_Duree_Pulse), (96 bytes).
|
||||
Removing timer_1234.o(i.PWM_Complementaire_Timer1), (60 bytes).
|
||||
Removing timer_1234.o(i.PWM_Init), (200 bytes).
|
||||
Removing timer_1234.o(i.Timer_1234_Init), (268 bytes).
|
||||
Removing timer_1234.o(i.Timer_Inc_Init), (180 bytes).
|
||||
Removing timer_systick.o(.rev16_text), (4 bytes).
|
||||
Removing timer_systick.o(.revsh_text), (4 bytes).
|
||||
Removing timer_systick.o(.rrx_text), (6 bytes).
|
||||
Removing timer_systick.o(i.Systick_Period), (196 bytes).
|
||||
Removing adc_fake.o(.rev16_text), (4 bytes).
|
||||
Removing adc_fake.o(.revsh_text), (4 bytes).
|
||||
Removing adc_fake.o(.rrx_text), (6 bytes).
|
||||
Removing fmul.o(.text), (100 bytes).
|
||||
Removing fdiv.o(.text), (124 bytes).
|
||||
Removing fscalb.o(.text), (24 bytes).
|
||||
Removing dadd.o(.text), (334 bytes).
|
||||
Removing dmul.o(.text), (228 bytes).
|
||||
Removing ddiv.o(.text), (222 bytes).
|
||||
Removing ffltui.o(.text), (10 bytes).
|
||||
Removing dfltui.o(.text), (26 bytes).
|
||||
Removing ffixi.o(.text), (50 bytes).
|
||||
Removing ffixui.o(.text), (40 bytes).
|
||||
Removing f2d.o(.text), (38 bytes).
|
||||
Removing d2f.o(.text), (56 bytes).
|
||||
Removing fepilogue.o(.text), (110 bytes).
|
||||
Removing depilogue.o(.text), (186 bytes).
|
||||
|
||||
44 unused section(s) (total 4140 bytes) removed from the image.
|
||||
|
||||
==============================================================================
|
||||
|
||||
Adding Veneers to the image
|
||||
|
||||
Adding TT veneer (10 bytes, Long) for call to 'CalculM' from principal.o(i.sys_callback).
|
||||
|
||||
1 Veneer(s) (total 10 bytes) added to the image.
|
||||
|
||||
==============================================================================
|
||||
|
||||
Image Symbol Table
|
||||
|
||||
Local Symbols
|
||||
|
||||
Symbol Name Value Ov Type Size Object(Section)
|
||||
|
||||
../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE
|
||||
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE
|
||||
../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE
|
||||
../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE
|
||||
../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE
|
||||
../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE
|
||||
../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE
|
||||
../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE
|
||||
../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE
|
||||
../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE
|
||||
../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE
|
||||
../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE
|
||||
../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE
|
||||
../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE
|
||||
../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE
|
||||
../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE
|
||||
../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE
|
||||
../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE
|
||||
../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE
|
||||
../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE
|
||||
Lib\ADC_FAKE.c 0x00000000 Number 0 adc_fake.o ABSOLUTE
|
||||
Lib\GPIO.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
||||
Lib\Timer_1234.c 0x00000000 Number 0 timer_1234.o ABSOLUTE
|
||||
Lib\Timer_Systick.c 0x00000000 Number 0 timer_systick.o ABSOLUTE
|
||||
Lib\\ADC_FAKE.c 0x00000000 Number 0 adc_fake.o ABSOLUTE
|
||||
Lib\\GPIO.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
||||
Lib\\Timer_1234.c 0x00000000 Number 0 timer_1234.o ABSOLUTE
|
||||
Lib\\Timer_Systick.c 0x00000000 Number 0 timer_systick.o ABSOLUTE
|
||||
Lib\\clock.c 0x00000000 Number 0 clock.o ABSOLUTE
|
||||
Lib\clock.c 0x00000000 Number 0 clock.o ABSOLUTE
|
||||
Lib\libcos.asm 0x00000000 Number 0 libcos.o ABSOLUTE
|
||||
Src\Fichiers_DFT\DFT.s 0x00000000 Number 0 dft.o ABSOLUTE
|
||||
Src\Fichiers_DFT\TabSinCos.asm 0x00000000 Number 0 tabsincos.o ABSOLUTE
|
||||
Src\Fichiers_Son\Son.s 0x00000000 Number 0 son.o ABSOLUTE
|
||||
Src\Fichiers_Son\bruitverre.asm 0x00000000 Number 0 bruitverre.o ABSOLUTE
|
||||
Src\\principal.c 0x00000000 Number 0 principal.o ABSOLUTE
|
||||
Src\principal.c 0x00000000 Number 0 principal.o ABSOLUTE
|
||||
Src\startup-rvds.s 0x00000000 Number 0 startup-rvds.o ABSOLUTE
|
||||
dc.s 0x00000000 Number 0 dc.o ABSOLUTE
|
||||
handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE
|
||||
init.s 0x00000000 Number 0 init.o ABSOLUTE
|
||||
RESET 0x08000000 Section 236 startup-rvds.o(RESET)
|
||||
.ARM.Collect$$$$00000000 0x080000ec Section 0 entry.o(.ARM.Collect$$$$00000000)
|
||||
.ARM.Collect$$$$00000001 0x080000ec Section 4 entry2.o(.ARM.Collect$$$$00000001)
|
||||
.ARM.Collect$$$$00000004 0x080000f0 Section 4 entry5.o(.ARM.Collect$$$$00000004)
|
||||
.ARM.Collect$$$$00000008 0x080000f4 Section 0 entry7b.o(.ARM.Collect$$$$00000008)
|
||||
.ARM.Collect$$$$0000000A 0x080000f4 Section 0 entry8b.o(.ARM.Collect$$$$0000000A)
|
||||
.ARM.Collect$$$$0000000B 0x080000f4 Section 8 entry9a.o(.ARM.Collect$$$$0000000B)
|
||||
.ARM.Collect$$$$0000000D 0x080000fc Section 0 entry10a.o(.ARM.Collect$$$$0000000D)
|
||||
.ARM.Collect$$$$0000000F 0x080000fc Section 0 entry11a.o(.ARM.Collect$$$$0000000F)
|
||||
.ARM.Collect$$$$00002712 0x080000fc Section 4 entry2.o(.ARM.Collect$$$$00002712)
|
||||
__lit__00000000 0x080000fc Data 4 entry2.o(.ARM.Collect$$$$00002712)
|
||||
.text 0x08000100 Section 76 startup-rvds.o(.text)
|
||||
.text 0x0800014c Section 36 init.o(.text)
|
||||
.text 0x08000170 Section 0 __dczerorl2.o(.text)
|
||||
i.Active_IT_Debordement_Timer 0x080001d0 Section 0 timer_1234.o(i.Active_IT_Debordement_Timer)
|
||||
i.CLOCK_Configure 0x080002b4 Section 0 clock.o(i.CLOCK_Configure)
|
||||
i.CLOCK_GetADCCLK 0x08000328 Section 0 clock.o(i.CLOCK_GetADCCLK)
|
||||
i.CLOCK_GetHCLK 0x08000330 Section 0 clock.o(i.CLOCK_GetHCLK)
|
||||
i.CLOCK_GetTIMCLK 0x08000338 Section 0 clock.o(i.CLOCK_GetTIMCLK)
|
||||
i.CLOCK_HPRECompute 0x0800035c Section 0 clock.o(i.CLOCK_HPRECompute)
|
||||
CLOCK_HPRECompute 0x0800035d Thumb Code 116 clock.o(i.CLOCK_HPRECompute)
|
||||
i.GPIO_Configure 0x080003d0 Section 0 gpio.o(i.GPIO_Configure)
|
||||
i.Init_ADC1_DMA1 0x080004d8 Section 0 adc_fake.o(i.Init_ADC1_DMA1)
|
||||
i.Init_Conversion_On_Trig_Timer_ff 0x08000504 Section 0 adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff)
|
||||
i.Init_TimingADC_ActiveADC_ff 0x0800057c Section 0 adc_fake.o(i.Init_TimingADC_ActiveADC_ff)
|
||||
i.PWM_Init_ff 0x08000668 Section 0 timer_1234.o(i.PWM_Init_ff)
|
||||
i.Single_Channel_ADC 0x08000714 Section 0 adc_fake.o(i.Single_Channel_ADC)
|
||||
i.Start_DMA1 0x08000718 Section 0 adc_fake.o(i.Start_DMA1)
|
||||
i.SysTick_Handler 0x08000760 Section 0 timer_systick.o(i.SysTick_Handler)
|
||||
i.Systick_Period_ff 0x0800076c Section 0 timer_systick.o(i.Systick_Period_ff)
|
||||
i.Systick_Prio_IT 0x08000790 Section 0 timer_systick.o(i.Systick_Prio_IT)
|
||||
i.TIM1_CC_IRQHandler 0x080007a4 Section 0 timer_1234.o(i.TIM1_CC_IRQHandler)
|
||||
i.TIM1_UP_IRQHandler 0x080008b0 Section 0 timer_1234.o(i.TIM1_UP_IRQHandler)
|
||||
i.TIM2_IRQHandler 0x080008c8 Section 0 timer_1234.o(i.TIM2_IRQHandler)
|
||||
i.TIM3_IRQHandler 0x080009d8 Section 0 timer_1234.o(i.TIM3_IRQHandler)
|
||||
i.TIM4_IRQHandler 0x08000b04 Section 0 timer_1234.o(i.TIM4_IRQHandler)
|
||||
i.Timer_1234_Init_ff 0x08000c30 Section 0 timer_1234.o(i.Timer_1234_Init_ff)
|
||||
i.Wait_On_End_Of_DMA1 0x08000cac Section 0 adc_fake.o(i.Wait_On_End_Of_DMA1)
|
||||
i.__scatterload_copy 0x08000df8 Section 14 handlers.o(i.__scatterload_copy)
|
||||
i.__scatterload_null 0x08000e06 Section 2 handlers.o(i.__scatterload_null)
|
||||
i.__scatterload_zeroinit 0x08000e08 Section 14 handlers.o(i.__scatterload_zeroinit)
|
||||
i.fake_timer_callback 0x08000e18 Section 0 adc_fake.o(i.fake_timer_callback)
|
||||
i.main 0x08000e34 Section 0 principal.o(i.main)
|
||||
i.sys_callback 0x08000f48 Section 0 principal.o(i.sys_callback)
|
||||
moncode 0x08001080 Section 68 son.o(moncode)
|
||||
FakeTab 0x080010c4 Section 256 libcos.o(FakeTab)
|
||||
SecSon 0x080011e4 Section 11032 bruitverre.o(SecSon)
|
||||
moncode 0x20000000 Section 108 dft.o(moncode)
|
||||
calculReouIm 0x20000001 Thumb Code 62 dft.o(moncode)
|
||||
.data 0x2000006c Section 160 timer_1234.o(.data)
|
||||
Ptr_TIM1 0x2000007c Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM2 0x20000080 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM3 0x20000084 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM4 0x20000088 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM1_Voie1 0x2000008c Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM1_Voie2 0x20000090 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM1_Voie3 0x20000094 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM1_Voie4 0x20000098 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM2_Voie1 0x2000009c Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM2_Voie2 0x200000a0 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM2_Voie3 0x200000a4 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM2_Voie4 0x200000a8 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM3_Voie1 0x200000ac Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM3_Voie2 0x200000b0 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM3_Voie3 0x200000b4 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM3_Voie4 0x200000b8 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM4_Voie1 0x200000bc Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM4_Voie2 0x200000c0 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM4_Voie3 0x200000c4 Data 4 timer_1234.o(.data)
|
||||
Ptr_TIM4_Voie4 0x200000c8 Data 4 timer_1234.o(.data)
|
||||
Duree_Pulse_T1 0x200000cc Data 8 timer_1234.o(.data)
|
||||
Duree_Pulse_T2 0x200000d4 Data 8 timer_1234.o(.data)
|
||||
Duree_Pulse_T3 0x200000dc Data 8 timer_1234.o(.data)
|
||||
Duree_Pulse_T4 0x200000e4 Data 8 timer_1234.o(.data)
|
||||
Date_T1 0x200000ec Data 8 timer_1234.o(.data)
|
||||
Date_T2 0x200000f4 Data 8 timer_1234.o(.data)
|
||||
Date_T3 0x200000fc Data 8 timer_1234.o(.data)
|
||||
Date_T4 0x20000104 Data 8 timer_1234.o(.data)
|
||||
.data 0x2000010c Section 4 timer_systick.o(.data)
|
||||
Ptr_Systick 0x2000010c Data 4 timer_systick.o(.data)
|
||||
Trigo 0x20000110 Section 256 tabsincos.o(Trigo)
|
||||
.bss 0x20000210 Section 452 principal.o(.bss)
|
||||
.bss 0x200003d4 Section 84 adc_fake.o(.bss)
|
||||
F 0x200003d4 Data 84 adc_fake.o(.bss)
|
||||
STACK 0x20000428 Section 1024 startup-rvds.o(STACK)
|
||||
|
||||
Global Symbols
|
||||
|
||||
Symbol Name Value Ov Type Size Object(Section)
|
||||
|
||||
BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$EBA8$MICROLIB$REQ8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE
|
||||
__ARM_use_no_argv 0x00000000 Number 0 principal.o ABSOLUTE
|
||||
__cpp_initialize__aeabi_ - Undefined Weak Reference
|
||||
__cxa_finalize - Undefined Weak Reference
|
||||
_clock_init - Undefined Weak Reference
|
||||
_microlib_exit - Undefined Weak Reference
|
||||
__Vectors_Size 0x000000ec Number 0 startup-rvds.o ABSOLUTE
|
||||
__Vectors 0x08000000 Data 4 startup-rvds.o(RESET)
|
||||
__Vectors_End 0x080000ec Data 0 startup-rvds.o(RESET)
|
||||
__main 0x080000ed Thumb Code 0 entry.o(.ARM.Collect$$$$00000000)
|
||||
_main_stk 0x080000ed Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001)
|
||||
_main_scatterload 0x080000f1 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
|
||||
__main_after_scatterload 0x080000f5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
|
||||
_main_clock 0x080000f5 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008)
|
||||
_main_cpp_init 0x080000f5 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A)
|
||||
_main_init 0x080000f5 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B)
|
||||
__rt_final_cpp 0x080000fd Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D)
|
||||
__rt_final_exit 0x080000fd Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F)
|
||||
Reset_Handler 0x08000101 Thumb Code 34 startup-rvds.o(.text)
|
||||
SystemInit 0x08000123 Thumb Code 2 startup-rvds.o(.text)
|
||||
NMI_Handler 0x08000125 Thumb Code 2 startup-rvds.o(.text)
|
||||
HardFault_Handler 0x08000127 Thumb Code 2 startup-rvds.o(.text)
|
||||
MemManage_Handler 0x08000129 Thumb Code 2 startup-rvds.o(.text)
|
||||
BusFault_Handler 0x0800012b Thumb Code 2 startup-rvds.o(.text)
|
||||
UsageFault_Handler 0x0800012d Thumb Code 2 startup-rvds.o(.text)
|
||||
SVC_Handler 0x0800012f Thumb Code 2 startup-rvds.o(.text)
|
||||
DebugMon_Handler 0x08000131 Thumb Code 2 startup-rvds.o(.text)
|
||||
PendSV_Handler 0x08000133 Thumb Code 2 startup-rvds.o(.text)
|
||||
ADC1_2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
CAN1_RX1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
CAN1_SCE_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel6_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
DMA1_Channel7_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI15_10_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
EXTI9_5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
FLASH_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
I2C1_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
I2C1_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
I2C2_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
I2C2_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
PVD_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
RCC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
RTCAlarm_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
RTC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
SPI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
SPI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
TAMPER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
TIM1_BRK_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
TIM1_TRG_COM_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USART1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USART2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USART3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USBWakeUp_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USB_HP_CAN1_TX_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
USB_LP_CAN1_RX0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
WWDG_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
|
||||
__scatterload 0x0800014d Thumb Code 28 init.o(.text)
|
||||
__scatterload_rt2 0x0800014d Thumb Code 0 init.o(.text)
|
||||
__decompress 0x08000171 Thumb Code 0 __dczerorl2.o(.text)
|
||||
__decompress1 0x08000171 Thumb Code 86 __dczerorl2.o(.text)
|
||||
Long Thumb to Thumb Veneer to CalculM 0x080001c7 Thumb Code 10 anon$$obj.o(Veneer$$Code)
|
||||
Active_IT_Debordement_Timer 0x080001d1 Thumb Code 204 timer_1234.o(i.Active_IT_Debordement_Timer)
|
||||
CLOCK_Configure 0x080002b5 Thumb Code 104 clock.o(i.CLOCK_Configure)
|
||||
CLOCK_GetADCCLK 0x08000329 Thumb Code 4 clock.o(i.CLOCK_GetADCCLK)
|
||||
CLOCK_GetHCLK 0x08000331 Thumb Code 4 clock.o(i.CLOCK_GetHCLK)
|
||||
CLOCK_GetTIMCLK 0x08000339 Thumb Code 22 clock.o(i.CLOCK_GetTIMCLK)
|
||||
GPIO_Configure 0x080003d1 Thumb Code 240 gpio.o(i.GPIO_Configure)
|
||||
Init_ADC1_DMA1 0x080004d9 Thumb Code 38 adc_fake.o(i.Init_ADC1_DMA1)
|
||||
Init_Conversion_On_Trig_Timer_ff 0x08000505 Thumb Code 104 adc_fake.o(i.Init_Conversion_On_Trig_Timer_ff)
|
||||
Init_TimingADC_ActiveADC_ff 0x0800057d Thumb Code 230 adc_fake.o(i.Init_TimingADC_ActiveADC_ff)
|
||||
PWM_Init_ff 0x08000669 Thumb Code 168 timer_1234.o(i.PWM_Init_ff)
|
||||
Single_Channel_ADC 0x08000715 Thumb Code 2 adc_fake.o(i.Single_Channel_ADC)
|
||||
Start_DMA1 0x08000719 Thumb Code 66 adc_fake.o(i.Start_DMA1)
|
||||
SysTick_Handler 0x08000761 Thumb Code 6 timer_systick.o(i.SysTick_Handler)
|
||||
Systick_Period_ff 0x0800076d Thumb Code 34 timer_systick.o(i.Systick_Period_ff)
|
||||
Systick_Prio_IT 0x08000791 Thumb Code 12 timer_systick.o(i.Systick_Prio_IT)
|
||||
TIM1_CC_IRQHandler 0x080007a5 Thumb Code 240 timer_1234.o(i.TIM1_CC_IRQHandler)
|
||||
TIM1_UP_IRQHandler 0x080008b1 Thumb Code 16 timer_1234.o(i.TIM1_UP_IRQHandler)
|
||||
TIM2_IRQHandler 0x080008c9 Thumb Code 266 timer_1234.o(i.TIM2_IRQHandler)
|
||||
TIM3_IRQHandler 0x080009d9 Thumb Code 272 timer_1234.o(i.TIM3_IRQHandler)
|
||||
TIM4_IRQHandler 0x08000b05 Thumb Code 272 timer_1234.o(i.TIM4_IRQHandler)
|
||||
Timer_1234_Init_ff 0x08000c31 Thumb Code 106 timer_1234.o(i.Timer_1234_Init_ff)
|
||||
Wait_On_End_Of_DMA1 0x08000cad Thumb Code 320 adc_fake.o(i.Wait_On_End_Of_DMA1)
|
||||
__scatterload_copy 0x08000df9 Thumb Code 14 handlers.o(i.__scatterload_copy)
|
||||
__scatterload_null 0x08000e07 Thumb Code 2 handlers.o(i.__scatterload_null)
|
||||
__scatterload_zeroinit 0x08000e09 Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
|
||||
fake_timer_callback 0x08000e19 Thumb Code 22 adc_fake.o(i.fake_timer_callback)
|
||||
main 0x08000e35 Thumb Code 224 principal.o(i.main)
|
||||
sys_callback 0x08000f49 Thumb Code 280 principal.o(i.sys_callback)
|
||||
timer_callback 0x08001081 Thumb Code 60 son.o(moncode)
|
||||
LibCos 0x080010c4 Data 0 libcos.o(FakeTab)
|
||||
LibNoise 0x08001144 Data 0 libcos.o(FakeTab)
|
||||
Region$$Table$$Base 0x080011c4 Number 0 anon$$obj.o(Region$$Table)
|
||||
LongueurSon 0x080011e4 Data 4 bruitverre.o(SecSon)
|
||||
Region$$Table$$Limit 0x080011e4 Number 0 anon$$obj.o(Region$$Table)
|
||||
PeriodeSonMicroSec 0x080011e8 Data 4 bruitverre.o(SecSon)
|
||||
Son 0x080011ec Data 0 bruitverre.o(SecSon)
|
||||
CalculM 0x2000003f Thumb Code 38 dft.o(moncode)
|
||||
Enable_Fct_IT_Compare_Match_TIM1_Voie1 0x2000006c Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM1_Voie2 0x2000006d Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM1_Voie3 0x2000006e Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM1_Voie4 0x2000006f Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM2_Voie1 0x20000070 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM2_Voie2 0x20000071 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM2_Voie3 0x20000072 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM2_Voie4 0x20000073 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM3_Voie1 0x20000074 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM3_Voie2 0x20000075 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM3_Voie3 0x20000076 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM3_Voie4 0x20000077 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM4_Voie1 0x20000078 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM4_Voie2 0x20000079 Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM4_Voie3 0x2000007a Data 1 timer_1234.o(.data)
|
||||
Enable_Fct_IT_Compare_Match_TIM4_Voie4 0x2000007b Data 1 timer_1234.o(.data)
|
||||
TabCos 0x20000110 Data 0 tabsincos.o(Trigo)
|
||||
TabSin 0x20000190 Data 0 tabsincos.o(Trigo)
|
||||
etat 0x20000210 Data 20 principal.o(.bss)
|
||||
dma_buf 0x20000224 Data 128 principal.o(.bss)
|
||||
compteur 0x200002a4 Data 24 principal.o(.bss)
|
||||
point 0x200002bc Data 24 principal.o(.bss)
|
||||
M2 0x200002d4 Data 256 principal.o(.bss)
|
||||
__initial_sp 0x20000828 Data 0 startup-rvds.o(STACK)
|
||||
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Memory Map of the image
|
||||
|
||||
Image Entry point : 0x080000ed
|
||||
|
||||
Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00003f0c, Max: 0x00020000, ABSOLUTE, COMPRESSED[0x00003df4])
|
||||
|
||||
Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00003cfc, Max: 0x00020000, ABSOLUTE)
|
||||
|
||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x08000000 0x08000000 0x000000ec Data RO 71 RESET startup-rvds.o
|
||||
0x080000ec 0x080000ec 0x00000000 Code RO 189 * .ARM.Collect$$$$00000000 mc_w.l(entry.o)
|
||||
0x080000ec 0x080000ec 0x00000004 Code RO 216 .ARM.Collect$$$$00000001 mc_w.l(entry2.o)
|
||||
0x080000f0 0x080000f0 0x00000004 Code RO 219 .ARM.Collect$$$$00000004 mc_w.l(entry5.o)
|
||||
0x080000f4 0x080000f4 0x00000000 Code RO 221 .ARM.Collect$$$$00000008 mc_w.l(entry7b.o)
|
||||
0x080000f4 0x080000f4 0x00000000 Code RO 223 .ARM.Collect$$$$0000000A mc_w.l(entry8b.o)
|
||||
0x080000f4 0x080000f4 0x00000008 Code RO 224 .ARM.Collect$$$$0000000B mc_w.l(entry9a.o)
|
||||
0x080000fc 0x080000fc 0x00000000 Code RO 226 .ARM.Collect$$$$0000000D mc_w.l(entry10a.o)
|
||||
0x080000fc 0x080000fc 0x00000000 Code RO 228 .ARM.Collect$$$$0000000F mc_w.l(entry11a.o)
|
||||
0x080000fc 0x080000fc 0x00000004 Code RO 217 .ARM.Collect$$$$00002712 mc_w.l(entry2.o)
|
||||
0x08000100 0x08000100 0x0000004c Code RO 72 .text startup-rvds.o
|
||||
0x0800014c 0x0800014c 0x00000024 Code RO 239 .text mc_w.l(init.o)
|
||||
0x08000170 0x08000170 0x00000056 Code RO 251 .text mc_w.l(__dczerorl2.o)
|
||||
0x080001c6 0x080001c6 0x0000000a Ven RO 253 Veneer$$Code anon$$obj.o
|
||||
0x080001d0 0x080001d0 0x000000e4 Code RO 119 i.Active_IT_Debordement_Timer gfssp72.lib(timer_1234.o)
|
||||
0x080002b4 0x080002b4 0x00000074 Code RO 90 i.CLOCK_Configure gfssp72.lib(clock.o)
|
||||
0x08000328 0x08000328 0x00000008 Code RO 91 i.CLOCK_GetADCCLK gfssp72.lib(clock.o)
|
||||
0x08000330 0x08000330 0x00000008 Code RO 92 i.CLOCK_GetHCLK gfssp72.lib(clock.o)
|
||||
0x08000338 0x08000338 0x00000024 Code RO 95 i.CLOCK_GetTIMCLK gfssp72.lib(clock.o)
|
||||
0x0800035c 0x0800035c 0x00000074 Code RO 96 i.CLOCK_HPRECompute gfssp72.lib(clock.o)
|
||||
0x080003d0 0x080003d0 0x00000108 Code RO 110 i.GPIO_Configure gfssp72.lib(gpio.o)
|
||||
0x080004d8 0x080004d8 0x0000002c Code RO 170 i.Init_ADC1_DMA1 gfssp72.lib(adc_fake.o)
|
||||
0x08000504 0x08000504 0x00000078 Code RO 171 i.Init_Conversion_On_Trig_Timer_ff gfssp72.lib(adc_fake.o)
|
||||
0x0800057c 0x0800057c 0x000000ec Code RO 172 i.Init_TimingADC_ActiveADC_ff gfssp72.lib(adc_fake.o)
|
||||
0x08000668 0x08000668 0x000000ac Code RO 124 i.PWM_Init_ff gfssp72.lib(timer_1234.o)
|
||||
0x08000714 0x08000714 0x00000002 Code RO 173 i.Single_Channel_ADC gfssp72.lib(adc_fake.o)
|
||||
0x08000716 0x08000716 0x00000002 PAD
|
||||
0x08000718 0x08000718 0x00000048 Code RO 174 i.Start_DMA1 gfssp72.lib(adc_fake.o)
|
||||
0x08000760 0x08000760 0x0000000c Code RO 155 i.SysTick_Handler gfssp72.lib(timer_systick.o)
|
||||
0x0800076c 0x0800076c 0x00000022 Code RO 157 i.Systick_Period_ff gfssp72.lib(timer_systick.o)
|
||||
0x0800078e 0x0800078e 0x00000002 PAD
|
||||
0x08000790 0x08000790 0x00000014 Code RO 158 i.Systick_Prio_IT gfssp72.lib(timer_systick.o)
|
||||
0x080007a4 0x080007a4 0x0000010c Code RO 125 i.TIM1_CC_IRQHandler gfssp72.lib(timer_1234.o)
|
||||
0x080008b0 0x080008b0 0x00000018 Code RO 126 i.TIM1_UP_IRQHandler gfssp72.lib(timer_1234.o)
|
||||
0x080008c8 0x080008c8 0x00000110 Code RO 127 i.TIM2_IRQHandler gfssp72.lib(timer_1234.o)
|
||||
0x080009d8 0x080009d8 0x0000012c Code RO 128 i.TIM3_IRQHandler gfssp72.lib(timer_1234.o)
|
||||
0x08000b04 0x08000b04 0x0000012c Code RO 129 i.TIM4_IRQHandler gfssp72.lib(timer_1234.o)
|
||||
0x08000c30 0x08000c30 0x0000007c Code RO 131 i.Timer_1234_Init_ff gfssp72.lib(timer_1234.o)
|
||||
0x08000cac 0x08000cac 0x0000014c Code RO 175 i.Wait_On_End_Of_DMA1 gfssp72.lib(adc_fake.o)
|
||||
0x08000df8 0x08000df8 0x0000000e Code RO 245 i.__scatterload_copy mc_w.l(handlers.o)
|
||||
0x08000e06 0x08000e06 0x00000002 Code RO 246 i.__scatterload_null mc_w.l(handlers.o)
|
||||
0x08000e08 0x08000e08 0x0000000e Code RO 247 i.__scatterload_zeroinit mc_w.l(handlers.o)
|
||||
0x08000e16 0x08000e16 0x00000002 PAD
|
||||
0x08000e18 0x08000e18 0x0000001c Code RO 176 i.fake_timer_callback gfssp72.lib(adc_fake.o)
|
||||
0x08000e34 0x08000e34 0x00000114 Code RO 4 i.main principal.o
|
||||
0x08000f48 0x08000f48 0x00000138 Code RO 5 i.sys_callback principal.o
|
||||
0x08001080 0x08001080 0x00000044 Code RO 83 moncode son.o
|
||||
0x080010c4 0x080010c4 0x00000100 Data RO 188 FakeTab gfssp72.lib(libcos.o)
|
||||
0x080011c4 0x080011c4 0x00000020 Data RO 243 Region$$Table anon$$obj.o
|
||||
0x080011e4 0x080011e4 0x00002b18 Data RO 81 SecSon bruitverre.o
|
||||
|
||||
|
||||
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08003cfc, Size: 0x00000828, Max: 0x00005000, ABSOLUTE, COMPRESSED[0x000000f8])
|
||||
|
||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x20000000 COMPRESSED 0x0000006c Code RW 76 moncode dft.o
|
||||
0x2000006c COMPRESSED 0x000000a0 Data RW 133 .data gfssp72.lib(timer_1234.o)
|
||||
0x2000010c COMPRESSED 0x00000004 Data RW 159 .data gfssp72.lib(timer_systick.o)
|
||||
0x20000110 COMPRESSED 0x00000100 Data RW 80 Trigo tabsincos.o
|
||||
0x20000210 - 0x000001c4 Zero RW 6 .bss principal.o
|
||||
0x200003d4 - 0x00000054 Zero RW 177 .bss gfssp72.lib(adc_fake.o)
|
||||
0x20000428 - 0x00000400 Zero RW 69 STACK startup-rvds.o
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Image component sizes
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
||||
|
||||
0 0 11032 0 0 0 bruitverre.o
|
||||
108 8 0 0 0 384 dft.o
|
||||
588 100 0 0 452 3804 principal.o
|
||||
68 8 0 0 0 340 son.o
|
||||
76 20 236 0 1024 788 startup-rvds.o
|
||||
0 0 0 256 0 0 tabsincos.o
|
||||
|
||||
----------------------------------------------------------------------
|
||||
850 136 11300 256 1476 5316 Object Totals
|
||||
10 0 32 0 0 0 (incl. Generated)
|
||||
0 0 0 0 0 0 (incl. Padding)
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
|
||||
|
||||
834 58 0 0 84 528 adc_fake.o
|
||||
284 34 0 0 0 352 clock.o
|
||||
264 24 0 0 0 84 gpio.o
|
||||
0 0 256 0 0 0 libcos.o
|
||||
1688 144 0 160 0 672 timer_1234.o
|
||||
66 14 0 4 0 204 timer_systick.o
|
||||
86 0 0 0 0 0 __dczerorl2.o
|
||||
0 0 0 0 0 0 entry.o
|
||||
0 0 0 0 0 0 entry10a.o
|
||||
0 0 0 0 0 0 entry11a.o
|
||||
8 4 0 0 0 0 entry2.o
|
||||
4 0 0 0 0 0 entry5.o
|
||||
0 0 0 0 0 0 entry7b.o
|
||||
0 0 0 0 0 0 entry8b.o
|
||||
8 4 0 0 0 0 entry9a.o
|
||||
30 0 0 0 0 0 handlers.o
|
||||
36 8 0 0 0 68 init.o
|
||||
|
||||
----------------------------------------------------------------------
|
||||
3314 290 256 164 84 1908 Library Totals
|
||||
6 0 0 0 0 0 (incl. Padding)
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
|
||||
|
||||
3136 274 256 164 84 1840 gfssp72.lib
|
||||
172 16 0 0 0 68 mc_w.l
|
||||
|
||||
----------------------------------------------------------------------
|
||||
3314 290 256 164 84 1908 Library Totals
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
==============================================================================
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug
|
||||
|
||||
4164 426 11556 420 1560 6208 Grand Totals
|
||||
4164 426 11556 248 1560 6208 ELF Image Totals (compressed)
|
||||
4164 426 11556 248 0 0 ROM Totals
|
||||
|
||||
==============================================================================
|
||||
|
||||
Total RO Size (Code + RO Data) 15720 ( 15.35kB)
|
||||
Total RW Size (RW Data + ZI Data) 1980 ( 1.93kB)
|
||||
Total ROM Size (Code + RO Data + RW Data) 15968 ( 15.59kB)
|
||||
|
||||
==============================================================================
|
||||
|
15
Obj_4/Obj/CHTI.sct
Звичайний файл
15
Obj_4/Obj/CHTI.sct
Звичайний файл
|
@ -0,0 +1,15 @@
|
|||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00005000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
BIN
Obj_4/Obj/principal.crf
Звичайний файл
BIN
Obj_4/Obj/principal.crf
Звичайний файл
Бінарний файл не відображається.
396
Obj_4/Project.uvoptx
Звичайний файл
396
Obj_4/Project.uvoptx
Звичайний файл
|
@ -0,0 +1,396 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>Simu</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>8000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath></ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>18</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>1</uSim>
|
||||
<uTrg>0</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>1</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>5</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGDARM</Key>
|
||||
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=719,154,1140,581,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMRTXEVENTFLAGS</Key>
|
||||
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTARM</Key>
|
||||
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name>-T0</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGUARM</Key>
|
||||
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<WatchWindow1>
|
||||
<Ww>
|
||||
<count>0</count>
|
||||
<WinNumber>1</WinNumber>
|
||||
<ItemText>point</ItemText>
|
||||
</Ww>
|
||||
</WatchWindow1>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>1</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>1</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>1</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<LogicAnalyzers>
|
||||
<Wi>
|
||||
<IntNumber>0</IntNumber>
|
||||
<FirstString>`TIM3_CCR3</FirstString>
|
||||
<SecondString>00008000000000000000000000000000000074400000000000000000000000000000000054494D335F4343523300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000001000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>1</IntNumber>
|
||||
<FirstString>`point[0]</FirstString>
|
||||
<SecondString>000000000000000000000000000000000000F03F00000000000000000000000000000000706F696E745B305D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000002000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>2</IntNumber>
|
||||
<FirstString>`point[1]</FirstString>
|
||||
<SecondString>FF0000000000000000000000000000000000004000000000000000000000000000000000706F696E745B315D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000003000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>3</IntNumber>
|
||||
<FirstString>`point[2]</FirstString>
|
||||
<SecondString>008000000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B325D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000004000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>4</IntNumber>
|
||||
<FirstString>`point[3]</FirstString>
|
||||
<SecondString>000080000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B335D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000005000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>5</IntNumber>
|
||||
<FirstString>`point[4]</FirstString>
|
||||
<SecondString>000000000000C0FFFFFFDFC10000C0FFFFFFDF4100000000000000000000000000000000706F696E745B345D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000006000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
<Wi>
|
||||
<IntNumber>6</IntNumber>
|
||||
<FirstString>`point[5]</FirstString>
|
||||
<SecondString>FF0000000000000000000000000000000000084000000000000000000000000000000000706F696E745B355D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000007000000922449922449C23F1500000000000000000000000000000000000000340E0008</SecondString>
|
||||
</Wi>
|
||||
</LogicAnalyzers>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\principal.c</PathWithFileName>
|
||||
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Sys</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>DFT</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\Fichiers_DFT\DFT.s</PathWithFileName>
|
||||
<FilenameWithoutPath>DFT.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\Fichiers_DFT\TabSinCos.asm</PathWithFileName>
|
||||
<FilenameWithoutPath>TabSinCos.asm</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Son</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\Fichiers_Son\bruitverre.asm</PathWithFileName>
|
||||
<FilenameWithoutPath>bruitverre.asm</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\Fichiers_Son\Son.s</PathWithFileName>
|
||||
<FilenameWithoutPath>Son.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>4</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Librairie\GFSSP72\gfssp72.lib</PathWithFileName>
|
||||
<FilenameWithoutPath>gfssp72.lib</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Librairie\etat\etat.inc</PathWithFileName>
|
||||
<FilenameWithoutPath>etat.inc</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
466
Obj_4/Project.uvprojx
Звичайний файл
466
Obj_4/Project.uvprojx
Звичайний файл
|
@ -0,0 +1,466 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Simu</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F103RB</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F1xx_DFP.2.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Obj\</OutputDirectory>
|
||||
<OutputName>CHTI</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath></ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP</SimDllArguments>
|
||||
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4100</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--C99</MiscControls>
|
||||
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>.\Librairie\GFSSP72;.\Librairie\etat</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>principal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\Src\principal.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Sys</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup-rvds.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\startup-rvds.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>DFT</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DFT.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\Fichiers_DFT\DFT.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>TabSinCos.asm</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\Fichiers_DFT\TabSinCos.asm</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Son</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>bruitverre.asm</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\Fichiers_Son\bruitverre.asm</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>Son.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\Fichiers_Son\Son.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>gfssp72.lib</FileName>
|
||||
<FileType>4</FileType>
|
||||
<FilePath>.\Librairie\GFSSP72\gfssp72.lib</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>etat.inc</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\Librairie\etat\etat.inc</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Simu"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
61
Obj_4/Src/Fichiers_DFT/DFT.s
Звичайний файл
61
Obj_4/Src/Fichiers_DFT/DFT.s
Звичайний файл
|
@ -0,0 +1,61 @@
|
|||
; AFONSO Perrine LARTIGUE Auriane
|
||||
thumb
|
||||
area moncode, code, readwrite
|
||||
|
||||
import TabSin
|
||||
import TabCos
|
||||
|
||||
export CalculM
|
||||
|
||||
|
||||
calculReouIm proc ; procedure permettant de calculer imaginaire ou reel
|
||||
; ro contient la valeur de k
|
||||
; r1 contient adresse de TabSig
|
||||
; r2 contient adresse de TabCos ou Tabsin
|
||||
mov r3 , #0x00 ; r3 va nous servir de compteur i
|
||||
mov r12, #0x00 ; va contenir le resultat temporairement
|
||||
comparaison cmp r3, #64 ; on compare i a 64
|
||||
bne loop
|
||||
b fin
|
||||
loop
|
||||
push {r0}
|
||||
push{r12}; on garde l'ancienne contenu dans r12
|
||||
mul r0, r0 , r3 ; i*k
|
||||
and r0, #0x3F ; contient i*k modulo 64
|
||||
ldrsh r12 , [r2, r0 , LSL #0x01] ; cos(i*k*2 pi / N)
|
||||
mov r0 , r12
|
||||
ldrsh r12 , [r1, r3 , LSL #0x01] ; x(i)
|
||||
mul r12 , r12 , r0 ; x(i)* cos(i*k*2 pi / N)
|
||||
add r3 , #0x01 ; on incremente le compteur i
|
||||
mov r0, r12
|
||||
pop{r12}
|
||||
add r12, r0
|
||||
pop {r0}
|
||||
b comparaison ; on reboucle
|
||||
fin
|
||||
mov r0 , r12 ; on stocke le resultat final dans r0
|
||||
bx lr
|
||||
endp
|
||||
|
||||
|
||||
CalculM proc
|
||||
; k dans r0
|
||||
; Signal dans r1
|
||||
ldr r2, =TabCos ; adresse de TabCos dans le registre r2
|
||||
push{LR,r0}
|
||||
bl calculReouIm
|
||||
mov r3, r0; Re dan r3
|
||||
pop{r0}
|
||||
push {r3}
|
||||
ldr r2, =TabSin ; adresse de TabSin dans le registre r2
|
||||
bl calculReouIm
|
||||
mov r12 , r0 ; Im dans r12
|
||||
pop{r3}
|
||||
smull r1, r2, r3 , r3 ; Re^2
|
||||
smlal r1, r2, r12 , r12; Re^2 +Im^2
|
||||
mov r0, r2 ; on stocke le resultat dans r2
|
||||
pop{PC}
|
||||
bx lr
|
||||
endp
|
||||
|
||||
end
|
136
Obj_4/Src/Fichiers_DFT/TabSinCos.asm
Звичайний файл
136
Obj_4/Src/Fichiers_DFT/TabSinCos.asm
Звичайний файл
|
@ -0,0 +1,136 @@
|
|||
AREA Trigo, DATA, READWRITE
|
||||
export TabSin
|
||||
export TabCos
|
||||
|
||||
TabCos
|
||||
DCW 32767 ; 0 0x7fff 0.99997
|
||||
DCW 32610 ; 1 0x7f62 0.99518
|
||||
DCW 32138 ; 2 0x7d8a 0.98077
|
||||
DCW 31357 ; 3 0x7a7d 0.95694
|
||||
DCW 30274 ; 4 0x7642 0.92389
|
||||
DCW 28899 ; 5 0x70e3 0.88193
|
||||
DCW 27246 ; 6 0x6a6e 0.83148
|
||||
DCW 25330 ; 7 0x62f2 0.77301
|
||||
DCW 23170 ; 8 0x5a82 0.70709
|
||||
DCW 20788 ; 9 0x5134 0.63440
|
||||
DCW 18205 ; 10 0x471d 0.55557
|
||||
DCW 15447 ; 11 0x3c57 0.47141
|
||||
DCW 12540 ; 12 0x30fc 0.38269
|
||||
DCW 9512 ; 13 0x2528 0.29028
|
||||
DCW 6393 ; 14 0x18f9 0.19510
|
||||
DCW 3212 ; 15 0x0c8c 0.09802
|
||||
DCW 0 ; 16 0x0000 0.00000
|
||||
DCW -3212 ; 17 0xf374 -0.09802
|
||||
DCW -6393 ; 18 0xe707 -0.19510
|
||||
DCW -9512 ; 19 0xdad8 -0.29028
|
||||
DCW -12540 ; 20 0xcf04 -0.38269
|
||||
DCW -15447 ; 21 0xc3a9 -0.47141
|
||||
DCW -18205 ; 22 0xb8e3 -0.55557
|
||||
DCW -20788 ; 23 0xaecc -0.63440
|
||||
DCW -23170 ; 24 0xa57e -0.70709
|
||||
DCW -25330 ; 25 0x9d0e -0.77301
|
||||
DCW -27246 ; 26 0x9592 -0.83148
|
||||
DCW -28899 ; 27 0x8f1d -0.88193
|
||||
DCW -30274 ; 28 0x89be -0.92389
|
||||
DCW -31357 ; 29 0x8583 -0.95694
|
||||
DCW -32138 ; 30 0x8276 -0.98077
|
||||
DCW -32610 ; 31 0x809e -0.99518
|
||||
DCW -32768 ; 32 0x8000 -1.00000
|
||||
DCW -32610 ; 33 0x809e -0.99518
|
||||
DCW -32138 ; 34 0x8276 -0.98077
|
||||
DCW -31357 ; 35 0x8583 -0.95694
|
||||
DCW -30274 ; 36 0x89be -0.92389
|
||||
DCW -28899 ; 37 0x8f1d -0.88193
|
||||
DCW -27246 ; 38 0x9592 -0.83148
|
||||
DCW -25330 ; 39 0x9d0e -0.77301
|
||||
DCW -23170 ; 40 0xa57e -0.70709
|
||||
DCW -20788 ; 41 0xaecc -0.63440
|
||||
DCW -18205 ; 42 0xb8e3 -0.55557
|
||||
DCW -15447 ; 43 0xc3a9 -0.47141
|
||||
DCW -12540 ; 44 0xcf04 -0.38269
|
||||
DCW -9512 ; 45 0xdad8 -0.29028
|
||||
DCW -6393 ; 46 0xe707 -0.19510
|
||||
DCW -3212 ; 47 0xf374 -0.09802
|
||||
DCW 0 ; 48 0x0000 0.00000
|
||||
DCW 3212 ; 49 0x0c8c 0.09802
|
||||
DCW 6393 ; 50 0x18f9 0.19510
|
||||
DCW 9512 ; 51 0x2528 0.29028
|
||||
DCW 12540 ; 52 0x30fc 0.38269
|
||||
DCW 15447 ; 53 0x3c57 0.47141
|
||||
DCW 18205 ; 54 0x471d 0.55557
|
||||
DCW 20788 ; 55 0x5134 0.63440
|
||||
DCW 23170 ; 56 0x5a82 0.70709
|
||||
DCW 25330 ; 57 0x62f2 0.77301
|
||||
DCW 27246 ; 58 0x6a6e 0.83148
|
||||
DCW 28899 ; 59 0x70e3 0.88193
|
||||
DCW 30274 ; 60 0x7642 0.92389
|
||||
DCW 31357 ; 61 0x7a7d 0.95694
|
||||
DCW 32138 ; 62 0x7d8a 0.98077
|
||||
DCW 32610 ; 63 0x7f62 0.99518
|
||||
TabSin
|
||||
DCW 0 ; 0 0x0000 0.00000
|
||||
DCW 3212 ; 1 0x0c8c 0.09802
|
||||
DCW 6393 ; 2 0x18f9 0.19510
|
||||
DCW 9512 ; 3 0x2528 0.29028
|
||||
DCW 12540 ; 4 0x30fc 0.38269
|
||||
DCW 15447 ; 5 0x3c57 0.47141
|
||||
DCW 18205 ; 6 0x471d 0.55557
|
||||
DCW 20788 ; 7 0x5134 0.63440
|
||||
DCW 23170 ; 8 0x5a82 0.70709
|
||||
DCW 25330 ; 9 0x62f2 0.77301
|
||||
DCW 27246 ; 10 0x6a6e 0.83148
|
||||
DCW 28899 ; 11 0x70e3 0.88193
|
||||
DCW 30274 ; 12 0x7642 0.92389
|
||||
DCW 31357 ; 13 0x7a7d 0.95694
|
||||
DCW 32138 ; 14 0x7d8a 0.98077
|
||||
DCW 32610 ; 15 0x7f62 0.99518
|
||||
DCW 32767 ; 16 0x7fff 0.99997
|
||||
DCW 32610 ; 17 0x7f62 0.99518
|
||||
DCW 32138 ; 18 0x7d8a 0.98077
|
||||
DCW 31357 ; 19 0x7a7d 0.95694
|
||||
DCW 30274 ; 20 0x7642 0.92389
|
||||
DCW 28899 ; 21 0x70e3 0.88193
|
||||
DCW 27246 ; 22 0x6a6e 0.83148
|
||||
DCW 25330 ; 23 0x62f2 0.77301
|
||||
DCW 23170 ; 24 0x5a82 0.70709
|
||||
DCW 20788 ; 25 0x5134 0.63440
|
||||
DCW 18205 ; 26 0x471d 0.55557
|
||||
DCW 15447 ; 27 0x3c57 0.47141
|
||||
DCW 12540 ; 28 0x30fc 0.38269
|
||||
DCW 9512 ; 29 0x2528 0.29028
|
||||
DCW 6393 ; 30 0x18f9 0.19510
|
||||
DCW 3212 ; 31 0x0c8c 0.09802
|
||||
DCW 0 ; 32 0x0000 0.00000
|
||||
DCW -3212 ; 33 0xf374 -0.09802
|
||||
DCW -6393 ; 34 0xe707 -0.19510
|
||||
DCW -9512 ; 35 0xdad8 -0.29028
|
||||
DCW -12540 ; 36 0xcf04 -0.38269
|
||||
DCW -15447 ; 37 0xc3a9 -0.47141
|
||||
DCW -18205 ; 38 0xb8e3 -0.55557
|
||||
DCW -20788 ; 39 0xaecc -0.63440
|
||||
DCW -23170 ; 40 0xa57e -0.70709
|
||||
DCW -25330 ; 41 0x9d0e -0.77301
|
||||
DCW -27246 ; 42 0x9592 -0.83148
|
||||
DCW -28899 ; 43 0x8f1d -0.88193
|
||||
DCW -30274 ; 44 0x89be -0.92389
|
||||
DCW -31357 ; 45 0x8583 -0.95694
|
||||
DCW -32138 ; 46 0x8276 -0.98077
|
||||
DCW -32610 ; 47 0x809e -0.99518
|
||||
DCW -32768 ; 48 0x8000 -1.00000
|
||||
DCW -32610 ; 49 0x809e -0.99518
|
||||
DCW -32138 ; 50 0x8276 -0.98077
|
||||
DCW -31357 ; 51 0x8583 -0.95694
|
||||
DCW -30274 ; 52 0x89be -0.92389
|
||||
DCW -28899 ; 53 0x8f1d -0.88193
|
||||
DCW -27246 ; 54 0x9592 -0.83148
|
||||
DCW -25330 ; 55 0x9d0e -0.77301
|
||||
DCW -23170 ; 56 0xa57e -0.70709
|
||||
DCW -20788 ; 57 0xaecc -0.63440
|
||||
DCW -18205 ; 58 0xb8e3 -0.55557
|
||||
DCW -15447 ; 59 0xc3a9 -0.47141
|
||||
DCW -12540 ; 60 0xcf04 -0.38269
|
||||
DCW -9512 ; 61 0xdad8 -0.29028
|
||||
DCW -6393 ; 62 0xe707 -0.19510
|
||||
DCW -3212 ; 63 0xf374 -0.09802
|
||||
|
||||
END
|
63
Obj_4/Src/Fichiers_Son/Son.s
Звичайний файл
63
Obj_4/Src/Fichiers_Son/Son.s
Звичайний файл
|
@ -0,0 +1,63 @@
|
|||
; AFONSO Perrine LARTIGUE Auriane
|
||||
thumb
|
||||
area madata, data, readwrite
|
||||
flag dcd 0
|
||||
TIM3_CCR3 equ 0x4000043C ; adresse registre PWM
|
||||
|
||||
|
||||
E_POS equ 0
|
||||
E_TAI equ 4
|
||||
E_SON equ 8
|
||||
E_RES equ 12
|
||||
E_PER equ 16
|
||||
|
||||
area moncode, code, readonly
|
||||
export timer_callback
|
||||
|
||||
import etat
|
||||
import Son
|
||||
import LongueurSon
|
||||
import PeriodeSonMicroSec
|
||||
|
||||
|
||||
|
||||
;GPIOB_BSRR equ 0x40010C10 ; Bit Set/Reset registe
|
||||
|
||||
|
||||
timer_callback proc
|
||||
push{r4}
|
||||
ldr r2, =etat ;r2= @etat
|
||||
ldr r0, [r2 , #E_POS] ; r0 = position
|
||||
ldr r1, [r2 , #E_TAI] ; r1 = taille
|
||||
cmp r0, r1; on compare taille et position
|
||||
|
||||
beq fin ; taille = position
|
||||
|
||||
different
|
||||
ldr r3 , [r2,#E_SON] ; r3 = @son
|
||||
ldrsh r4 , [r3, r0, lsl #0x1] ; r4 = son
|
||||
; ajout composante continue: 2^15
|
||||
add r4, #0x8000
|
||||
|
||||
ldr r12 , [r2 ,#E_RES] ; r12 = resolution
|
||||
|
||||
mul r4 , r12 ; on multiplie par le facteur d'échelle
|
||||
mov r12,#0xFFFF
|
||||
cmp r4, r12 ; la valeur échatillon doit etre compris entre 0 et 2^16 - 1
|
||||
blo registre
|
||||
udiv r4, r12
|
||||
|
||||
|
||||
registre ; échantillon copié dans le registre TIM3_CCR3
|
||||
ldr r12 , =TIM3_CCR3
|
||||
str r4 , [r12]
|
||||
|
||||
; on incremente la position
|
||||
add r0 , #0x1 ;
|
||||
str r0 , [r2 , #E_POS]
|
||||
|
||||
fin pop{r4}
|
||||
bx lr
|
||||
endp
|
||||
|
||||
end
|
5527
Obj_4/Src/Fichiers_Son/bruitverre.asm
Звичайний файл
5527
Obj_4/Src/Fichiers_Son/bruitverre.asm
Звичайний файл
Різницю між файлами не показано, бо вона завелика
Завантажити різницю
145
Obj_4/Src/principal.c
Звичайний файл
145
Obj_4/Src/principal.c
Звичайний файл
|
@ -0,0 +1,145 @@
|
|||
//AFONSO Perrine LARTIGUE Auriane
|
||||
#include "gassp72.h"
|
||||
|
||||
#define SYSTICK_PER 360000 // 72 MHz * 5ms
|
||||
#include "etat.h"
|
||||
#define Periode_en_Tck PeriodeSonMicroSec*72
|
||||
#define Periode_PWM_en_Tck 320
|
||||
|
||||
extern void timer_callback(void);
|
||||
extern int PeriodeSonMicroSec;
|
||||
extern short Son ;
|
||||
extern int LongueurSon ;
|
||||
|
||||
type_etat etat;
|
||||
|
||||
|
||||
unsigned short dma_buf[64]; // buffer de 64 short ints pour le DMA
|
||||
int compteur[6]; //compteur d'occurence en fonction de M2(k) et M2TIR
|
||||
int point[6]; // contient les points des 6 joueurs
|
||||
int CalculM(int,unsigned short *);
|
||||
int M2[64];
|
||||
|
||||
void sys_callback(){
|
||||
|
||||
GPIO_Set(GPIOB, 1); // pour mesurer la durée réelle du traitement DMA+DFT+compteurs.
|
||||
|
||||
// Démarrage DMA pour 64 points
|
||||
Start_DMA1(64);
|
||||
Wait_On_End_Of_DMA1();
|
||||
Stop_DMA1;
|
||||
|
||||
int M2TIR=0x2A7138 ; //seuil à calculer
|
||||
|
||||
for (int k=0; k<64; k++){
|
||||
M2[k]=CalculM(k,dma_buf);
|
||||
if (M2[k] > M2TIR){ // incrémenté chaque fois que M2(k) dépasse le seuil fixé M2TIR
|
||||
switch(k){
|
||||
case 17:
|
||||
compteur[0]++; //tir à 85kHz
|
||||
break;
|
||||
case 18:
|
||||
compteur[1]++; //tir à 90kHz
|
||||
break;
|
||||
case 19:
|
||||
compteur[2]++; // tir à 95kHz
|
||||
break ;
|
||||
case 20:
|
||||
compteur[3]++; // tir à 100kHz
|
||||
break;
|
||||
case 23:
|
||||
compteur[4]++; // tir à 115kHz
|
||||
break;
|
||||
case 24:
|
||||
compteur[5]++; // tir à 120kHz
|
||||
break;
|
||||
}}
|
||||
else {
|
||||
switch(k){ //remise à zéro
|
||||
case 17:
|
||||
compteur[0]=0; //tir à 85kHz
|
||||
break;
|
||||
case 18:
|
||||
compteur[1]=0; //tir à 90kHz
|
||||
break;
|
||||
case 19:
|
||||
compteur[2]=0; // tir à 95kHz
|
||||
break ;
|
||||
case 20:
|
||||
compteur[3]=0; // tir à 100kHz
|
||||
break;
|
||||
case 23:
|
||||
compteur[4]=0; // tir à 115kHz
|
||||
break;
|
||||
case 24:
|
||||
compteur[5]=0; // tir à 120kHz
|
||||
break;
|
||||
}
|
||||
}
|
||||
GPIO_Clear(GPIOB, 1);
|
||||
|
||||
}
|
||||
for (int j = 0 ; j < 6 ; j++){
|
||||
if(compteur[j]==3){
|
||||
point[j]++; // on incremente le score du joueur j
|
||||
|
||||
etat.position = 0;
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int main(){
|
||||
//initialisation variable etat
|
||||
etat.periode_ticks = PeriodeSonMicroSec ;
|
||||
etat.taille = LongueurSon;
|
||||
etat.son = &Son ;
|
||||
etat.position = etat.taille;
|
||||
// activation de la PLL qui multiplie la fréquence du quartz par 9
|
||||
CLOCK_Configure();
|
||||
// config port PB1 pour être utilisé en sortie
|
||||
GPIO_Configure(GPIOB, 0, OUTPUT, ALT_PPULL);
|
||||
etat.resolution = PWM_Init_ff( TIM3 , 3 , Periode_PWM_en_Tck );
|
||||
// initialisation du timer 4
|
||||
// Periode_en_Tck doit fournir la durée entre interruptions,
|
||||
// exprimée en périodes Tck de l'horloge principale du STM32 (72 MHz)
|
||||
|
||||
Timer_1234_Init_ff( TIM4, Periode_en_Tck );
|
||||
// enregistrement de la fonction de traitement de l'interruption timer
|
||||
// ici le 2 est la priorité, timer_callback est l'adresse de cette fonction, a créér en asm,
|
||||
// cette fonction doit être conforme à l'AAPCS
|
||||
Active_IT_Debordement_Timer( TIM4, 2, timer_callback );
|
||||
// lancement du timer
|
||||
Run_Timer( TIM4 );
|
||||
Run_Timer (TIM3) ;
|
||||
|
||||
// activation de la PLL qui multiplie la fréquence du quartz par 9
|
||||
CLOCK_Configure();
|
||||
// PA2 (ADC voie 2) = entrée analog
|
||||
GPIO_Configure(GPIOA, 2, INPUT, ANALOG);
|
||||
// PB1 = sortie pour profilage à l'oscillo
|
||||
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
|
||||
// PB14 = sortie pour LED
|
||||
GPIO_Configure(GPIOB, 14, OUTPUT, OUTPUT_PPULL);
|
||||
|
||||
// activation ADC, sampling time 1us
|
||||
Init_TimingADC_ActiveADC_ff( ADC1, 0x52 );
|
||||
Single_Channel_ADC( ADC1, 2 );
|
||||
// Déclenchement ADC par timer2, periode (72MHz/320kHz)ticks
|
||||
Init_Conversion_On_Trig_Timer_ff( ADC1, TIM2_CC2, 225 );
|
||||
// Config DMA pour utilisation du buffer dma_buf (a créér)
|
||||
Init_ADC1_DMA1( 0, dma_buf );
|
||||
|
||||
// Config Timer, période exprimée en périodes horloge CPU (72 MHz)
|
||||
Systick_Period_ff( SYSTICK_PER );
|
||||
// enregistrement de la fonction de traitement de l'interruption timer
|
||||
// ici le 3 est la priorité, sys_callback est l'adresse de cette fonction, a créér en C
|
||||
Systick_Prio_IT( 3, sys_callback );
|
||||
SysTick_On;
|
||||
SysTick_Enable_IT;
|
||||
|
||||
while(1){
|
||||
}
|
||||
}
|
335
Obj_4/Src/startup-rvds.s
Звичайний файл
335
Obj_4/Src/startup-rvds.s
Звичайний файл
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
Завантаження…
Посилання в новій задачі